CN101632155A - 半导体装置及其制造方法 - Google Patents

半导体装置及其制造方法 Download PDF

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CN101632155A
CN101632155A CN200880008259A CN200880008259A CN101632155A CN 101632155 A CN101632155 A CN 101632155A CN 200880008259 A CN200880008259 A CN 200880008259A CN 200880008259 A CN200880008259 A CN 200880008259A CN 101632155 A CN101632155 A CN 101632155A
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semiconductor device
wafer
adhesive layer
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CN101632155B (zh
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龟山工次郎
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Sanyo Electric Co Ltd
System Solutions Co Ltd
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Sanyo Semiconductor Co Ltd
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Abstract

本发明提供一种半导体装置及其制造方法。在磨削晶圆而形成薄膜的半导体装置的情况下，需要分离成各芯片并对芯片的背面另外分别进行加工。在本发明中，在对晶圆(2a)的表面进行半切割而形成槽部(4)的状态下，通过粘合层(6)将具有刚性的支承体(5)与晶圆(2a)的表面粘贴。另外，在磨削晶圆(2a)的背面并单片化成各芯片(2b)以后，不将芯片(2b)从支承体(5)分离，进行伴随着形成背面电极(9a)等的热处理的背面加工。

Description

半导体装置及其制造方法
技术领域
本发明涉及一种半导体装置及其制造方法，特别是涉及基板的厚度较薄的半导体装置及其制造方法。
背景技术
近年来，为了应对减少通态电阻，增加安装密度等要求，正在促进研制半导体装置的薄膜化，特别是正在促进研制将基板的厚度变薄的半导体装置。
第1以往技术的半导体装置的制造方法
首先，如图12所示，准备主表面上形成有元件区域101的晶圆102a，并在晶圆102a的表面粘贴保护带105a。
接着，如图13所示，将晶圆102a的表面朝下地固定在磨削固定台107上，从背面将晶圆102a磨削至预期的厚度而使晶圆102a变薄。具体而言，在分立器件(discrete device)的情况下，将晶圆102a磨削成100～200μm左右的膜厚，在LSI的情况下，将晶圆102a磨削成150～330μm左右的膜厚。另外，在磨削之后，从晶圆102a剥离保护带105a。
接着，如图14所示，准备粘贴有粘着带105b的平环(flatring)105c，且将晶圆102a的背面粘着在从平环105c露出的粘着带105b上。另外，将平环105c及粘着带105b粘着在切割台103上，利用切割刀具将晶圆102a完全切割而将晶圆102a切断分离成各个芯片102b。
接着，如图15所示，从粘着带105b拾取各芯片102b，在岛(die pad)112a上涂敷导电性材料113而安装芯片102b。另外，例如通过线(wire)114连接元件区域101和引线112b。另外，芯片102b、岛112a以及线114被例如树脂密封。
但是，在上述制造方法中，当将晶圆102a磨削至芯片的厚度时，在晶圆102a上产生较大的翘曲。特别是在近年来，正在推进晶圆102a的大直径化，因此不能无视上述翘曲。
因此，为了防止晶圆的翘曲，公开了下述制造方法。
第2以往技术的半导体装置的制造方法
首先，如图16所示，准备在表面侧形成有元件区域201的晶圆202a，通过真空装置(vacuum)等将晶圆202a的背面吸附在切割台203上而粘着晶圆202a。然后，半切割晶圆202a的表面而形成槽部204。
接着，如图17所示，准备粘贴有保护带205a的平环205b。并将元件区域201粘着在从平环205b露出的保护带205a上。
接着，如图18所示，将平环205b吸附粘着在磨削装置的磨削粘着台207上。而且，将晶圆202a从背面侧磨削至槽部204而使晶圆202a变薄。此时，晶圆202a单片化成各芯片202b。
接着，从粘着带105b拾取各芯片202b，与第1以往技术同样地获得如图15所示的半导体装置。
如上，在第2以往技术中，由于当使晶圆202a变薄时，晶圆202a单片化成各芯片202b，因此，抑制了晶圆202a的翘曲。
作为相关的技术文献可举出例如日本专利公开公报2000-195826号。
在第1及第2的以往技术中，在将晶圆102a、202a单片化成各芯片102b、202b之后，必须将各芯片102b、202b拾取之后输送到后续工序。这是由于粘着带105b、保护带205a的机械强度较弱的缘故。
而且，在上述的制造工序中，没有在各芯片102b、202b上形成背面电极，而通过导电材料113将各芯片102b、202b安装在岛112a上。其原因如下：在第1以及第2的以往技术中，粘着带105b、保护带205a无法承受形成背面电极时的处理温度，因此难以在将各芯片102b、202b粘贴在粘着带105b、保护带205a的状态下，以该状态一并形成背面电极。
另外，在第2以往技术中，晶圆202a在磨削的同时单片化成各芯片202b，但是由于保护带205b的机械强度较弱，因此，难以使芯片202b变薄至80μm以下。
发明内容
鉴于上述，本发明的半导体装置的制造方法的特征在于，其包括准备表面上形成有元件区域的晶圆，并形成包围上述元件区域的槽部的工序；借助粘合层在上述晶圆的表面粘贴具有刚性的支承体的工序；将上述晶圆从背面至到达上述槽部进行薄膜化而将上述晶圆分离成多个芯片的工序；在将上述多个芯片粘贴在支承体的状态下进行伴随着热处理的背面加工的工序；溶解上述粘合层且将上述多个芯片分别分离的工序，涂覆上述粘合层并使该粘合层进入到上述槽部。
另外，本发明的半导体装置的特征在于，其具有半导体芯片、形成于上述半导体芯片的表面上的元件区域和形成于上述芯片的背面上的背面电极，上述背面电极形成为扩展至上述半导体芯片的侧壁的中部，在直到上述侧壁的中途形成有钎焊材料。
在本发明中，能够在支承体上粘贴有各芯片的状态下，一并进行伴随着背面电极等的热处理的背面加工。
另外，能够根据进入槽部的粘合层的量来控制侧面填角(side fillet)的高度。
附图说明
图1是本发明的半导体装置的制造方法的一工序的剖视图。
图2是本发明的半导体装置的制造方法的一工序的剖视图。
图3是本发明的半导体装置的制造方法的一工序的剖视图。
图4是本发明的半导体装置的制造方法的一工序的剖视图。
图5是本发明的半导体装置的制造方法的一工序的剖视图。
图6是本发明的半导体装置的剖视图。
图7是本发明的半导体装置的制造方法的一工序的剖视图。
图8是本发明的半导体装置的制造方法的一工序的剖视图。
图9是本发明的半导体装置的制造方法的一工序的剖视图。
图10是本发明的半导体装置的制造方法的一工序的剖视图。
图11是本发明的半导体装置的制造方法的一工序的剖视图。
图12是以往技术的半导体装置的制造方法的一工序的剖视图。
图13是以往技术的半导体装置的制造方法的一工序的剖视图。
图14是以往技术的半导体装置的制造方法的一工序的剖视图。
图15是以往技术的半导体装置的剖视图。
图16是以往技术的半导体装置的剖视图。
图17是以往技术的半导体装置的制造方法的一工序的剖视图。
图18是以往技术的半导体装置的制造方法的一工序的剖视图。
具体实施方式
以下，参照附图具体说明本发明的具体的实施方式。
制造方法的概略
首先，如图1所示，准备表面侧形成有元件区域1的晶圆2a且形成包围上述元件区域1的槽部4。此时，槽部4形成为至少比完成后的芯片的膜厚深。
接着，如图2所示，将元件区域1置于下侧，利用粘合层6将晶圆2a粘贴在支承体5上。在此，粘合层6使用环氧树脂、抗蚀剂、丙烯酸等具有粘性的物质。另外，支承体5使用玻璃、石英、陶瓷、塑料、金属、树脂等具有刚性的物质。另外，粘合层6没有完全填入槽部4，而是形成为比完成后的芯片膜厚稍浅。
接着，如图3所示，在支承体5上粘贴BG带7，从背面侧磨削晶圆2a至所期望的膜厚(对应于完成后的芯片膜厚)而使晶圆2a变薄。此时，晶圆2a被磨削至槽部4而单片化成各芯片2b，而且，晶圆2a被具有刚性的支承体5坚固地支承。因此，在本实施方式中，能够将晶圆2a磨削至80μm以下。另外，当晶圆2a单片化成各芯片2b时，虽然槽部4露出，但是由于在槽部4里进入有粘合层6，因此，能够抑制磨削杂质从槽部4混入元件区域1里。
接着，如图4所示，使用CVD法、PVD法、溅镀法、电镀法等方法使Al、Cu等电极材料8从各芯片2b的背面侧堆积而形成背面电极9a。在本实施方式中，由于各芯片2b被耐热性较高的支承体5支承，因此，能够不用将各芯片2b从支承体5分离而一并进行背面加工。
接着，如图5所示，当将各芯片2b粘贴在固定带16上并溶解粘合层6时，各芯片2b从支承体5分离。
接着，如图6所示，从固定带16拾取各芯片2b，安装在岛12a上。另外，利用金、铜等线14连接形成在元件区域1上的电极(未图示)和引线12b。此外，根据需要，用树脂灌封芯片2b、岛12a、引线12b而完成半导体装置。
在晶圆2a上形成槽部4的工序(图1)的详细说明
本发明中，作为在晶圆上形成槽部4的方法，应用了如下所述的多种方法。
例如，槽部4可以通过半切割来形成，在这种情况下，半切割通过刀具、激光等来进行。特别是，当通过激光来进行半切割时，即使在晶圆2a上形成有Low-k(低介电常数)材料等机械强度较低的层，也能够防止该层的剥离。
另外，槽部4也可以通过各向同性蚀刻、各向异性蚀刻等蚀刻来形成。在该情况下，能够将槽部4形成为使电极材料8难以附着在槽部的侧壁上的形状。
即，能够如图7的(a)(槽部4a附近的放大图)所示地，当利用各向同性蚀刻时，以使槽部4a上端部变窄的方式弯曲形成槽部4a。此时，电极材料8难以附着在槽部4a的侧壁上。另外，如图7的(b)所示，作为异向同性蚀刻，利用交替地反复进行主要使用SF6气体的等离子蚀刻工序和主要使用C4F8气体的等离子沉积工序的方法时，可以使槽部4b的内壁起伏形成波状。此时，电极材料在附着在槽部4b的内壁上中断。
在晶圆2a上粘贴支承体5的工序(图2)的详细说明
在上述实施方式中，在将各芯片2b粘贴在支承体5上的状态下形成了背面电极9a(图4)。此时，当粘合层6完全填入槽部4时，电极材料8形成为不会在芯片2b和露出于槽部4的粘合层6上中断，即使欲溶解粘合层6(图5)，也由于芯片2b被电极材料8连接而阻碍溶解剂浸入粘合层6里，因此无法溶解粘合层6。因此，需要将粘合层6形成为比完成后的芯片2b的高度低。
为此，优选先将粘合层6涂敷在支承体5上以后粘贴晶圆2a。由此，粘合层6被积存在槽部4的内部的空气推出，因此，粘合层6变得难以完全填入槽部4。
另一方面，当先将粘合层6涂敷在晶圆2a上以后粘贴支承体5时，粘合层6在涂敷在晶圆2a的阶段就进入槽部4里。从而，与上述方法相比，粘合层6更容易填入槽部4。由此，该方法在槽部4的直径较小等、槽部4的润湿性较大的情况下有效。
磨削晶圆2a的工序(图3)的详细说明
在上述实施方法中，在磨削晶圆2a的同时将晶圆2a单片化成各芯片2b。然后，各芯片2b以粘贴在支承体5上的状态输送到后续工序，此时，容易使芯片2b背面的端部倾倒(tipping)。为了防止这样的问题，也可以追加在芯片2b的端部形成圆形的工序。具体而言，在磨削晶圆2a之后，例如，将酸(例如，HF和硝酸等的混合液)作为腐蚀剂而稍稍蚀刻晶圆2a的背面即可。
形成背面电极9a的工序(图4)的详细说明
在上述实施方式中，当溶解粘合层6时，各芯片2b从支承体5分离(图5)，但是，这是由于电极材料8在芯片2b和粘合层上没有连续地形成的缘故。以下，详细说明电极材料8的不连续性。
图8的(a)、(b)表示槽部4的附近的放大的剖视图。在本实施方式中，背面电极9a形成为不仅在芯片2b的背面上延伸，还在芯片2b的侧壁部的上端延伸，因此，背面电极9a形成为伞而使电极材料8难以附着在芯片2b的侧壁部4a、4b上。由此，电极材料8如图8的(a)所示地完全没有形成在侧壁部4a上，或者如图8(b)所示地较薄地形成在侧壁部4b上。
并且，由于槽部4b里填入有粘合层6，因此，电极材料8形成为没有延伸至元件区域1，且不容易产生短路等次品。
粘合层的溶解工序(图5)的详细说明
为了溶解粘合层6需要在粘合层6里混合溶解剂17，以下说明其具体例。
图9的(a)所示的支承体5具有用于供给溶解剂17的溶解孔11a。若使用该支承体5，如图9的(b)所示，通过在各芯片2b的背面粘贴固定带16、且从溶解孔11a供给溶解剂17来溶解粘合层6来将各芯片2b从支承体5剥离。
另外，在图10的(a)中，形成有用于给固定带16供给溶解剂17的溶解孔11b。因此，通过从固定带16的溶解孔11b供给溶解剂17来将各芯片2b从支承体5剥离。
另外，在图10的(b)中，各芯片2b被吸引机18吸引而被固定。在这样的情况下，由于溶解剂17被吸引，因此，例如，从槽部4的侧壁的间隙向粘合层6供给溶解剂17。
半导体装置的构造(图6)的详细说明
在上述实施方式中，背面电极9a形成为不仅在芯片2b的背面上延伸，还在侧壁上延伸。由此，当通过焊锡等导电材料13a连接背面电极9a和岛12a进行回流处理时，导电材料13a朝向芯片2b的外部流动。从而，导电材料13a形成侧面填角13b，芯片2b和岛12a被牢固地连接。
晶圆2a的输送
通常，在半导体装置的制造中，并不是所有的工序都在相同的场所进行，例如前一工序在日本进行，且后一工序在亚洲其它国家进行。特别是，加工晶圆2a的工序和安装芯片2b的工序在不同的场所进行的情况较多。
对于这一点，在本发明中，能够在加工了晶圆2a之后，以将芯片2b粘贴在支承体5上的状态输送。
即，如图11所示，能够在将各芯片2b上形成背面电极9a之后，保持原样地放入输送壳体15内输送到其他工序。
这是因为支承体5具有刚性，而且晶圆2a单片化成芯片，因此不容易产生翘曲的缘故。
另外，在槽部4，粘合层6被电极材料8所覆盖。因此，在输送时空气中水分不容易进入到粘合层6，因此不容易产生输送时各芯片2b剥离的问题。
另外，输送壳体15可以使用层压的袋、固体的箱等各种工具。另外，当在输送壳体15内放入用于吸收空气中的水分的干燥剂19时，能够更加牢固地防止粘合层6的剥离。
另外，本次公开的实施方式在所有的方面都是例示，并不具有限制性。本发明的范围不限于上述实施方式的说明，而是用权利要求书来表示，而且包含与权利要求书等同的含义以及在该权利要求书范围内的所有的变更。
例如，本发明不限定芯片2b的种类，可以应用在MOS晶体管、IGBT、二极管等分立器件、以及LSI等各种半导体装置。

Claims (13)

1.一种半导体装置的制造方法，其特征在于，包括：
准备一侧主表面上形成有元件区域的晶圆，并在上述晶圆的上述一侧主表面形成包围上述元件区域的槽部的工序；
借助粘合层在上述晶圆的上述一侧主表面上粘贴具有刚性的支承体的工序；
将上述晶圆从另一侧主表面侧薄膜化直到上述槽部而将上述晶圆分离成多个芯片的工序；
在将上述多个芯片粘贴在上述支承体的状态下进行伴随着热处理的背面加工的工序；
溶解上述粘合层且将上述多个芯片分别分离的工序，
涂覆上述粘合层并使该粘合层进入到上述槽部。
2.根据权利要求1所述的半导体装置的制造方法，其特征在于，
上述背面加工包括在上述芯片的上述另一侧主表面上形成背面电极的工序。
3.根据权利要求1或2所述的半导体装置的制造方法，其特征在于，
上述支承体由玻璃、石英、陶瓷、塑料、金属、树脂中的任一种构成。
4.根据权利要求1～3中任一项所述的半导体装置的制造方法，其特征在于，
上述芯片被薄膜化成厚度为80μm以下。
5.根据权利要求1～4中任一项所述的半导体装置的制造方法，其特征在于，
上述粘合层包含环氧树脂、抗蚀剂、丙烯酸中的任一种而构成。
6.根据权利要求2所述的半导体装置的制造方法，其特征在于，
包括将上述芯片安装在岛上的工序；
上述背面电极通过钎焊材料固定在上述岛上；
上述钎焊材料根据上述芯片的侧壁上的上述背面电极的形状形成侧面填角。
7.根据权利要求1～6中任一项所述的半导体装置的制造方法，其特征在于，
在上述支承体上涂敷上述粘合层以后，将上述晶圆和上述支承体粘贴。
8.根据权利要求1～7中任一项所述的半导体装置的制造方法，其特征在于，
在上述晶圆上涂敷上述粘合层以后，将上述晶圆和上述支承体粘贴，
在上述槽部中不受润湿性的影响地进入有上述粘合层。
9.根据权利要求1～8中任一项所述的半导体装置的制造方法，其特征在于，
在上述支承体上设有溶解孔，从上述溶解孔注入溶解剂而除去上述粘合层。
10.根据权利要求1～9中任一项所述的半导体装置的制造方法，其特征在于，
具有将上述多个芯片粘贴在固定带上的工序；
上述固定带包含开口部，
溶解剂从上述固定带的上述开口部进入，而使上述粘合层溶解。
11.根据权利要求1～9中任一项所述的半导体装置的制造方法，其特征在于，
在利用吸引装置固定了上述多个芯片以后，从上述槽部吸引上述溶解剂来溶解上述粘合层。
12.一种半导体装置，其特征在于，包括：
半导体芯片；
形成于上述半导体芯片的一侧主表面上的元件区域；
形成于芯片的另一侧主表面上的背面电极；
通过钎焊材料与上述背面电极固定的岛，
上述背面电极形成为扩展至上述半导体芯片的侧壁的中途，根据上述芯片的侧壁上的上述背面电极的形状形成侧面填角。
13.根据权利要求12所述的半导体装置，其特征在于，
上述芯片被薄膜化成厚度为80μm以下。
CN2008800082593A 2007-03-14 2008-03-12 半导体装置及其制造方法 Active CN101632155B (zh)

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