CN101552248B - 半导体装置及其制造方法 - Google Patents
半导体装置及其制造方法 Download PDFInfo
- Publication number
- CN101552248B CN101552248B CN2009101329091A CN200910132909A CN101552248B CN 101552248 B CN101552248 B CN 101552248B CN 2009101329091 A CN2009101329091 A CN 2009101329091A CN 200910132909 A CN200910132909 A CN 200910132909A CN 101552248 B CN101552248 B CN 101552248B
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- film
- semiconductor device
- ditch
- diaphragm
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/93—Batch processes
- H01L24/95—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips
- H01L24/96—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips the devices being encapsulated in a common layer, e.g. neo-wafer or pseudo-wafer, said common layer being separable into individual assemblies after connecting
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/04105—Bonding areas formed on an encapsulation of the semiconductor or solid-state body, e.g. bonding areas on chip-scale packages
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
- H01L2224/12105—Bump connectors formed on an encapsulation of the semiconductor or solid-state body, e.g. bumps on chip-scale packages
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
- H01L2224/13—Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/93—Batch processes
- H01L2224/94—Batch processes at wafer-level, i.e. with connecting carried out on a wafer comprising a plurality of undiced individual devices
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01019—Potassium [K]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/11—Device type
- H01L2924/14—Integrated circuits
Landscapes
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
- Mechanical Treatment Of Semiconductor (AREA)
- Dicing (AREA)
Abstract
Description
Claims (22)
Applications Claiming Priority (4)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2008089674 | 2008-03-31 | ||
JP089674/2008 | 2008-03-31 | ||
JP2008224341A JP4666028B2 (ja) | 2008-03-31 | 2008-09-02 | 半導体装置 |
JP224341/2008 | 2008-09-02 |
Publications (2)
Publication Number | Publication Date |
---|---|
CN101552248A CN101552248A (zh) | 2009-10-07 |
CN101552248B true CN101552248B (zh) | 2013-01-23 |
Family
ID=41156369
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CN2009101329091A Expired - Fee Related CN101552248B (zh) | 2008-03-31 | 2009-03-31 | 半导体装置及其制造方法 |
Country Status (2)
Country | Link |
---|---|
JP (1) | JP2010283367A (zh) |
CN (1) | CN101552248B (zh) |
Families Citing this family (27)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US10141202B2 (en) * | 2013-05-20 | 2018-11-27 | Qualcomm Incorporated | Semiconductor device comprising mold for top side and sidewall protection |
JP6315753B2 (ja) * | 2013-10-01 | 2018-04-25 | オリンパス株式会社 | 半導体装置の製造方法 |
CN104299949A (zh) * | 2014-09-28 | 2015-01-21 | 南通富士通微电子股份有限公司 | 晶圆级芯片封装结构 |
CN104362102A (zh) * | 2014-09-28 | 2015-02-18 | 南通富士通微电子股份有限公司 | 晶圆级芯片规模封装工艺 |
CN104599985B (zh) * | 2014-12-11 | 2018-01-16 | 通富微电子股份有限公司 | 全包封半导体芯片的制作方法 |
CN104617050B (zh) * | 2014-12-11 | 2017-08-11 | 通富微电子股份有限公司 | 晶圆级封装方法 |
CN105006458A (zh) * | 2015-07-16 | 2015-10-28 | 北京工业大学 | 一种带包封的芯片封装结构与实现工艺 |
US10529576B2 (en) * | 2017-08-17 | 2020-01-07 | Semiconductor Components Industries, Llc | Multi-faced molded semiconductor package and related methods |
US10319639B2 (en) | 2017-08-17 | 2019-06-11 | Semiconductor Components Industries, Llc | Thin semiconductor package and related methods |
CN105938804A (zh) * | 2016-06-28 | 2016-09-14 | 中芯长电半导体(江阴)有限公司 | 一种晶圆级芯片封装方法及封装件 |
CN106449533A (zh) * | 2016-12-08 | 2017-02-22 | 华天科技(昆山)电子有限公司 | 芯片多面包封保护结构及其制作方法 |
CN106684053A (zh) * | 2017-03-10 | 2017-05-17 | 中芯长电半导体(江阴)有限公司 | 一种晶圆片级芯片规模封装结构及其制备方法 |
CN106684054A (zh) * | 2017-03-10 | 2017-05-17 | 中芯长电半导体(江阴)有限公司 | 一种晶圆片级芯片规模封装结构及其制备方法 |
CN107342256A (zh) * | 2017-06-26 | 2017-11-10 | 矽力杰半导体技术(杭州)有限公司 | 半导体工艺及半导体结构 |
US11348796B2 (en) | 2017-08-17 | 2022-05-31 | Semiconductor Components Industries, Llc | Backmetal removal methods |
US11404276B2 (en) | 2017-08-17 | 2022-08-02 | Semiconductor Components Industries, Llc | Semiconductor packages with thin die and related methods |
US10741487B2 (en) | 2018-04-24 | 2020-08-11 | Semiconductor Components Industries, Llc | SOI substrate and related methods |
CN107611096A (zh) * | 2017-10-13 | 2018-01-19 | 中芯长电半导体(江阴)有限公司 | 晶圆级芯片封装结构及其制备方法 |
CN107611095A (zh) * | 2017-10-13 | 2018-01-19 | 中芯长电半导体(江阴)有限公司 | 晶圆级芯片封装结构及其制备方法 |
CN107611097A (zh) * | 2017-10-13 | 2018-01-19 | 中芯长电半导体(江阴)有限公司 | 晶圆级芯片封装结构及其制备方法 |
CN107611092A (zh) * | 2017-10-13 | 2018-01-19 | 中芯长电半导体(江阴)有限公司 | 晶圆级芯片封装结构及其制备方法 |
CN107611094A (zh) * | 2017-10-13 | 2018-01-19 | 中芯长电半导体(江阴)有限公司 | 晶圆级芯片封装结构及其制备方法 |
CN107611093A (zh) * | 2017-10-13 | 2018-01-19 | 中芯长电半导体(江阴)有限公司 | 晶圆级芯片封装结构及其制备方法 |
CN107910295B (zh) * | 2017-12-27 | 2023-12-05 | 江阴长电先进封装有限公司 | 一种晶圆级芯片封装结构及其封装方法 |
CN107910307B (zh) * | 2017-12-28 | 2020-01-31 | 江阴长电先进封装有限公司 | 一种半导体芯片的封装结构及其封装方法 |
CN108511401A (zh) * | 2018-05-03 | 2018-09-07 | 江阴长电先进封装有限公司 | 一种半导体芯片的封装结构及其封装方法 |
CN111312600A (zh) * | 2020-02-26 | 2020-06-19 | 南通通富微电子有限公司 | 一种扇出型封装方法、扇出型封装器件及扇出型封装体 |
Family Cites Families (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP3683696B2 (ja) * | 1998-01-29 | 2005-08-17 | 旭化成電子株式会社 | 半導体素子の製造方法 |
JP2002100709A (ja) * | 2000-09-21 | 2002-04-05 | Hitachi Ltd | 半導体装置及びその製造方法 |
US6908784B1 (en) * | 2002-03-06 | 2005-06-21 | Micron Technology, Inc. | Method for fabricating encapsulated semiconductor components |
JP2003320466A (ja) * | 2002-05-07 | 2003-11-11 | Disco Abrasive Syst Ltd | レーザビームを使用した加工機 |
JP2004165658A (ja) * | 2002-11-08 | 2004-06-10 | Internatl Business Mach Corp <Ibm> | 表面の細孔形成剤の部分燃焼によって生成される接着性を改善したポーラス低誘電率誘電体の相互接続 |
JP4193897B2 (ja) * | 2006-05-19 | 2008-12-10 | カシオ計算機株式会社 | 半導体装置およびその製造方法 |
JP4812525B2 (ja) * | 2006-06-12 | 2011-11-09 | パナソニック株式会社 | 半導体装置および半導体装置の実装体および半導体装置の製造方法 |
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2009
- 2009-03-31 CN CN2009101329091A patent/CN101552248B/zh not_active Expired - Fee Related
-
2010
- 2010-07-23 JP JP2010166433A patent/JP2010283367A/ja active Pending
Non-Patent Citations (1)
Title |
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JP特开2006-100535A 2006.04.13 |
Also Published As
Publication number | Publication date |
---|---|
CN101552248A (zh) | 2009-10-07 |
JP2010283367A (ja) | 2010-12-16 |
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Owner name: ZHAOZHUANGWEI CO., LTD. Free format text: FORMER OWNER: CASIO COMPUTER CO., LTD. Effective date: 20120314 |
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Effective date of registration: 20120314 Address after: Tokyo, Japan, Japan Applicant after: Casio Computer Co Ltd Address before: Tokyo, Japan, Japan Applicant before: CASIO Computer Co., Ltd. |
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