CN101404269A - 半导体器件、半导体器件的安装方法和安装结构 - Google Patents
半导体器件、半导体器件的安装方法和安装结构 Download PDFInfo
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Abstract
本发明涉及半导体器件、半导体器件的安装方法和安装结构。为了实现一种可易于安装在电路基板上并且能够提高安装可靠性的半导体器件,本发明的半导体器件(1)包括半导体基板(2)和设置在电极(21)上的金凸点(3)。金凸点(3)具有突起(3a),在金凸点(3)的周围形成有焊料层(32),金凸点(3)和焊料层(32)之间形成有镍层(31)。借助于突起(3a),能够以较小的压力很容易地安装半导体器件(1)。另外,即使对电路基板(6)上的电极(61)施加的焊料(62)的量减少,在安装后也能够以足量的焊料(33)实现键合。并且,由于镍层(31)可防止凸点溶解,所以能够确保较高的安装可靠性。
Description
技术领域
本发明涉及一种具有用于倒装芯片安装的金属凸点的半导体器件、半导体器件的安装方法和安装结构。
背景技术
在现有技术中,半导体基板和电路基板之间的电连接通过引线键合来实现。但是,在进行引线键合时,需要在芯片的外侧确保引线末端的键合空间,这将导致安装尺寸变大。另外,由于半导体基板和电路基板之间的连接距离较长,而导致电感变大,难以实现半导体器件处理速度的高速化。
为了解决上述问题,专利文献1(日本国专利申请公开特开2006-54311号公报,公开日:2006年2月23日)和专利文献2(日本国专利申请公开特开平11-87391号公报,公开日:1999年3月30日)揭示了倒装芯片安装方式。“倒装芯片安装方式”是指以下的安装方法,即,在半导体基板的功能面形成用于与电路基板进行键合的凸点,之后,使上述功能面与电路基板面对置,并对上述凸点和电路基板侧的电极进行键合。
图12是表示专利文献1所记载的半导体器件71的图。半导体器件71包括半导体基板72、在半导体基板72的电极721和表面保护膜722上形成的金凸点73、由TiW形成的扩散阻挡膜74、在扩散阻挡膜74上形成的键合膜(焊料)75。扩散阻挡膜74的材料TiW在Au中的扩散系数较小,能够防止金凸点73和键合膜75的材料Sn之间的相互扩散,所以,键合膜75保持为Sn单体状态。
另外,作为一种被广泛使用的倒装芯片安装方法,可以举出金凸点-焊料键合法。这种金凸点-焊料键合法具体为:在半导体基板上形成金凸点,对电路基板上的电极施加焊料,将上述金凸点和焊料键合在一起。这种方法由于采用了Au-Sn之间的金属键合,因此,安装的可靠性较高,还能应用于细间距的产品。
进而,为了便于实施倒装芯片安装,有人提出了其中设置有突起部分的金凸点结构。图13是表示在电路基板6上安装半导体器件81的步骤的剖面图,(a)表示安装前的状态;(b)表示安装后的状态。半导体器件81包括:半导体基板82;在半导体基板82上形成的电极821;在电极821上设置的金凸点83。该金凸点83具有突起83a。另外,对电路基板6上的电极61施加焊料62。
如图13(b)的安装结构所示,突起83a贯穿焊料62,因此,施加较小的压力就能够安装半导体器件81。
但是,根据图13所示的结构,仅对电路基板6上的电极61施加焊料62,因此,无法确保足量的焊料供给。另外,随着半导体器件的高密度化和高速化,要求半导体基板和电路基板上的用于进行倒装芯片安装的电极进一步实现细间距化。电极间距越小,所能施加的焊料量也就越少。因此,图13所示的结构难以提高安装的可靠性。
另一方面,专利文献2揭示了一种预先仅对金凸点施加焊料的结构。
图14是表示专利文献2所述的半导体器件91的图。半导体器件91包括:具有电极921的半导体基板92、设置于电极921上的金凸点93。金凸点93具有圆锥状的突起93a。另外,对金凸点93施加焊料94使其覆盖突起93a。但是,由于专利文献2并没有揭示对电路基板施加焊料的结构,图14所示的结构也无法确保在电路基板上安装半导体基板所需的足量的焊料。因此,图14所示的结构与图13所示的结构同样不能提高安装的可靠性。
如上所述,上述现有技术的缺陷在于难以确保安装的可靠性。
具体来说,在上述专利文献1所记载的半导体器件71中,键合膜75仅沉积于金凸点73的顶面。因此,无法确保足量的焊料,从而降低安装的可靠性。
如上所述,在图13所示的半导体器件81中,由于仅对电路基板6上的电极61施加焊料62,因此无法施加足量的焊料,难以提高安装的可靠性。另外,在图13(b)中,在焊料62浸润扩散至电极821时,如果在该状态下进行高温存放试验,焊料62就会流入金凸点83与电极831之间的界面并形成Au与Sn的金属间化合物,从而导致提前出现破损。
根据专利文献2所示的结构,直接对金凸点93施加焊料94,因此,在焊料94中的Au扩散量增加,从而容易导致凸点溶解。尤其是,由于金凸点93的突起93a较细,所以,如果发生上述凸点溶解,安装的可靠性就会更加明显地降低。并且,在上述情况下,焊料已经浸润扩散在金凸点93中,这更容易发生因焊料向电极浸润扩散所导致的破损现象。
在专利文献2中,没有揭示在对电路基板安装半导体器件时,也对电路基板上的电极施加焊料的结构。即,当对电路基板安装半导体器件91时,仅对金凸点93施加焊料,所以无法以足量的焊料进行安装。因此,专利文献2的结构无法提高安装的可靠性。
另外,在图13所示的半导体器件81中,将金凸点83的尺寸设定为较大的尺寸使其与保护膜822接触从而完全覆盖电极821,由此,能够防止焊料62流入金凸点83与电极821之间的界面。但是,在这种情况下,在制成金凸点83时形成的键合压力可能使表面保护膜822产生裂纹。
发明内容
本发明是鉴于上述问题进行开发的,其目的在于实现一种可易于安装在电路基板上并且能够提高安装可靠性的半导体器件。
为了解决上述问题,本发明的半导体器件包括半导体基板和在该半导体基板的电极上设置的金属凸点,在该金属凸点周围的至少一部分形成有焊料层,该半导体器件的特征在于:上述金属凸点具有突出部,该突出部朝着要安装上述半导体器件的电路基板面的方向突出;在上述金属凸点和上述焊料层之间形成有保护上述金属凸点的金属层。
根据上述结构,在电路基板上安装半导体器件时,由于在金属凸点上预先形成有焊料层,所以,即使对电路基板侧施加的焊料量较少,也能够以足量的焊料将半导体器件和电路基板键合在一起。另外,由于金属凸点具有突出部,因此,能够以较小的压力很容易地安装半导体器件。并且,由于焊料层的键合面积增大,所以能够提高安装的可靠性。另外,由于在金属凸点和焊料层之间形成有保护金属凸点的金属层,所以能够防止凸点在焊料中溶解扩散。因此,能够实现一种可易于安装在电路基板上并且可提高安装可靠性的半导体器件。
本发明的其他目的、特征和优点在以下的描述中会变得十分明了。此外,以下参照附图来明确本发明的优点。
附图说明
图1是表示在电路基板上安装本发明实施方式的半导体器件的步骤的剖面图,其中,(a)表示安装前的状态,(b)表示安装后的状态。
图2是表示上述半导体器件的剖面图。
图3是表示在上述半导体器件的金凸点上形成镍层的步骤的剖面图。
图4是表示用超级预涂法对金凸点施加焊料的步骤的剖面图。
图5是表示用电镀法对上述金凸点施加镍层和焊料的步骤的剖面图。
图6是表示除去种子层(seed layer)的露出部分的步骤的剖面图。
图7是表示本发明的另一实施方式的半导体器件的剖面图。
图8是表示在电路基板上安装图7所示的半导体器件的步骤的剖面图,其中,图8(a)表示安装前的状态,图8(b)表示安装后的状态。
图9是表示本发明的另一实施方式的半导体器件的变形例的剖面图。
图10是表示本发明的另一实施方式的半导体器件的其他变形例的剖面图。
图11是表示本发明的另一实施方式的半导体器件的其他变形例的剖面图。
图12是表示现有技术的半导体器件的剖面图。
图13是表示在电路基板上安装现有技术的半导体器件的步骤的剖面图,其中,图13(a)表示安装前的状态,图13(b)表示安装后的状态。
图14是表示现有技术的另一半导体器件的剖面图。
具体实施方式
(实施方式1)
以下,根据图1至图6说明本发明的一实施方式。
图2是表示本实施方式的半导体器件1的剖面图。半导体器件1包括半导体基板2和金凸点(金属凸点)3,在半导体基板2的表面形成有电极21和表面保护膜22。金凸点3设置于电极21上,并具有圆锥形的突起(突出部)3a。由此,在进行倒装芯片安装时,仅需施加较小的压力就能够穿破焊料的表面氧化膜。
并且,在金凸点3的表面沉积镍层31,并在镍层31上施加焊料(焊料层)32。镍层31的作用在于保护金凸点3以防止发生凸点溶解。另外,镍层31保护突起3a使其不会在进行倒装芯片安装时在焊料32中溶解。由此,金凸点3和焊料32之间的键合面积增大,能够提高安装的可靠性,另外,即使焊料32产生了裂纹,也能够防止裂纹进一步扩大。
另外,在半导体器件1中,电极21的一部分未被表面保护膜22覆盖而露出。在表面保护膜22的一部分和电极21的露出部分也沉积有镍层31。由此,能够防止在进行倒装芯片安装时焊料流入金凸点3和电极21之间的界面。
以下,说明半导体器件1的倒装芯片安装步骤。
图1是表示在电路基板6上安装半导体器件1的步骤的剖面图,其中,(a)表示安装前的状态,(b)表示安装后的状态。根据图1所示的倒装芯片安装方法,对半导体基板2上的金凸点3和电路基板6上的电极61均施加焊料。因此,较之于图13(b)所示的仅对电路基板上的电极施加焊料的现有的安装结构,图1的(b)所示的安装结构能够确保较多的焊料,减少对电路基板上的电极所施加的焊料。即,在对电路基板6上的电极61施加焊料62时,电极间不容易发生短路,因此,即使采用细间距基板,也能够提高产品的成品率。另外,由于上述处理属于焊料-焊料之间的伪键合(pseudo bonding),因此,在键合时无需形成合金层,从而能够降低键合温度。
另外,在对电路基板6上的电极61施加焊料62时,可采用电镀法或者任意一种预涂法,预涂法包括“ス一パ一ジヤフイツト(注册商标)”法、焊膏法、超级焊料(super solder)法、防焊焊膏(solder-dam paste)法等,其中,上述“ス一パ一ジヤフイツト”法是日本昭和电工株式会社开发的新的预置技术,该技术又被称之为“Super PrecoatingTechnology:超级预涂法”。
以下,根据图3和图4说明在金凸点3上形成镍层的步骤以及对金凸点3施加焊料的步骤。
图3是表示在金凸点3上形成镍层31的步骤的剖面图。首先,在半导体基板2的电极21上设置金凸点3(图3(a)),利用溅射法,在金凸点3的整个表面、表面保护膜22和电极21的露出部分沉积镍层31a(图3(b))。接着,对镍层31a涂敷抗蚀剂4使其完全覆盖镍层31a(图3(c)),利用掩膜5,对需要除去的抗蚀剂41实施感光处理,该抗蚀剂41被涂敷在镍层31a(图3(d))上。接着,除去经感光处理后的抗蚀剂41,留下未经感光处理的抗蚀剂42(图3(e))。然后,对镍层31a的露出部分实施腐蚀处理(图3(f)),最后,除去剩余的抗蚀剂42(图3(g))。
通过上述,在金凸点3的整个表面、表面保护膜22和电极21的露出部分沉积镍层31a。另外,为了更可靠地保护金凸点3,镍层31a的层厚优选在20nm以上。
图4是表示用超级预涂法对金凸点3施加焊料32的步骤的剖面图。在图3(g)所示的状态下,对镍层31a进行化学药液处理,从而形成其表面具有粘合性的镍层31b(图4(a))。然后,使焊料粉末32a附着于镍层31b(图4(b))。之后,熔融焊料粉末32a并进行整平处理,由此,在镍层31的表面预置焊料32(图4(c))。
另外,在施加焊料32时,除上述超级预涂法之外,还可以采用电镀法。以下,根据图5说明用电镀法对金凸点施加镍层和焊料的步骤。
首先,在半导体基板2的电极21上设置有金凸点3的状态(图5(a))下,利用溅射法在半导体基板2和金凸点3的整个表面沉积种子层31c以在电镀步骤进行电导通,其中,所述种子层31c由金或镍形成(图5(b))。接着,在种子层31c上涂敷抗蚀剂43(图5(c)),利用掩膜51,对覆盖在种子层31c的需要沉积镍层的部分上的抗蚀剂44进行感光处理(图5(d))。接着,除去感光处理后的抗蚀剂44,留下未经感光处理的抗蚀剂45(图5(e))。然后,利用电镀法沉积镍层31d(图5(f))。接着,利用电镀法沉积焊料(焊料层)32b(图5(g))。之后,除去抗蚀剂45,由此,焊料32b覆盖镍层31d(图5(h))。
进而,利用图6说明除去种子层31c的露出部分的步骤。
首先,重新在半导体基板2和金凸点3的整个表面涂敷抗蚀剂46(图6(a))。接着,利用掩膜52,对覆盖在种子层31c的露出部分上的抗蚀剂47进行感光处理(图6(b)),除去经感光处理后的抗蚀剂47(图6(c))。然后,除去种子层31c的露出部分(图6(d)),除去剩余的抗蚀剂47(图6(e))。
如上所述,在利用电镀法的情况下,由于步骤的增加,所需的成本和时间也增加,但是,所形成的镍层要比利用溅射法所形成的镍层厚。并且,不存在超级预涂法的缺陷,即:可施加的焊料量因电极间距变化而出现差异。
另外,以上,说明了超级预涂法和电镀法。但并不限于此,可采用预涂法中的任意一种,包括焊膏法、超级焊料法、防焊焊膏法等。例如,就焊料可施加量和焊膏施加精度而言,超级焊料法和超级预涂法具有相同的效果;另一方面,前者的步骤数较多(具体来说,在超级焊料法中,下述步骤均需要多执行一次,即:抗蚀剂涂敷步骤、抗蚀剂感光处理步骤、感光处理后的抗蚀剂除去步骤、剩余抗蚀剂的除去步骤),从而导致成本增加。另外,在焊膏法中,焊料可施加量较少,焊膏施加精确度也不高。综合上述因素,超级预涂法最适于细间距产品。
(实施方式2)
以下,通过图7至图11说明本发明的另一实施方式。
图7是表示本实施方式的半导体器件11的结构的剖面图。在图1所示的半导体器件1中,对金凸点3施加焊料32使其完全覆盖金凸点3。而在本实施方式的半导体器件11中,仅对金凸点3的突起3a和底座顶面上的镍层31施加焊料(焊料层)34。根据本实施方式,虽然可确保的焊料量较图1所示的半导体器件1要少,但是,在施加焊料或进行倒装芯片安装时,能够降低凸点之间发生短路的可能性。因此,细间距(50μm以下)产品优选使用图7所示的半导体器件11。
以下,说明半导体器件11的倒装芯片安装步骤。
图8是表示在电路基板6上安装半导体器件11的步骤的剖面图,其中,(a)表示安装前的状态,(b)表示安装后的状态。如图8(b)中的安装结构所示,沿平行于半导体基板2及电路基板6的方向扩散的焊料35要比图1(b)所示的安装结构中的焊料33少。因此,在进行倒装芯片安装时,凸点之间不容易发生短路。另外,金凸点3被焊料35可靠地覆盖,因此,在安装可靠性方面并不存在什么问题。
以下,说明本实施方式的半导体器件的变形例。
图9是表示本实施方式的半导体器件12的结构的剖面图。在半导体器件12中,表面保护膜22没有覆盖半导体基板2上的电极21。所以,为防止焊料流入金凸点3与电极21之间的界面,在金凸点3的整个表面和电极21的露出部分沉积镍层31e,并在镍层31e上沉积焊料32使其完全覆盖镍层31e。
另外,与图7所示的半导体器件11同样地,半导体器件12可以减少所需施加的焊料量。
图10是表示本实施方式的半导体器件13的结构的剖面图。在上述图9所示的半导体器件12中,对金凸点3的整个面施加焊料32。而在本实施方式的半导体器件13中,仅对金凸点3的突起3a和底座顶面上的镍层31e施加焊料34。根据半导体器件13的结构,在进行倒装芯片安装时,也能够以足量的焊料键合半导体器件和电路基板。
另外,以上,说明了金凸点具有突起的结构,但并不限于此,金凸点的突出部分也可以形成为除突起形状之外的其他形状。例如,也可以如图11所示的半导体器件14那样,金凸点(金属凸点)3b具有环状的突出部3c。在这种情况下,在金凸点3b的整个面上沉积镍层31f,并在镍层31f上沉积焊料(焊料层)36,由此,也能够以较小的压力进行安装,充分地确保安装的可靠性。
进而,在上述说明中,作为用于防止金凸点溶解的金属层采用了镍层,但并不限于此,也可以采用由Bi、Cd、Ge、Zn、Cr、Ga、TiW等金属形成的金属层。另外,在用超级预涂法对金凸点施加焊料时,上述金属层优选镍层。作为用于安装半导体器件的凸点,并不限于使用金凸点,也可以使用铜凸点。
本发明并不限于上述各实施方式,可以在本发明请求保护的技术方案的范围内进行各种变化。通过适当组合不同实施方式所揭示的技术手段得到的实施方式也包含在本发明的技术范围内。
如上所述,本发明实施方式的半导体器件包括半导体基板和在该半导体基板的电极上设置的金属凸点,在该金属凸点周围的至少一部分上形成有焊料层,其中,上述金属凸点具有突出部,该突出部朝着要安装上述半导体器件的电路基板面的方向突出;在上述金属凸点和上述焊料层之间形成有用于保护上述金属凸点的金属层。根据上述结构,能够较容易地在电路基板安装半导体器件,从而可实现安装可靠性较高的半导体器件。
本发明实施方式的半导体器件优选的是,上述金属层至少覆盖上述突出部。
由于突出部较细,因此,如果凸点溶解,就可能显著降低安装的可靠性。根据上述结构,用于防止凸点溶解的金属层至少覆盖突出部,因此,能够确保较高的安装可靠性。
本发明实施方式的半导体器件优选的是,在设置上述金属凸点的电极存在露出部分时,形成上述金属层使其覆盖上述电极的露出部分。
根据上述结构,由于露出部分被金属层所覆盖,能够防止因焊料流入金属凸点和电极之间的界面所引起的破损。
本发明实施方式的半导体器件可以构成为:上述金属层还覆盖上述半导体基板的表面保护膜的一部分。
在本发明实施方式的半导体器件中,上述金属层可以为溅射膜或电镀膜。
本发明实施方式的半导体器件优选的是,形成上述焊料层使其覆盖上述金属凸点的与上述电路基板对置的顶面和上述突出部。
根据上述结构,由于焊料层覆盖突出部,突出部朝电路基板面突出,所以,在电路基板上安装半导体器件时,金属凸点的焊料层和电路基板的焊料层能够较容易地键合在一起。另外,由于焊料的量减少,因此,在焊料层形成时或进行安装时,凸点之间短路的可能性降低,特别适合细间距产品。
本发明实施方式的半导体器件优选的是,形成上述焊料层使其完全覆盖上述金属层。
根据上述结构,由于能够确保足量的焊料,所以能够进一步提高安装的可靠性。
本发明实施方式的半导体器件优选的是,采用任意一种预涂法形成上述焊料层,该预涂法包括超级预涂法、焊膏法、超级焊料法、防焊焊膏法等。
根据上述结构,较之于电镀法,采用预涂法能够在短时间内施加较多量的焊料。超级预涂法和超级焊料法尤其适于细间距化产品。
在本发明实施方式的半导体器件中,也可以通过电镀法形成上述焊料层。
根据上述结构,施加焊料较费时间,但焊料可施加量不会因金属凸点之间的距离而发生变化。
本发明实施方式的半导体器件优选的是,上述金属层由镍形成。
根据上述结构,在通过超级预涂法形成焊料层时,可通过化学药液处理对镍层赋予粘合性使得焊料粉末附着在镍层上。
本发明实施方式的半导体器件优选的是,上述金属层由选自Bi、Cd、Ge、Zn、Cr、Ga、TiW中的至少一种金属构成。
根据上述结构,能够防止凸点溶解,从而确保较高的安装可靠性。
本发明实施方式的半导体器件优选的是,上述金属凸点为金凸点或铜凸点。
根据上述结构,能够确保良好的导电性。
本发明实施方式的半导体器件优选的是,上述突出部为圆锥状突起。
根据上述结构,由于突出部的顶端较为尖锐,因此能够更容易地安装半导体器件。
在本发明实施方式的半导体器件中,上述突出部也可以形成为环状。
本发明实施方式的半导体器件的安装方法是在电路基板上安装半导体器件的方法,其特征在于,包括:在上述电路基板的电极上形成焊料层的步骤;以及将上述半导体器件的焊料层和在上述电路基板的电极上形成的焊料层熔融并键合在一起的步骤。
本发明实施方式的半导体器件的安装结构具有以下特征,即,通过将上述半导体体器件的上述焊料层和在上述电路基板的电极上形成的焊料层熔融并键合在一起而形成上述安装结构。
根据上述结构,预先对电路基板上的电极和半导体器件施加焊料,由此,能够以足量的焊料进行键合。另外,如上所述,半导体器件的金属凸点具有突出部,并且,在焊料层和金属凸点之间设有金属层,因此,能够确保较高的安装可靠性。
根据本发明实施方式的半导体器件的安装方法,在上述电路基板的电极上形成焊料层的步骤中,可采用电镀法或者任意一种预涂法形成焊料层,该预涂法包括超级预涂法、焊膏法、超级焊料法、防焊焊膏法等。
本发明适于具有用于进行倒装芯片安装的金属凸点的半导体器件。
以上,对本发明进行了详细的说明,上述具体实施方式或实施例仅仅是揭示本发明的技术内容的示例,本发明并不限于上述具体示例,不应对本发明进行狭义的解释,可在本发明的精神和本发明请求保护的技术方案的范围内进行各种变更来实施之。
Claims (17)
1.一种半导体器件,包括半导体基板和在该半导体基板的电极上设置的金属凸点,在该金属凸点周围的至少一部分形成有焊料层,该半导体器件的特征在于:
上述金属凸点具有突出部,该突出部朝着要安装上述半导体器件的电路基板面的方向突出;
在上述金属凸点和上述焊料层之间形成有保护上述金属凸点的金属层。
2.根据权利要求1所述的半导体器件,其特征在于:
上述金属层至少覆盖上述突出部。
3.根据权利要求2所述的半导体器件,其特征在于:
在设置上述金属凸点的电极存在露出部分的情况下,形成上述金属层使其覆盖上述电极的露出部分。
4.根据权利要求3所述的半导体器件,其特征在于:
上述金属层进一步覆盖上述半导体基板的表面保护膜的一部分。
5.根据权利要求1至4中的任意一项所述的半导体器件,其特征在于:
上述金属层为溅射膜或电镀膜。
6.根据权利要求3所述的半导体器件,其特征在于:
形成上述焊料层使其覆盖上述金属凸点的与上述电路基板对置的顶面和上述突出部。
7.根据权利要求1至4中的任意一项所述的半导体器件,其特征在于:
形成上述焊料层使其完全覆盖上述金属层。
8.根据权利要求1至4、6中的任意一项所述的半导体器件,其特征在于:
通过任意一种预涂法形成上述焊料层,该预涂法包括超级预涂法、焊膏法、超级焊料法、防焊焊膏法等。
9.根据权利要求1至4、6中的任意一项所述的半导体器件,其特征在于:
通过电镀法形成上述焊料层。
10.根据权利要求5所述的半导体器件,其特征在于:
上述金属层采用了Ni金属。
11.根据权利要求5所述的半导体器件,其特征在于:
上述金属层采用了选自Bi、Cd、Ge、Zn、Cr、Ga、TiW中的至少一种金属。
12.根据权利要求1至4、6中的任意一项所述的半导体器件,其特征在于:
上述金属凸点为金凸点或铜凸点。
13.根据权利要求1至4、6中的任意一项所述的半导体器件,其特征在于:
上述突出部形成为圆锥状突起。
14.根据权利要求1至4、6中的任意一项所述的半导体器件,其特征在于:
上述突出部形成为环状。
15.一种半导体器件的安装方法,在电路基板上安装上述半导体器件,其中,上述半导体器件包括半导体基板和在该半导体基板的电极上设置的金属凸点,在该金属凸点周围的至少一部分形成有焊料层,上述金属凸点具有突出部,该突出部朝着要安装上述半导体器件的电路基板面的方向突出,在上述金属凸点和上述焊料层之间形成有保护上述金属凸点的金属层,该安装方法的特征在于,包括:
在上述电路基板的电极上形成焊料层的步骤;以及
将上述半导体器件的焊料层和在上述电路基板的电极上形成的焊料层熔融并键合在一起的步骤。
16.根据权利要求15所述的半导体器件的安装方法,其特征在于:
在上述电路基板的电极上形成焊料层的步骤中,通过电镀法或者任意一种预涂法形成焊料层,该预涂法包括超级预涂法、焊膏法、超级焊料法、防焊焊膏法等。
17.一种半导体器件的安装结构,其特征在于,是通过将上述半导体器件的焊料层和在电路基板的电极上形成的焊料层熔融并键合在一起来实现的,其中,上述半导体器件包括半导体基板和在该半导体基板的电极上设置的金属凸点,在该金属凸点周围的至少一部分形成有上述焊料层,上述金属凸点具有突出部,该突出部朝着要安装上述半导体器件的电路基板面的方向突出,在上述金属凸点和上述焊料层之间形成有保护上述金属凸点的金属层。
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