JP4629667B2 - 活性化プレートを用いる集積回路の無電解及び浸漬メッキ - Google Patents
活性化プレートを用いる集積回路の無電解及び浸漬メッキ Download PDFInfo
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- JP4629667B2 JP4629667B2 JP2006517807A JP2006517807A JP4629667B2 JP 4629667 B2 JP4629667 B2 JP 4629667B2 JP 2006517807 A JP2006517807 A JP 2006517807A JP 2006517807 A JP2006517807 A JP 2006517807A JP 4629667 B2 JP4629667 B2 JP 4629667B2
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- Prior art keywords
- plating
- integrated circuit
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- plated
- activation plate
- Prior art date
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/22—Secondary treatment of printed circuits
- H05K3/24—Reinforcing the conductive pattern
- H05K3/244—Finish plating of conductors, especially of copper conductors, e.g. for pads or lands
-
- C—CHEMISTRY; METALLURGY
- C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
- C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
- C23C18/00—Chemical coating by decomposition of either liquid compounds or solutions of the coating forming compounds, without leaving reaction products of surface material in the coating; Contact plating
- C23C18/16—Chemical coating by decomposition of either liquid compounds or solutions of the coating forming compounds, without leaving reaction products of surface material in the coating; Contact plating by reduction or substitution, e.g. electroless plating
- C23C18/1601—Process or apparatus
- C23C18/1633—Process of electroless plating
- C23C18/1646—Characteristics of the product obtained
- C23C18/165—Multilayered product
- C23C18/1651—Two or more layers only obtained by electroless plating
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/02—Bonding areas ; Manufacturing methods related thereto
- H01L24/03—Manufacturing methods
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/02—Bonding areas ; Manufacturing methods related thereto
- H01L24/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L24/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/03—Manufacturing methods
- H01L2224/034—Manufacturing methods by blanket deposition of the material of the bonding area
- H01L2224/0346—Plating
- H01L2224/03464—Electroless plating
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/0401—Bonding areas specifically adapted for bump connectors, e.g. under bump metallisation [UBM]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/04042—Bonding areas specifically adapted for wire connectors, e.g. wirebond pads
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
- H01L2224/0554—External layer
- H01L2224/05599—Material
- H01L2224/056—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
- H01L2224/05638—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
- H01L2224/05644—Gold [Au] as principal constituent
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
- H01L2224/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
- H01L2224/45001—Core members of the connector
- H01L2224/45099—Material
- H01L2224/451—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
- H01L2224/45117—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 400°C and less than 950°C
- H01L2224/45124—Aluminium (Al) as principal constituent
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
- H01L2224/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
- H01L2224/45001—Core members of the connector
- H01L2224/45099—Material
- H01L2224/451—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
- H01L2224/45138—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
- H01L2224/45144—Gold (Au) as principal constituent
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/93—Batch processes
- H01L2224/94—Batch processes at wafer-level, i.e. with connecting carried out on a wafer comprising a plurality of undiced individual devices
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/11—Device type
- H01L2924/14—Integrated circuits
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/10—Details of components or other objects attached to or integrated in a printed circuit board
- H05K2201/10007—Types of components
- H05K2201/10204—Dummy component, dummy PCB or template, e.g. for monitoring, controlling of processes, comparing, scanning
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- Engineering & Computer Science (AREA)
- Chemical & Material Sciences (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Computer Hardware Design (AREA)
- Manufacturing & Machinery (AREA)
- Power Engineering (AREA)
- Materials Engineering (AREA)
- Mechanical Engineering (AREA)
- Metallurgy (AREA)
- Organic Chemistry (AREA)
- Chemical Kinetics & Catalysis (AREA)
- General Chemical & Material Sciences (AREA)
- Chemically Coating (AREA)
Description
図1は、100において、本発明の一実施形態に係る集積回路上のメッキ接着パッドを示す部分断面図である。集積回路110の表面には、通常、複数の接着パッド120が設けられている。接着パッドにより、外部電源装置、アース線、入力信号、出力信号、データ線、アドレス線、他の集積回路及び外部電子部品等との電気的な接続が提供される。集積回路110は、複数の接着パッド120を備えている。複数の接着パッド120を備える集積回路110は、例えば、ダイシングされていない半導体ウェハや各半導体ダイ上に設けられている。
Claims (3)
- 複数の半導体ウェハの少なくとも一つに組み込まれた集積回路のメッキ方法であって、
前記半導体ウェハ間に挟み込まれるように、前記半導体ウェハ上の少なくとも1つの集積回路に隣接して活性化プレートを配置するステップと、
前記集積回路が接着パッド金属からなる複数の接着パッドを有し、
前記活性化プレートが前記接着パッド金属からなることと、
前記接着パッド及び前記活性化プレート上に無電解ニッケル層をメッキするステップと、
前記接着パッド及び前記活性化プレート上の前記無電解ニッケル層を覆うように金層をメッキするステップと
を備える方法。 - 複数の半導体ウェハの少なくとも一つに組み込まれた集積回路をメッキするシステムであって、
前記半導体ウェハ間に挟み込まれるように、前記半導体ウェハ上の少なくとも1つの集積回路に隣接して活性化プレートを配置する手段と、
前記集積回路が接着パッド金属からなる複数の接着パッドを有していることと、
前記活性化プレートが前記接着パッド金属からなることと、
前記接着パッド及び前記活性化プレート上に無電解ニッケル層をメッキする手段と、
前記接着パッド及び前記活性化プレート上の前記無電解ニッケル層を覆うように金層をメッキする手段と
を備えるシステム。 - 活性化プレート、及び複数の半導体ウェハの少なくとも一つに組み込まれた集積回路からなる装置であって、
前記集積回路は、
接着パッド金属からなる複数の接着パッドと、
前記接着パッド上の無電解ニッケルメッキ層であって、前記無電解ニッケル層を前記接着パッド上にメッキするとき、前記接着パッド金属からなる活性化プレートが、前記半導体ウェハ間に挟み込まれるように、前記半導体ウェハ上の集積回路に隣接して配置される無電解ニッケルメッキ層と、
前記無電解ニッケル層上の金メッキ層であって、前記金層を前記ニッケルメッキ接着パッド上にメッキするとき、前記活性化プレートが、前記半導体ウェハ間に挟み込まれるように、前記集積回路に隣接して配置される金メッキ層と
を備える装置。
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US10/611,546 US6974776B2 (en) | 2003-07-01 | 2003-07-01 | Activation plate for electroless and immersion plating of integrated circuits |
PCT/US2004/021062 WO2005006423A1 (en) | 2003-07-01 | 2004-06-29 | Electroless and immersion plating of integrated circuits using an activation plate |
Publications (2)
Publication Number | Publication Date |
---|---|
JP2007524757A JP2007524757A (ja) | 2007-08-30 |
JP4629667B2 true JP4629667B2 (ja) | 2011-02-09 |
Family
ID=33552379
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP2006517807A Expired - Fee Related JP4629667B2 (ja) | 2003-07-01 | 2004-06-29 | 活性化プレートを用いる集積回路の無電解及び浸漬メッキ |
Country Status (4)
Country | Link |
---|---|
US (1) | US6974776B2 (ja) |
JP (1) | JP4629667B2 (ja) |
KR (1) | KR101080629B1 (ja) |
WO (1) | WO2005006423A1 (ja) |
Families Citing this family (32)
Publication number | Priority date | Publication date | Assignee | Title |
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JP3831846B2 (ja) * | 2003-06-09 | 2006-10-11 | 富士電機デバイステクノロジー株式会社 | 半導体装置の製造方法 |
US20050001316A1 (en) * | 2003-07-01 | 2005-01-06 | Motorola, Inc. | Corrosion-resistant bond pad and integrated device |
US7279407B2 (en) | 2004-09-02 | 2007-10-09 | Micron Technology, Inc. | Selective nickel plating of aluminum, copper, and tungsten structures |
US7670951B2 (en) | 2005-06-27 | 2010-03-02 | Intel Corporation | Grid array connection device and method |
US20080116077A1 (en) * | 2006-11-21 | 2008-05-22 | M/A-Com, Inc. | System and method for solder bump plating |
US8125060B2 (en) * | 2006-12-08 | 2012-02-28 | Infineon Technologies Ag | Electronic component with layered frame |
JP4834022B2 (ja) * | 2007-03-27 | 2011-12-07 | 古河電気工業株式会社 | 可動接点部品用銀被覆材およびその製造方法 |
KR100860445B1 (ko) * | 2007-07-05 | 2008-09-25 | 주식회사 케이이씨 | 반도체 장치 및 본드 패드의 제조 방법 |
US7932130B2 (en) * | 2008-08-01 | 2011-04-26 | Stats Chippac Ltd. | Method for forming an etched recess package on package system |
US8609256B2 (en) * | 2008-10-02 | 2013-12-17 | E I Du Pont De Nemours And Company | Nickel-gold plateable thick film silver paste |
JP5295719B2 (ja) * | 2008-10-31 | 2013-09-18 | シャープ株式会社 | メッキ処理装置 |
US8357998B2 (en) * | 2009-02-09 | 2013-01-22 | Advanced Semiconductor Engineering, Inc. | Wirebonded semiconductor package |
DE102009022660B3 (de) * | 2009-05-26 | 2010-09-16 | Semikron Elektronik Gmbh & Co. Kg | Befestigung eines Bauelements an einem Substrat und/oder eines Anschlusselementes an dem Bauelement und/oder an dem Substrat durch Drucksinterung |
US8400784B2 (en) | 2009-08-10 | 2013-03-19 | Silergy Technology | Flip chip package for monolithic switching regulator |
JP5680342B2 (ja) * | 2009-09-02 | 2015-03-04 | Tdk株式会社 | めっき膜、プリント配線板及びモジュール基板 |
TWM397591U (en) * | 2010-04-22 | 2011-02-01 | Mao Bang Electronic Co Ltd | Bumping structure |
US8889995B2 (en) * | 2011-03-03 | 2014-11-18 | Skyworks Solutions, Inc. | Wire bond pad system and method |
US8569167B2 (en) | 2011-03-29 | 2013-10-29 | Micron Technology, Inc. | Methods for forming a semiconductor structure |
KR101310256B1 (ko) * | 2011-06-28 | 2013-09-23 | 삼성전기주식회사 | 인쇄회로기판의 무전해 표면처리 도금층 및 이의 제조방법 |
US9679869B2 (en) | 2011-09-02 | 2017-06-13 | Skyworks Solutions, Inc. | Transmission line for high performance radio frequency applications |
JP5669780B2 (ja) * | 2012-03-21 | 2015-02-18 | 三菱電機株式会社 | 半導体装置の製造方法 |
US8618677B2 (en) | 2012-04-06 | 2013-12-31 | Advanced Semiconductor Engineering, Inc. | Wirebonded semiconductor package |
CN103390647A (zh) * | 2012-05-10 | 2013-11-13 | 无锡华润上华半导体有限公司 | 一种功率mos器件结构 |
WO2013188712A1 (en) | 2012-06-14 | 2013-12-19 | Skyworks Solutions, Inc. | Power amplifier modules including related systems, devices, and methods |
US9609752B1 (en) | 2013-03-15 | 2017-03-28 | Lockheed Martin Corporation | Interconnect structure configured to control solder flow and method of manufacturing of same |
EP3217424B1 (en) * | 2014-11-07 | 2019-04-17 | Nippon Steel & Sumitomo Metal Corporation | Electroconductive assembly for electronic component, semiconductor device in which said assembly is used, and method for manufacturing electroconductive assembly |
WO2018078784A1 (ja) * | 2016-10-28 | 2018-05-03 | 三菱電機株式会社 | 半導体装置及びその製造方法 |
TWI612180B (zh) * | 2017-07-19 | 2018-01-21 | Triumphant Gate Ltd | 化學置換鍍金溶液及雜質鎳及雜質銅的連續純化系統 |
CN109280908B (zh) * | 2017-07-19 | 2021-03-02 | 昊鼎环保科技(湖北)有限公司 | 一种化学置换含有杂质镍、铜的镀金溶液的连续纯化系统 |
US11309251B2 (en) | 2017-07-31 | 2022-04-19 | AdTech Ceramics Company | Selective metallization of integrated circuit packages |
TWI736695B (zh) * | 2017-10-24 | 2021-08-21 | 啟耀光電股份有限公司 | 電子裝置與其製造方法 |
US20230084432A1 (en) * | 2021-09-15 | 2023-03-16 | Western Digital Technologies, Inc. | Nickel-boron coatings for housings and enclosures |
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KR19980021720A (ko) * | 1996-09-18 | 1998-06-25 | 김광호 | 절연 금속 기판을 갖는 파워 트랜지스터 패키지 |
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-
2003
- 2003-07-01 US US10/611,546 patent/US6974776B2/en not_active Expired - Fee Related
-
2004
- 2004-06-29 WO PCT/US2004/021062 patent/WO2005006423A1/en active Application Filing
- 2004-06-29 KR KR1020057025457A patent/KR101080629B1/ko not_active IP Right Cessation
- 2004-06-29 JP JP2006517807A patent/JP4629667B2/ja not_active Expired - Fee Related
Also Published As
Publication number | Publication date |
---|---|
JP2007524757A (ja) | 2007-08-30 |
KR101080629B1 (ko) | 2011-11-08 |
US20050003677A1 (en) | 2005-01-06 |
KR20060024448A (ko) | 2006-03-16 |
WO2005006423A1 (en) | 2005-01-20 |
US6974776B2 (en) | 2005-12-13 |
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