CN100573859C - 半导体装置和模块以及连接半导体芯片到陶瓷基板的方法 - Google Patents

半导体装置和模块以及连接半导体芯片到陶瓷基板的方法 Download PDF

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CN100573859C
CN100573859C CNB2007101618213A CN200710161821A CN100573859C CN 100573859 C CN100573859 C CN 100573859C CN B2007101618213 A CNB2007101618213 A CN B2007101618213A CN 200710161821 A CN200710161821 A CN 200710161821A CN 100573859 C CN100573859 C CN 100573859C
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thick metal
metal layers
copper
thickness
ceramic substrate
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CN101165884A (zh
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D·西佩
R·巴耶勒
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Infineon Technologies AG
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Infineon Technologies AG
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Abstract

本发明涉及半导体装置和模块以及连接半导体芯片到陶瓷基板的方法。一种半导体装置具有含有第一表面和第二表面的硅本体，和设置在硅本体的至少一个表面上的厚金属层。该厚金属层的厚度至少为10微米(μm)。

Description

半导体装置和模块以及连接半导体芯片到陶瓷基板的方法
技术领域
本发明总体上涉及半导体装置且尤其涉及半导体模块，以及用于将半导体芯片连接到陶瓷基板的方法。
背景技术
在半导体模块中，将一个或多个半导体芯片设置在基板上，且将一个或多个基板设置在底座上，其是模块外壳的一部分。在常规半导体模块中，芯片以其底侧焊接到基板上且芯片的顶侧通过使用接合线连接到基板。对于接合线，通常使用铝线，但是当结合到功率半导体模块中时，铝线由于在功率电子器件中固有的循环热机械负载而显示出一些不足。循环热机械应力导致铝接合线中裂纹扩展并导致接合线脱落缺陷。普通铝线不能简单地被由另一材料如铜制成的线代替。大部分替换材料比铝硬且在与用除了铝之外的材料制成的线进行接合时有源单元会被损坏。因此，需要一种创新的整体解决方案，对于上述缺陷其允许替换普通铝接合线。
发明内容
在一个实施例中，半导体装置可以包括具有第一表面和第二表面的硅本体和设置在硅本体的至少一个表面上的厚金属层，其中厚金属层的厚度至少为10微米(μm)。
附图说明
参考以下附图和描述将更好地理解本发明。在图中的部件不必按照比例，而是为示出本发明原理进行强调。而且，在图中，相似的参考数字表示相应的部分。在图中：
图1示出了能使用根据本发明的厚金属层和接合方法集成并安装到半导体模块中的示范性电路；
图2示出了焊接到基板并使用普通铝线接合的半导体器件；
图3示出了于设置在单个半导体模块中的不同基板上安装的几个半导体器件；
图4示出了由于接合线中裂纹扩展导致的接合线脱落；
图5是具有裂纹的接合线的截面图；
图6示出了焊接到基板的半导体器件的实例，其中铜接合线接合到厚金属层上；
图7示出了应用于使用发明的芯片和线接合结构的分立器件的本发明；
图8示出了在沟槽处具有微孔涂层的接合工具(bondingtool)，用于线接合铜线；
图9示出了具有华夫结构(waffle-structure)的接合工具，用于带状物接合；和
图10示出了具有突出结构的接合工具。
具体实施方式
在一个实施例中，半导体装置可以包括硅本体，其具有第一表面和第二表面，沉积于硅本体的至少一个表面上的薄粘附层；和厚金属层，其沉积于薄粘附层上用于接合厚接合线到厚金属层上。
在另一实施例中，半导体模块可以包括陶瓷基板，其具有第一和第二表面，该基板至少在所述表面之一处具有由铜或其合金制成的厚金属化(metalization)；半导体芯片，其包括硅本体，其具有第一表面和第二表面、沉积在硅本体的至少一个表面上的薄粘附层，和沉积在该薄层上的厚金属层，用于将厚接合线接合到厚金属层上，该半导体芯片设置于基板上；和铜线接合，其连接半导体芯片的厚金属层和陶瓷基板的厚金属化。
另外，在另一实施例中，公开了一种用于将半导体芯片上的厚金属层连接到在陶瓷基板上由铜或其合金制成的厚金属化上的方法，其可以包括步骤：使用接合工具将厚铜线或带接合到厚金属层和厚金属化上，所述接合工具具有在超声接合期间保证线和工具之间的充分夹持(grip)的表面，例如具有包含微孔涂层的表面。
在其他实施例中，用于将半导体芯片上的厚金属层连接到在陶瓷基板上由铜或其合金制成的厚金属电镀的方法可以替换地或另外地包括步骤：使用具有突出结构或华夫结构的接合工具将厚铜线或带接合到厚金属层和厚金属化上。
在一些实施例中，功率电子电路如脉冲宽度调制(PWM)反相器、转换器等通常设置在功率半导体模块中，该功率半导体模块包括至少一个功率半导体开关和反平行续流二极管(freewheelingdiode)。图1示出了作为多个实例中的一个的三相IGBT反相器，用于设置在功率半导体模块中的电子电路。驱动电路还可以集成在这些模块中，在这种情况下，这些模块称作“智能功率模块”(IPM)。
在常规功率半导体模块中，半导体芯片11在内部被组装在基板上，该基板包括绝缘板15并且金属化层16至少在绝缘板15的顶侧上，其上组装功率半导体芯片11。金属化层16能根据电路需求被构造。半导体芯片11能焊接到金属化16上使得焊料层13在功率半导体芯片11的底侧和金属化层16之间提供电和热连接。半导体芯片11的顶侧和金属化16通过接合线12连接。在普通半导体器件的情况下使用铝接合线。
在一些实施例中，在底座17上组装一个或多个基板15、16，以使得至热沉18的热传递良好。因此，绝缘板15包括在其底表面上的另一金属化层16，其通过焊料层14连接到底座17。该底座又安装到热沉上。
在其他实施例中，不同陶瓷材料(例如，Al2O3、AlN、Si3N4)可以用作绝缘板15，且通常通过DCB-、AMB-、DAB-或规则铜焊方法将铜或铝用于形成金属化层16，其中DCB代表直接铜接合，AMB代表有源金属铜焊，DAB代表直接铝接合。金属化层的厚度在从0.1mm到0.6mm的范围内，绝缘板16的陶瓷厚度从0.2mm至2mm。如果如上所述基板被焊接到底座17，则铜(或铝)金属化被施加到绝缘板16的两侧上。根据应用，金属化层16也可以是镍或镀有金的镍。如果金属化16是铝，则在焊接的情况下需要电镀。
图3示出了几个半导体器件10(如图2中所示)的实施例，这些半导体器件10组装在单个底座17上，该单个底座17用作通常情况下由塑料制成的外壳20的底盖。电源端子21和辅助端子22通常通过铜引线馈送到外壳20的顶部。在外壳20内部，端子21和22连接到设置在半导体器件10上的金属化层16中的焊垫(pad)上。至内部金属化焊垫的互连可以通过焊接、熔接、超声线接合等完成。在外壳20外部，端子通常适合于用螺丝拧紧、焊接、按压或者熔接至汇流条(bus bar)或者至印刷电路板(PCB)。
在一个实施例中，塑料外壳20可以填充有硅胶或任何其他软绝缘材料，用于保护半导体器件10不受不利环境的影响。外壳20也用作端子21和22抵抗机械应力和振动的支撑。功率电子电路经受间歇操作或者与变化负载一起的操作。这导致功耗随着时间和相关的温度循环变化。温度循环还可以由环境条件变化引起，即冷却热沉的气体或液体的温度可以在操作期间变化。由于热机械膨胀，热机械应力被引入到功率半导体芯片10的界面中，由此基板15、16和底座17使材料互连、例如线接合或焊料连接经受循环热机械负载。
目前，功率半导体模块的功率循环和温度循环能力受到焊料老化和线接合脱落的限制。线接合脱落的影响于图4和5中示出。温度循环便于微裂纹30通过接合线12沿着金属化层16的其上接合了线12的表面扩展。尤其是，向和从半导体芯片11传导高电流所需的具有在100μm到600μm范围内的直径的重接合线经受裂纹扩展和接合脱落影响。到现在为止，如果半导体模块在低于从125℃至150℃的结温度下操作，则它们能够抵抗热机械应力，以达到所希望的使用寿命。在功率电子器件的近期发展中，尤其涉及到汽车应用如混合电子车辆，需要功率半导体芯片中高达175℃或者甚至200℃的结温度。
尽管存在上述缺陷，但是具有其公知的柔性和精确度的超声线接合对于半导体芯片的顶侧接触是一项有吸引力的工艺。由于铜具有较佳的材料特性，即较低的热膨胀系数(CTE)、相对于裂纹扩展的较高的机械强度、两倍的电和热传导性，因此铜基材料用于连接半导体芯片和基板的改进的线接合。
然而，当使用铜线时，对于功率半导体应用很典型的厚线难以与半导体芯片一起使用。问题在于，与铝相比，当在有源区域上接合时，较硬的铜线会损坏在接合焊垫下方的结构。为了实现足够大的接合区域，需要将接合力从清洗和互连阶段期间的低接合力倾斜至变形阶段期间的高接合力。这导致半导体金属化层16内部的高应力，并且可能容易导致接合工具下方有源区域的损坏或者甚至损毁。利用具有较高拉伸强度的较坚固的线材料，下面的半导体结构的损坏和损毁的危险甚至会增加。
图6示出具有半导体芯片11的新颖半导体模块的实施例的一部分，该半导体芯片11包括沉积在半导体芯片11的第一表面上的厚金属层47，其中由Ti、Ti/TiN、Ta、TaN、Ta/TaN、W、Ti/W、VaTi、VTiW、VTiN、Al/Ti/W、CrNi、CrVTi或者这些材料中的其他组合制成的薄的导电且视情况而定的导热的粘附层49a可以设置于半导体芯片11和厚金属层47之间。厚金属层47足够厚且具有足够高以便芯片上的电流扩布以及散热的导电和导热性。直径从300μm至1mm的重铜线42或者最小厚度为200μm且宽度为1mm的铜带经由厚金属层47被接合到半导体芯片11。
在实施例中，芯片11在两侧上具有相同类型的厚金属层47和48，即在顶侧上用于线接合的厚金属层47和在底侧上用于利用低温结合技术焊接或烧结或者用于利用扩散焊技术熔接的另一厚金属层48。在其他实施例中，在芯片11和厚金属层48之间的另一粘附层49a能设置在芯片的底侧上。在一些实施例中，厚金属层47和48在顶部上具有薄保护层(为简单起见，未在图中具体示出)，以防止氧化或者确保焊接能力。在其他实施例中，另外或可替换地阻挡层49b可以设置在厚金属层47、48和硅本体之间，用于抑制金属从厚金属层47向硅本体中扩散。
示范性厚金属层47在每个硅本体的至少一侧上至少为10μm，而前述粘附层49a和阻挡层49b的总厚度等于或小于1μm。厚金属层可以包括导电率至少为4.4×107Ωm且导热率至少为300W/(mk)的铜或铜合金。作为铜的替换，可使用具有低于铜的热膨胀系数的基于铜的金属基体复合物。顶部和底部厚金属层一起的总厚度和硅本体厚度的比率在0.1和1之间。
新颖半导体模块的另一实施例于图6中示出。其包括具有第一和第二表面的陶瓷基板(绝缘板15)，至少在其表面之一处具有厚铜电镀46。其还包括如上所述的一个或多个半导体芯片11，其设置于基板上，其中铜线接合42连接半导体芯片11的第一厚金属层47和陶瓷基板15的厚铜金属化46。在一个实施例中，陶瓷基板15的厚度在从0.1mm到0.3mm的范围内，以及陶瓷基板15的顶侧或底侧上的铜电镀的总厚度至少为0.4mm。在一个实施例中，陶瓷基板15由高机械强度材料制成，例如具有Zr-、Y-、Er-、Nb、或Nd-添加物的Al2O3，或Si3N4。在一个实施例中，半导体芯片11能通过焊接芯片的底侧上的厚金属层48到基板而被固定到基板。
每一个包括一个或多个半导体芯片11的一个或多个陶瓷基板15被设置在底座17上，用于在一个单个的半导体模块中组合这些陶瓷基板。底座17由铜或金属基体复合物制成。在一个实施例中，底座17可以安装于热沉18上并通常用作覆盖陶瓷基板15的塑料外壳20的底盖。
图7示出了具有厚金属层47的半导体芯片11的实施例，其与图6的那些相似。仅有的区别在于，芯片安装在引线框架50上，即安装在包括用于半导体芯片的塑料封装的引线的金属框架上，而不是陶瓷基板上。该实施例更适合于分立的功率半导体。
图8、9和10示出了用于接合厚铜线的不同接合工具的实施例。使用这些接合工具，由于与线接触的工具表面具有微孔涂层的事实，可以有力地降低超声功率。这种接合工具于图8中示出，并将可再生的超声功率传送到线并因此也传送到半导体器件。用于接合带状物和线的其他可用的工具具有如图10中所示的突出结构或者如图9中所示的华夫结构(waffle-structure)。利用新颖的接合方法，在清洗阶段和初始接合阶段期间，在低接合负载(例如，最终负载的50％)下超声功率被选择为非常高(例如，最终超声功率的80％)。之后，接合力在随后的变形阶段期间在约10％的接合时间内倾斜上升。随后，超声力和功率被保持恒定。这确保与接合以下完整接合区域的鲁棒且可再生的互连。而且，有源线夹紧(clamping)系统用于确保可再生回路(loop)形成。
在一个实施例中，为了适当的接合互连，厚金属化层47应当与接合线42的材料一样硬或者稍硬于该接合线42的材料。之后，线42将不会渗入到金属化中过深，这样最小化了损伤或损坏厚金属化层46下方的阻挡层的危险。在一个实施例中，为了施加更多的电流可以施加到半导体芯片的相同区域。而且，所产生的热将通过高导热性的厚金属化层来扩散。

Claims (19)

1.一种半导体装置，包括：
具有第一表面和第二表面的硅本体，
厚金属层，其设置在所述硅本体的至少一个表面上，其中所述厚金属层的厚度至少为10微米(μm)，所述厚金属层是铜层，以及
直径从300μm至1mm的铜接合线或者最小厚度为200μm的铜带被接合到所述厚金属层。
2.如权利要求1的装置，还包括沉积在所述硅本体的所述表面的至少一个上的薄导电粘附层。
3.如权利要求1的装置，还包括在所述厚金属层和所述硅本体之间的阻挡层，用于抑制金属从所述厚金属层向所述硅本体中的扩散。
4.如权利要求3的装置，其中所述厚金属层的总厚度为20微米(μm)。
5.如权利要求2的装置，还包括在所述厚金属层和所述硅本体之间的阻挡层，其中所述粘附层和所述阻挡层的总厚度等于或小于1微米(μm)。
6.如权利要求1的装置，其中厚金属层具有至少4.4·107Ω-1·m-1的导电率。
7.如权利要求1的装置，其中厚金属层具有至少300瓦特每开每米(Wm-1K-1)的导热率。
8.如权利要求1的装置，其中所述厚金属层的总厚度和所述硅本体的厚度的比率在0.1和1之间。
9一种半导体模块，包括：
陶瓷基板，其具有第一和第二表面，所述基板至少在所述表面之一处具有由铜或其合金制成的厚金属化层；
半导体芯片，其包括具有第一表面和第二表面的硅本体，沉积于所述硅本体的所述表面的至少一个上的薄粘附层，和
沉积在所述薄粘附层上的厚金属层，用于接合厚接合线到所述厚金属层上，所述半导体芯片设置在所述基板上，所述厚金属层是铜层；和
直径从300μm至1mm的铜接合线或者最小厚度为200μm的铜带，其连接所述半导体芯片的所述厚金属层和所述陶瓷基板的所述厚金属化层，
其中所述厚金属层的厚度至少为10微米(μm)，所述厚金属化层的总厚度至少为0.4毫米(mm)。
10.如权利要求9的半导体模块，其中所述陶瓷基板的厚度在0.1毫米(mm)和0.3毫米(mm)之间。
11.如权利要求9的半导体模块，其中陶瓷基板由高机械强度的材料制成。
12.如权利要求9的半导体模块，其中陶瓷基板由具有Zr-、Y-、Er-、Nb-、或Nd-添加物的Al2O3制成或者由Si3N4制成。
13.如权利要求9的半导体模块，还包括：
多个陶瓷基板和设置在所述基板上的半导体芯片；和
底座，用于将所述多个陶瓷基板束缚在一个单个的半导体模块中，
其中所述多个陶瓷基板设置于所述底座上。
14.如权利要求13的半导体模块，其中所述底座由铜、铜合金、或金属基体复合物制成。
15.如权利要求13的半导体模块，还包括热沉，其中所述陶瓷基板设置于所述热沉上。
16.如权利要求13的半导体模块，还包括作为覆盖所述陶瓷基板的塑料壳的底部的热沉。
17.一种用于将半导体芯片上的厚金属层连接到在陶瓷基板上由铜或其合金制成的厚金属电镀的方法，包括以下步骤：
使用具有微孔涂层的接合工具将直径从300μm至1mm的铜接合线或者最小厚度为200μm的铜带接合到厚金属层和厚金属电镀，其中所述厚金属层是铜层，
其中所述厚金属层的厚度至少为10微米(μm)，所述厚金属电镀的总厚度至少为0.4毫米(mm)。
18.一种用于将半导体芯片上的厚金属层连接到在陶瓷基板上由铜或其合金制成的厚金属电镀的方法，包括以下步骤：
使用具有突出结构或华夫结构的接合工具将直径从300μm至1mm的铜接合线或者最小厚度为200μm的铜带接合到厚金属层和厚金属电镀，其中所述厚金属层是铜层，
其中所述厚金属层的厚度至少为10微米(μm)，所述厚金属电镀的总厚度至少为0.4毫米(mm)。
19.一种在半导体装置中使用金属层的方法，包括以下步骤：
提供具有第一表面和第二表面的硅本体，
在所述硅本体的至少一个表面上设置厚金属层，其中所述厚金属层的厚度至少为10微米(μm)，所述厚金属层是铜层，以及
直径从300μm至1mm的铜接合线或者最小厚度为200μm的铜带被接合到所述厚金属层。
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US20080093729A1 (en) 2008-04-24
DE102007046021B4 (de) 2012-09-13
US8164176B2 (en) 2012-04-24
CN101165884A (zh) 2008-04-23
DE102007046021A1 (de) 2008-05-21
US9196562B2 (en) 2015-11-24
US20110316160A1 (en) 2011-12-29

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