DE102010062453A1 - Halbleiterbauelement mit erhöhter Stabilität gegenüber thermomechanischen Einflüssen sowie Verfahren zur Kontaktierung eines Halbleiters - Google Patents

Halbleiterbauelement mit erhöhter Stabilität gegenüber thermomechanischen Einflüssen sowie Verfahren zur Kontaktierung eines Halbleiters Download PDF

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DE102010062453A1
DE102010062453A1 DE102010062453A DE102010062453A DE102010062453A1 DE 102010062453 A1 DE102010062453 A1 DE 102010062453A1 DE 102010062453 A DE102010062453 A DE 102010062453A DE 102010062453 A DE102010062453 A DE 102010062453A DE 102010062453 A1 DE102010062453 A1 DE 102010062453A1
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semiconductor
conductive layer
electrically conductive
wiring
semiconductor device
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DE102010062453A
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Gerhard Reber
Thomas Kaden
Michael Guenther
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Robert Bosch GmbH
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Robert Bosch GmbH
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Priority to DE102010062453A priority Critical patent/DE102010062453A1/de
Priority to PCT/EP2011/069280 priority patent/WO2012076259A1/de
Publication of DE102010062453A1 publication Critical patent/DE102010062453A1/de
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Abstract

Es wird ein Halbleiterbauelement beschrieben, bei dem die Oberfläche eines Halbleiters (11) mittels einer Verdrahtung kontaktiert ist, wobei zwischen der Oberfläche des Halbleiters (11) und der Verdrahtung eine elektrisch leitfähige Schicht angeordnet ist, deren thermischer Ausdehnungskoeffizient zwischen dem des Halbleiters (11) und dem des Materials der Verdrahtung liegt. Ferner wird ein Verfahren zur Kontaktierung eines Halbleiters (11) offenbart, bei dem auf der Oberfläche des Halbleiters (11) zumindest teilweise eine elektrisch leitfähige Schicht angeordnet wird und dass anschließend eine Verdrahtung erfolgt, wobei der thermische Ausdehnungskoeffizient der elektrisch leitfähigen Schicht zwischen dem des Halbleiters (11) und dem des Materials für die Verdrahtung liegt.

Description

  • Die vorliegende Erfindung betrifft ein Halbleiterbauelement, bei dem die Oberfläche eines Halbleiters mittels einer Verdrahtung kontaktiert ist, sowie ein Verfahren zur Kontaktierung eines Halbleiters.
  • Stand der Technik
  • Halbleiter werden für Anwendungen mit einem geringen lateralen Platzangebot direkt auf einem Schaltungsträger montiert, um eine elektrische Funktionalität abzubilden. Die Montage erfolgt üblicherweise durch Löten oder Kleben. Zur Kontaktierung der Oberfläche des Halbleiters, beispielsweise Dioden, MOSFET (metal oxide semiconductor field-effect transistor), IGBT (insulated-gate bipolar transistor), wird in der Regel die Drahtbondtechnik bzw. Bändchenbondtechnik eingesetzt. Dabei wird mittels ultraschallunterstüztem Verschweißen eine stoffschlüssige Verbindung zwischen der Oberseite des Halbleiters und einem Draht oder Bändchen, beispielsweise aus Aluminium, hergestellt. Das Ende des Drahtes bzw. Bändchens wird an einer zweiten Fügestelle wiederum mit dem Schaltungsträger verbunden, um die gleiche Verdrahtungsebene zu erreichen. Die Robustheit elektrischer Schaltungen wird durch Zuverlässigkeitstests abgeprüft. Ein typisches und lebensdauerbegrenzendes Ausfallbild hierbei ist das Versagen der Verbindungsstelle von Draht oder Bändchen und Halbleiter.
  • Das Versagen ist oftmals darin begründet, dass der thermische Ausdehnungskoeffizient von dem in der Regel verwendeten Aluminium als Draht oder Bändchen bei 23 μm/m·K und der von dem Halbleitermaterial Silizium bei ca. 2 μm/m·K liegt. Auch bei anderen Metallen, die als Bonddraht oder -Bändchen verwendet werden, wie beispielsweise Kupfer oder Gold, ist dieses Problem gegeben. Im thermomechanischen Wechselspiel tritt daher eine Zerrüttung der Fügestelle von Aluminium und Silizium auf, die eine Erhöhung des elektrischen Widerstandes zur Folge hat. Durch die lokale Widerstandserhöhung treten, insbesondere bei hohen Strömen in Leistungsschaltungen, Verlustleistungen auf, die eine lokale Temperaturerhöhung und somit eine Zerstörung der Anbindung zur Folge haben.
  • Weiterhin kommt es durch die dünne Metallisierung auf den Halbleitern zu sehr hohen Stromdichten in der Metallisierung selbst und an der Verbindungsstelle von Chipmetallisierung und Bonddraht.
  • Aus der DE 10 2009 044 641 A1 sind Einrichtungen mit einem Halbleiterchip und ein Verfahren zu deren Herstellung bekannt, bei denen die Elektroden des Halbleiterchips mit einer Metallfolie versehen sind, die als Verdrahtungsschicht fungiert. Die Metallfolie wird auf der jeweiligen Elektrode durch Löten, Kleben und/oder Sintern fixiert.
  • Offenbarung der Erfindung
  • Erfindungsgemäß wird ein Halbleiterbauelement zur Verfügung gestellt, das gegenüber dem Stand der Technik über eine erhöhte Stabilität der Verdrahtungsebene, insbesondere gegenüber thermomechanischen Einflüssen verfügt.
  • Dazu weist das erfindungsgemäße Halbleiterbauelement, bei dem die Oberfläche des Halbleiters mittels einer Verdrahtung kontaktiert ist, zwischen der Oberfläche des Halbleiters und der Verdrahtung eine elektrisch leitfähige Schicht auf, deren thermischer Ausdehnungskoeffizient zwischen dem des Halbleiters und dem Material der Verdrahtung liegt. Vorzugsweise erfolgt die Verdrahtung mittels Bondrahtes oder -bändchens.
  • Das Halbleiterbauelement besitzt einen Halbleiter, der in der Regel auf einem elektrischen Schaltungsträger, beispielsweise einem DCB-Substrat (Direct bonded copper), einem Stanzgitter oder einem PCB (Printed Circuit Board) angeordnet und kontaktiert ist, wobei eine konventionelle Fügeschicht Verwendung finden kann. Als Fügeschicht kann Lot, ein Leitkleber oder eine Sinterschicht vorgesehen sein.
  • Halbleiter in den erfindungsgemäßen Halbleiterbauteilen sind vorzugsweise Leistungshalbleiter für das Steuern und Schalten hoher elektrischer Ströme und Spannungen, beispielsweise Dioden, MOSFETs, IGBTs oder dergleichen, da vorteilhafterweise hierbei lokale Widerstandserhöhungen bei schadhaften Kontaktierungen sicher vermieden werden könnten, die ansonsten bei hohen Strömen leicht zu Ausfällen führen.
  • Auf der dem Schaltungsträger entgegengesetzten, üblicherweise als Oberseite bezeichneten Seite des Halbleiters, besteht die erfindungsgemäß ausgestaltete Kontaktierung des Halbleiters unter Verwendung einer elektrisch leitfähigen Schicht.
  • Bei der Auswahl des Materials für die elektrisch leitfähige Schicht sollte vorzugsweise beachtet werden, dass dieses eine Oberfläche besitzt, bei der herkömmliche Fügeverfahren angewendet werden können, keine sehr hohe Steifigkeit besitzt und über herkömmliche Bestückprozesse aufgebracht werden kann.
  • Die elektrisch leitfähige Schicht besteht vorzugsweise aus einer Metallfolie mit angepasstem thermischen Ausdehnungsverhalten.
  • Geeignete Metalle und deren Ausdehnungskoeffizienten sind beispielsweise:
    Silber 19,5 μm/m·K
    Kupfer 16 μm/m·K
    Gold 14,2 μm/m·K
    Nickel 13,0 μm/m·K
    Edelstahl 10,0...16,0 μm/m·K
    Molybdän 5,2 μm/m·K
  • Kupfer und Gold werden erfindungsgemäß bevorzugt.
  • Es können auch geeignete Legierungen entsprechender Metalle eingesetzt werden.
  • Um den Übergang des thermischen Ausdehnungskoeffizienten weiter abzustufen oder um beispielsweise Kupfer vor Oxidation zu schützen, kann die Metallfolie auch aus mehreren Schichten bzw. Folien aus unterschiedlichen Metallen bestehen. Es können auch MMCs (Metal Matrix Composite) zu derartigen Schichten verarbeitet sein.
  • So besteht die elektrisch leitfähige Schicht nach einer besonders bevorzugten Ausführungsform aus einer Kupferfolie, die mit einem Edelmetall, vorzugsweise Gold, oberflächenveredelt ist.
  • Die Dicke der Metallfolie bzw. der elektrisch leitfähigen Schicht ist möglichst dünn zu wählen, wobei es bevorzugt ist, dass die Dicke der Metallfolie in etwa der Dicke des verwendeten Halbleiters entspricht, um vorteilhafterweise möglichst geringe Kräfte auf den Halbleiter einzuprägen.
  • Die Metallfolie bzw. die elektrisch leitfähige Schicht sollte vorzugsweise gratfrei sein bzw. einen Grat auf der dem Halbleiter abgewandten Seite haben. Dies wird durch Wahl einer geeigneten Herstellungsmethode für die elektrisch leitfähige Schicht gewährleistet.
  • Die Dimension dieser Metallfolie bzw. der elektrisch leitfähigen Schicht sollte etwas kleiner als die des Halbleiters gewählt sein, jedoch die aktiven Bereiche zumindest teilweise abdecken. Dadurch kann die Metallfolie vorteilhafterweise durch konventionelle Bestückprozesse auf dem Halbleiter abgesetzt werden.
  • Nach einer bevorzugten Ausführungsform der Erfindung kann zusätzliches Fügematerial bzw. eine Fügeschicht zwischen Halbleiter und leitfähiger Schicht bzw. Metallfolie vorgesehen sein. Als Fügeschicht kann Lot, ein Leitkleber oder eine Sinterschicht verwendet werden, wobei die Oberfläche der Metallfolie nach den Erfordernissen der Fügeprozesse beschichtet sein kann.
  • Die elektrisch leitfähige Schicht ist durch konventionelle Verbindungstechniken und Materialien zur Verdrahtung auf die gleiche oder eine alternative Schaltungsträgerebene kontaktiert, beispielsweise durch Drahtbonden, Bändchenbonden oder Aufkleben, Auflöten, Aufbonden eines Metallbandes oder eines Metallgeflechtes, wobei Drahtbonden oder Bändchenbonden bevorzugt ist. Materialien zur Verdrahtung sind üblicherweise metallisch.
  • Hat der Halbleiter zusätzlich zum Leistungsanschluss einen zusätzlichen Logikanschluss auf der Oberfläche, kann die Metallfolie kleiner gewählt werden, beispielsweise bei einem Gateanschluss am Rand des Halbleiters, oder ein Loch aufweisen, beispielsweise wenn der Gateanschluss in der Mitte des Halbleiters angeordnet ist.
  • Auch kann die Metallfolie einen oder mehrere Kontakte, beispielsweise in Form einer Verlängerung aufweisen, bei der beispielsweise ein Messstrom abgegriffen oder der Laststrom auf andere Art weiter kontaktiert werden kann.
  • Vorteilhafterweise werden bei den erfindungsgemäßen Halbleiterbauteilen mechanische Kräfte auf einen größeren Bereich und auf zwei Fügestellen verteilt, wodurch eine deutlich erhöhte Stabilität der Kontakte gewährleistet ist. Diese ist natürlich auch durch die angepassten Ausdehnungskoeffizienten gegeben. Gleichzeitig wird vorteilhafterweise die Verteilung des eingeprägten Stromes auf eine größere Fläche auf dem Halbleiterbauelement bewirkt.
  • Erfindungsgemäß wird auch ein Verfahren zur Kontaktierung eines Halbleiters, vorzugsweise durch Drahtbonden oder Bändchenboden beansprucht, bei dem vor dem Verdrahten zwischen der Oberfläche des Halbleiters und dem Bondraht oder -bändchen eine elektrisch leitfähige Schicht, vorzugsweise eine Metallfolie angeordnet wird, deren thermischer Ausdehnungskoeffizient zwischen dem des Halbleiters und dem des Bonddrahtes oder -bändchens liegt.
  • Der Halbleiter wird üblicherweise auf einem Schaltungsträger angeordnet, wobei zwischen dem Halbleiter und dem Schaltungsträger Fügematerial angeordnet und/oder eine Fügeschicht ausgebildet werden kann.
  • Nach einer bevorzugten Ausführungsform des Verfahrens wird zwischen der elektrisch leitfähigen Schicht und dem Halbleiter Fügematerial angeordnet und/oder eine Fügeschicht ausgebildet.
  • Ansonsten betreffen die Ausführungen zu dem erfindungsgemäßen Halbleiterbauteil auch das Verfahren.
  • Vorteilhafte Weiterbildungen der Erfindung sind in den Unteransprüchen angegeben und in der Beschreibung beschrieben.
  • Zeichnungen
  • Ein Ausführungsbeispiel der Erfindung wird anhand einer Zeichnung und der nachfolgenden Beschreibung näher erläutert. Es zeigt:
  • 1 in einer Seitenansicht ein Detail eines erfindungsgemäßen Halbleiterbauteils.
  • 1 offenbart einen auf einem Schaltungsträger 10 angeordneten Halbleiter 11, der teilweise von einer Metallfolie 12 bedeckt ist. Zwischen dem Schaltungsträger 10 und dem Halbleiter 11 ist eine Fügeschicht 13 vorgesehen, durch die der Halbleiter 11 fixiert bzw. mit dem Schaltungsträger 10 kontaktiert ist. Ebenso befindet sich zwischen dem Halbleiter 11 und der Metallfolie 12 eine weitere Fügeschicht 14 zur elektrisch leitenden Fixierung der Metallfolie 12 auf dem Halbleiter 11. Eine Verdrahtung mit dem Schaltungsträger 10 auf der dem Schaltungsträger 10 abgewandten Seite des Halbleiters 11 ist durch einen Bonddraht 15 gegeben, der die Metallfolie 12 mit dem Schaltungsträger 10 elektrisch leitend verbindet.
  • ZITATE ENTHALTEN IN DER BESCHREIBUNG
  • Diese Liste der vom Anmelder aufgeführten Dokumente wurde automatisiert erzeugt und ist ausschließlich zur besseren Information des Lesers aufgenommen. Die Liste ist nicht Bestandteil der deutschen Patent- bzw. Gebrauchsmusteranmeldung. Das DPMA übernimmt keinerlei Haftung für etwaige Fehler oder Auslassungen.
  • Zitierte Patentliteratur
    • DE 102009044641 A1 [0005]

Claims (12)

  1. Ein Halbleiterbauelement, bei dem die Oberfläche eines Halbleiters (11) mittels einer Verdrahtung kontaktiert ist, dadurch gekennzeichnet, dass zwischen der Oberfläche (11) des Halbleiters und der Verdrahtung eine elektrisch leitfähige Schicht angeordnet ist, deren thermischer Ausdehnungskoeffizient zwischen dem des Halbleiters (11) und dem des Materials der Verdrahtung liegt.
  2. Das Halbleiterbauelement nach Anspruch 1, wobei die Verdrahtung aus Bonddraht (15) oder -bändchen besteht.
  3. Das Halbleiterbauelement nach Anspruch 1 oder 2, wobei die elektrisch leitfähige Schicht eine Metallfolie (12) ist oder aus zumindest zwei nebeneinander angeordneten Metallfolien besteht.
  4. Das Halbleiterbauelement nach einem der Ansprüche 1 bis 3, wobei die elektrisch leitfähige Schicht aus mehreren Schichten besteht.
  5. Das Halbleiterbauelement nach einem der Ansprüche 1 bis 4, wobei zwischen Halbleiter (11) und leitfähiger Schicht eine Fügeschicht (14) befindlich ist.
  6. Das Halbleiterbauelement nach einem der Ansprüche 1 bis 5, wobei die elektrisch leitfähige Schicht zumindest einen Teil der aktiven Bereiche des Halbleiters (11) abdeckt.
  7. Das Halbleiterbauelement nach einem der Ansprüche 1 bis 6, wobei die elektrisch leitfähige Schicht einen oder mehrere zusätzlichen Kontakte aufweist.
  8. Ein Verfahren zur Kontaktierung eines Halbleiters (11), dadurch gekennzeichnet, dass auf der Oberfläche des Halbleiters (11) zumindest teilweise eine elektrisch leitfähige Schicht angeordnet wird und dass anschließend eine Verdrahtung erfolgt, wobei der thermische Ausdehnungskoeffizient der elektrisch leitfähigen Schicht zwischen dem des Halbleiters (11) und dem des Materials für die Verdrahtung liegt.
  9. Das Verfahren nach Anspruch 8, wobei die Verdrahtung mittels Drahtbonden oder Bändchenbonden erfolgt.
  10. Das Verfahren nach Anspruch 8 oder 9, wobei als elektrisch leitfähige Schicht eine Metallfolie (12) verwendet wird.
  11. Das Verfahren nach einem der Ansprüche 8 bis 10, wobei der Halbleiter (11) auf einem Schaltungsträger (10) angeordnet wird und wobei zwischen dem Halbleiter (11) und dem Schaltungsträger (10) Fügematerial angeordnet und/oder eine Fügeschicht (14) ausgebildet wird.
  12. Das Verfahren nach einem der Ansprüche 8 bis 11, wobei zwischen der elektrisch leitfähigen Schicht und dem Halbleiter (11) Fügematerial angeordnet und/oder eine Fügeschicht (14) ausgebildet wird.
DE102010062453A 2010-12-06 2010-12-06 Halbleiterbauelement mit erhöhter Stabilität gegenüber thermomechanischen Einflüssen sowie Verfahren zur Kontaktierung eines Halbleiters Ceased DE102010062453A1 (de)

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PCT/EP2011/069280 WO2012076259A1 (de) 2010-12-06 2011-11-03 Halbleiterbauelement mit erhöhter stabilität gegenüber thermomechanischen einflüssen sowie verfahren zur kontaktierung eines halbleiters

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US6384486B2 (en) * 1998-12-15 2002-05-07 Texas Instruments Incorporated Bonding over integrated circuits
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