CN100435373C - 半导体存储器件及其制造方法 - Google Patents
半导体存储器件及其制造方法 Download PDFInfo
- Publication number
- CN100435373C CN100435373C CNB2004100343559A CN200410034355A CN100435373C CN 100435373 C CN100435373 C CN 100435373C CN B2004100343559 A CNB2004100343559 A CN B2004100343559A CN 200410034355 A CN200410034355 A CN 200410034355A CN 100435373 C CN100435373 C CN 100435373C
- Authority
- CN
- China
- Prior art keywords
- interlayer insulating
- insulating film
- layer
- film
- hole
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
- 239000004065 semiconductor Substances 0.000 title claims abstract description 36
- 238000004519 manufacturing process Methods 0.000 title claims abstract description 9
- 150000004770 chalcogenides Chemical class 0.000 claims abstract description 59
- 238000010438 heat treatment Methods 0.000 claims abstract description 58
- 239000000463 material Substances 0.000 claims abstract description 47
- 238000000034 method Methods 0.000 claims abstract description 23
- 230000003647 oxidation Effects 0.000 claims abstract description 20
- 238000007254 oxidation reaction Methods 0.000 claims abstract description 20
- 229910052751 metal Inorganic materials 0.000 claims abstract description 18
- 239000002184 metal Substances 0.000 claims abstract description 18
- 230000008569 process Effects 0.000 claims abstract description 12
- 239000010410 layer Substances 0.000 claims description 101
- 239000011229 interlayer Substances 0.000 claims description 55
- 229910010037 TiAlN Inorganic materials 0.000 claims description 45
- 238000003860 storage Methods 0.000 claims description 42
- 238000009413 insulation Methods 0.000 claims description 10
- QVGXLLKOCUKJST-UHFFFAOYSA-N atomic oxygen Chemical compound [O] QVGXLLKOCUKJST-UHFFFAOYSA-N 0.000 claims description 9
- 238000001465 metallisation Methods 0.000 claims description 9
- 229910052760 oxygen Inorganic materials 0.000 claims description 9
- 239000001301 oxygen Substances 0.000 claims description 9
- 238000000151 deposition Methods 0.000 claims description 8
- 239000000758 substrate Substances 0.000 claims description 7
- 238000005530 etching Methods 0.000 claims description 6
- WFKWXMTUELFFGS-UHFFFAOYSA-N tungsten Chemical compound [W] WFKWXMTUELFFGS-UHFFFAOYSA-N 0.000 claims description 6
- 229910052721 tungsten Inorganic materials 0.000 claims description 6
- 239000010937 tungsten Substances 0.000 claims description 6
- 230000008021 deposition Effects 0.000 claims description 4
- 238000005137 deposition process Methods 0.000 claims description 3
- 230000007704 transition Effects 0.000 claims description 3
- 238000005516 engineering process Methods 0.000 description 5
- 230000000694 effects Effects 0.000 description 4
- 239000002243 precursor Substances 0.000 description 4
- 239000004020 conductor Substances 0.000 description 3
- 230000009466 transformation Effects 0.000 description 3
- 229910005936 Ge—Sb Inorganic materials 0.000 description 2
- 230000004888 barrier function Effects 0.000 description 2
- 230000008901 benefit Effects 0.000 description 2
- 238000001816 cooling Methods 0.000 description 2
- 238000005485 electric heating Methods 0.000 description 2
- 239000012782 phase change material Substances 0.000 description 2
- 238000007634 remodeling Methods 0.000 description 2
- 229910004298 SiO 2 Inorganic materials 0.000 description 1
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 1
- 229910010038 TiAl Inorganic materials 0.000 description 1
- 229910052787 antimony Inorganic materials 0.000 description 1
- 230000015572 biosynthetic process Effects 0.000 description 1
- 239000003990 capacitor Substances 0.000 description 1
- 239000000470 constituent Substances 0.000 description 1
- 239000013078 crystal Substances 0.000 description 1
- 238000009792 diffusion process Methods 0.000 description 1
- 230000006870 function Effects 0.000 description 1
- 229910052732 germanium Inorganic materials 0.000 description 1
- GNPVGFCGXDBREM-UHFFFAOYSA-N germanium atom Chemical compound [Ge] GNPVGFCGXDBREM-UHFFFAOYSA-N 0.000 description 1
- 238000002955 isolation Methods 0.000 description 1
- 238000005498 polishing Methods 0.000 description 1
- 229910021420 polycrystalline silicon Inorganic materials 0.000 description 1
- 229920005591 polysilicon Polymers 0.000 description 1
- 230000036632 reaction speed Effects 0.000 description 1
- 229910052710 silicon Inorganic materials 0.000 description 1
- 239000010703 silicon Substances 0.000 description 1
- 125000006850 spacer group Chemical group 0.000 description 1
- 238000000992 sputter etching Methods 0.000 description 1
- 229910052714 tellurium Inorganic materials 0.000 description 1
- 238000001039 wet etching Methods 0.000 description 1
Images
Classifications
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10N70/00—Solid-state devices having no potential barriers, and specially adapted for rectifying, amplifying, oscillating or switching
- H10N70/20—Multistable switching devices, e.g. memristors
- H10N70/231—Multistable switching devices, e.g. memristors based on solid-state phase change, e.g. between amorphous and crystalline phases, Ovshinsky effect
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10B—ELECTRONIC MEMORY DEVICES
- H10B63/00—Resistance change memory devices, e.g. resistive RAM [ReRAM] devices
- H10B63/30—Resistance change memory devices, e.g. resistive RAM [ReRAM] devices comprising selection components having three or more electrodes, e.g. transistors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/04—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body
- H01L27/10—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a repetitive configuration
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10N70/00—Solid-state devices having no potential barriers, and specially adapted for rectifying, amplifying, oscillating or switching
- H10N70/011—Manufacture or treatment of multistable switching devices
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10N70/00—Solid-state devices having no potential barriers, and specially adapted for rectifying, amplifying, oscillating or switching
- H10N70/801—Constructional details of multistable switching devices
- H10N70/821—Device geometry
- H10N70/826—Device geometry adapted for essentially vertical current flow, e.g. sandwich or pillar type devices
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10N70/00—Solid-state devices having no potential barriers, and specially adapted for rectifying, amplifying, oscillating or switching
- H10N70/801—Constructional details of multistable switching devices
- H10N70/841—Electrodes
- H10N70/8413—Electrodes adapted for resistive heating
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10N70/00—Solid-state devices having no potential barriers, and specially adapted for rectifying, amplifying, oscillating or switching
- H10N70/801—Constructional details of multistable switching devices
- H10N70/881—Switching materials
- H10N70/882—Compounds of sulfur, selenium or tellurium, e.g. chalcogenides
- H10N70/8828—Tellurides, e.g. GeSbTe
Landscapes
- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Manufacturing & Machinery (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Semiconductor Memories (AREA)
Abstract
本发明公开了一种半导体存储器件及其制造方法。该半导体存储器件包括置于一晶体管与一数据存储部分之间的一加热部分、以及与该数据存储部分相连接的一金属互连层。数据存储部分包括一硫属化物材料层,该材料层经历因加热部分的加热导致的相变,以将数据存储到其中。该加热材料层被设置在硫属化物材料层的下方,且利用等离子氧化工艺对该加热材料层的顶面执行氧化,以提高电阻值。因而,利用很小的电流就能向硫属化物材料层输送其所必需的热量,从而可进一步降低该半导体存储器件所消耗的电流。
Description
技术领域
本发明涉及一种半导体存储器件及其制造方法,更具体而言,本发明涉及这样一种半导体存储器件及其制造方法,该半导体存储器件包括用于加热相变材料制成的贮存/存储节点(storage/memory node)的改进的加热单元。
背景技术
奥弗辛斯基效应统一存储器(ovonic unified mermory)(OUM)利用相变材料作为其数据存储部分,而并非普通动态随机存取存储器(DRAM)中的电容器。OUM是这样一种存储器件:其基于电阻随硫属化物(chalcogenide)材料的相变而改变的原理来写入/再现信息。硫属化物材料已经被应用到可重写CD、DVD等中。当硫属化物材料从晶态转变为非晶态时,该硫属化物材料的电阻大约增大100倍。硫属化物材料经历作为加热温度和冷却时间的函数的相变。因此,当硫属化物材料处于晶态时,其电阻低,从而用作导电材料。但是,当硫属化物材料处于非晶态时,其具有高电阻,从而作为电阻材料。
图1是一示意性剖视图,示出美国专利第6,294,452号公开的OUM。
参见图1,在基底100上形成一下电极102,以具有一尖端部分114。在下电极102的尖端部分114上沉积硫属化物材料层128和上电极122。在硫属化物材料层128与下电极120之间置入一导电阻挡层120,以阻止硫属化物材料层128与下电极102之间的扩散。上电极122被连接到格栅互连层126上,以从外界接收电能。此处,附图标记116、124代表绝缘层。
该硫属化物材料由三元相系统(three-phase system)形成,即锗(Ge)-碲(Te)-锑(Sb)。在向硫属化物材料施加预定的电流之后,硫属化物材料会按照其所获得的热量而转变为非晶态,然后其电阻根据冷却时间而变。这也就是说,当硫属化物材料的原子在非晶态下被缓慢地冷却,则它们成为晶体,并具有导电材料的作用。但是,如果原子被快速冷却,则它们成为非晶的,并表现出高电阻。这样的电阻改变可被表达为二进制代码,并起存储元件的作用。
因而,可利用相变在OUM选定单元中写入二进制代码“1”或“0”。另外,通过读取可编程区的电阻,能读出已写入的二进制代码“1”或“0”。
OUM的优势在于:尽管其经过很多次读取,也不会发生损伤;只需要非常低的工作电压;且与现有设计环境具有很高的兼容性。另外,由于OUM大约可被使用十亿次,所以其能容易地取代现有的大容量存储器。
但是,为了在上述的OUM结构中将硫属化物材料层128转变成非晶态,应当将硫属化物材料层128加热到高于600℃。因而,应当向下电极102施加大量电流。
发明内容
本发明提供了一种半导体存储器件,其通过在硫属化物材料层的下方设置加热单元、并利用小电流对所述加热单元进行加热能使硫属化物材料转变,本发明还提供了一种制造该存储器件的方法。
根据本发明的一个方面,提供一种半导体存储器件,其包括一晶体管和一数据存储部分,该存储器件包括:一加热部分,其置于晶体管与数据存储部分之间;以及一金属互连层,其与数据存储部分相连,其中数据存储部分包括一硫属化物材料层,该材料层因加热部分的加热而发生相变,从而将数据存储在其中,以及该加热部分包括:一通孔(via hole),其暴露部分晶体管;一隔离壁(spacer),其形成在通孔内壁上;以及一加热材料层,其填充在隔离壁中。
该加热部分可通过一导电插塞与晶体管相连。隔离壁的下部可大于其上部。可以用钨制造所述导电插塞。该加热材料层可用TiAlN制成。加热部分的顶面可被氧化。
该半导体存储器件还可包括一TiAlN薄膜,其被置于数据存储部分和金属互连层之间,其中TiAlN薄膜的顶面被氧化。
根据本发明的另一方面,提供一种制造半导体存储器件的方法,包括:(a)在一基底上形成一晶体管;(b)在基底上形成一第一层间绝缘层,以覆盖晶体管;(c)在第一层间绝缘层中形成一接触孔,以暴露晶体管的预定区域;(d)在接触孔中形成一导电插塞;(e)在第一层间绝缘层上形成一第二层间绝缘层;(f)在第二层间绝缘层中形成一加热部分;(g)在加热部分上形成一硫属化物材料层;以及(h)在硫属化物材料层上形成一金属互连层,其中步骤(f)包括:在第二层间绝缘层中形成一通孔,以露出导电插塞;在第二层间绝缘层上形成一绝缘薄膜,以覆盖通孔的内壁;通过对绝缘薄膜进行蚀刻直到露出第二层间绝缘层为止,而在通孔中形成一隔离壁;以及在隔离壁内形成一加热材料层。
形成加热材料层的步骤可包括:在第二层间绝缘层上形成一TiAlN薄膜,填充隔离壁;以及平坦化(flatten)该TiAlN薄膜,露出第二层间绝缘层。
可利用原子层沉积工艺形成TiAlN薄膜。平坦化的TiAlN薄膜的顶面可被氧化。可利用等离子氧化工艺对平坦化的TiAlN薄膜的顶面执行氧化。
步骤(h)可包括:在第二层间绝缘层上形成一第三层间绝缘层,以覆盖硫属化物材料层;以露出硫属化物材料的方式在第三层间绝缘层中形成一通孔;在第三层间绝缘层上沉积一TiAlN薄膜,以覆盖暴露的硫属化物材料层;对TiAlN薄膜的顶面执行氧化;以及在氧化后的TiAlN薄膜上形成一金属互连层,以填充所述通孔。
附图说明
从下文参照附图对示例性实施方式所作的详细描述,可更加清楚地领会本发明上述、以及其它特征和优点,附图中:
图1是美国专利第6,294,452号中公开的奥弗辛斯基效应统一存储器的示意性剖视图;
图2是根据本发明一优选实施方式的半导体存储器件的剖视图;
图3是曲线图,示出当利用原子层沉积工艺形成TiAlN层时,TiAlN的根据温度和氧化而变的电阻;
图4是根据本发明另一优选实施方式的半导体器件的剖视图,其是图2所示半导体存储器件的改型;以及
图5A到图5I是示出制造图4所示半导体存储器件的方法的剖视图。
具体实施方式
下面将参照附图对本发明作更为全面的描述,附图示出了本发明的优选实施方式。
图2是根据本发明一优选实施方式的半导体存储器件的剖视图。
参见图2,该半导体存储器件包括开关晶体管20、数据存储部分40、以及加热部分30,该加热部分加热数据存储部分40。晶体管20包括源极区11和漏极区12,源极区11和漏极区12是形成在p型硅基底(siliconesubstrate)上彼此隔开的n型(n+)层。栅极绝缘薄膜21和栅电极22形成在源极区11和漏极区12之间的基底10上。
数据存储部分40由硫属化物材料层形成,且传输外部信号的金属互连层50形成在硫属化物材料层上。硫属化物材料层40由三元相系统Te-Ge-Sb形成。
加热部分30是本发明的特征所在,其被制在硫属化物材料层40的下方。加热部分30通过导电插塞24与晶体管20相连接。导电插塞24被制在一接触孔内,该接触孔被制在第一层间绝缘层23中,第一层间绝缘层23被制在基底10上以覆盖晶体管20。由于导电插塞24经由源极区11接收电流,并将电流输送给加热部分30,所以优选地用低电阻的钨制造导电插塞24。
加热部分30被制在通孔32a中,该通孔32a被制在一第二层间绝缘层32中,该第二层间绝缘层沉积在第一层间绝缘层23上。在通孔30的内壁上制有隔离壁34。在隔离壁34内制有加热材料层36,其例如由氮化铝钛(TiAlN)制成。优选的是,利用一等离子氧化工艺对TiAlN层36的顶面进行氧化,从而形成预定的氧化物薄膜38,使得TiAlN层36的上部具有高电阻,而TiAlN层36的下部具有高电导率。
金属互连层50经过通孔42a与硫属化物材料层40相连,其中的通孔42a被制在第三层间绝缘层42中,第三层间绝缘层被制在第二层间绝缘层32之上。
附图标记31指代SiN薄膜,当通过对SiO2制成的第二层间绝缘层32执行湿蚀刻而形成通孔32a时,薄膜31可起到蚀刻阻挡层的作用。
图3是曲线图,示出当利用原子层沉积(ALD)工艺形成TiAlN层时,TiAlN的根据温度和氧化而变的电阻。
参见图3,当作为Ti的前体(precursor)的TiCl4与作为Al的前体的Al(CH3)3相互发生反应时,两前体间的反应速度根据沉积温度而变,从而TiAl的成分出现改变。接着,NH3被吸附且氮化,从而形成TiAlN层。另外,随着TiAlN层成分改变,TiAlN层的电阻值发生变化。与此同时,由于利用等离子氧化工艺对TiAlN层的顶面进行了氧化,所以TiAlN层的电阻值急剧地增大100倍左右。
下面将参照附图对上述存储单元的工作过程进行详细描述。
例如,当向晶体管20的栅电极22施加电压时,晶体管20导通,使得电流在源极区11与漏极区12之间流动。相应地,电流经导电插塞24和加热材料层36而流入硫属化物材料层40中。此时,由于在加热材料层36下部电流密度增大,所以能容易地实现预热。由于加热材料层36的上部处发热量(heating value)很大,所以加热材料层36能将大量的热传递给硫属化物材料层40。此时,根据加热材料层36的发热量,硫属化物材料层40被转变为非晶态或晶态。也就是说,当晶体管20的导通时间长时,硫属化物材料层40转变成晶态,因而作为导电材料。相反,当晶体管的导通时间短时,硫属化物材料层40转变为非晶态,因而作为电阻材料。
因此,利用相变过程,选择晶体管20和金属互连层50的存储单元,以写入数据“1”或“0”。另外,通过读取硫属化物材料层40的电阻可读出已写入的数据“1”或“0”。
图4是根据本发明另一优选实施方式的半导体器件的剖视图,其是图2所示半导体存储器件的改型。图4中相同的附图标记表示与图2相同的元件,且将略去对这些元件的详细描述。
参见图4,以覆盖通孔42a的方式在第三层间绝缘层42上形成TiAlN薄膜51。利用等离子氧化工艺对TiAlN薄膜51的顶面进行氧化,使得防止了从硫属化物材料层40到金属互连层50传递的电热(electric heat)。
图5A到图5I是示出制造图4所示半导体存储器件的方法的剖视图。
首先,如图5A所示,利用半导体领域公知的方法在半导体基底10上形成晶体管20。然后,在半导体基底10上形成第一层间绝缘层23。选择性地蚀刻第一层间绝缘层23,从而形成露出晶体管20的源极区11的接触孔23a。将导电插塞24填入到接触孔23a中,以使其与源极区11相连接。此处,导电插塞24由多晶硅或钨制成,优选用低电阻的钨制成。
然后,如图5B所示,在第一层间绝缘层23上依次沉积SiN制成的绝缘薄膜31、以及第二层间绝缘层32,该绝缘薄膜31覆盖导电插塞24。选择性地蚀刻绝缘层31和第二层间绝缘层32,从而形成露出导电插塞24的通孔32a。
而后,如图5C所示,在第二层间绝缘层32上形成例如由SiN制成的绝缘薄膜33,从而覆盖通孔32a的内壁。
然后,如图5D所示,对绝缘薄膜33执行离子蚀刻,直到第二层间绝缘层32从绝缘薄膜33的顶部露出为止。利用离子蚀刻工艺对形成在通孔32a内壁上的绝缘薄膜33执行蚀刻,从而形成底部大且顶部小的隔离壁34。
然后,如图5E所示,利用ALD工艺在第二层间绝缘层32上沉积TiAlN薄膜35,从而填充通孔32a中的隔离壁34。此处,使用ALD工艺沉积TiAlN薄膜35的原因在于:通过调整沉积温度可对TiAlN的组成成分进行控制,进而能如图3所示那样对其电阻进行控制。
之后,如图5F所示,利用化学机械抛光(CMP)平坦化TiAlN薄膜35,从而暴露出第二层间绝缘层32,并由此形成加热材料层36。利用等离子氧化工艺对加热材料层36的顶面执行氧化,从而形成氧化物薄膜38。如图3所示,其上形成氧化物薄膜38的加热材料层36的电阻急剧增大。结果就是,尽管所通过的电流不变,但发热量却增大了。
而后,如图5G所示,在第二层间绝缘层32和加热材料层36上溅镀三元相系统Te-Ge-Sb,从而形成硫属化物薄膜。然后,构图硫属化物薄膜,从而在加热材料层36上形成硫属化物材料层40。
之后,还如图5G所示那样,在第二层间绝缘层32上形成第三层间绝缘层42,以覆盖硫属化物材料层40。然后,为了露出硫属化物材料层40,在第三层间绝缘层42中形成通孔42a。
然后,如图5H所示,利用ALD工艺在第三层间绝缘层42上沉积TiAlN薄膜51,从而覆盖通孔42a。然后,利用等离子氧化工艺对TiAlN薄膜51的顶面执行氧化。氧化后的TiAlN薄膜51防止了电热从硫属化物材料40传递到金属互连层50中,下文将对金属互连层50进行介绍。
而后,如图5I所示,在TiAlN薄膜51上形成金属互连层50,其用TiAlN或钨制成。金属互连层50被制成格栅状(shape of a grid),从而向硫属化物材料层40传输外部信号,该硫属化物材料层40为所选定存储单元的数据存储部分。
如上所述,在根据本发明的半导体存储器件中,加热材料层被布置在硫属化物材料层的下方,且利用等离子氧化工艺对加热材料层的顶面执行氧化,以增大电阻值。因而,利用小的电流就能向硫属化物材料层输送其所必需的热量,从而可减小该半导体存储器件所用的电流。
尽管已经结合示例性的实施方式对本发明作了特定的表示和描述,但本领域普通技术人员可以领会,在不悖离由所附权利要求书所限定的本发明的设计思想和保护范围的前提下,可对本发明的具体形式和细节进行各种改动。
Claims (14)
1、一种半导体存储器件,其包括一晶体管和一数据存储部分,该半导体存储器件包括:
一加热部分,其被置于该晶体管与该数据存储部分之间;以及
一金属互连层,其与该数据存储部分相连接,
其中,该数据存储部分包括一硫属化物材料层,该硫属化物材料层由于该加热部分的加热而发生相变,从而在其中存储数据,以及
该加热部分包括:
一通孔,其暴露部分该晶体管;
一隔离壁,其形成在该通孔的内壁上;以及
一加热材料层,其填充该隔离壁,
其中,该加热材料层的顶面通过等离子氧化工艺得以氧化。
2、根据权利要求1所述的半导体存储器件,其中该隔离壁的下部大于其上部。
3、根据权利要求1所述的半导体存储器件,其中该加热材料层由TiAlN制成。
4、根据权利要求1所述的半导体存储器件,其中该加热部分通过一导电插塞与该晶体管相连接。
5、根据权利要求4所述的半导体存储器件,其中该导电插塞由钨制成。
6、根据权利要求4所述的半导体存储器件,其中该加热部分包括:
一通孔,其将该导电插塞外露;
一隔离壁,其形成在该通孔的内壁上;以及
一加热材料层,其填充该隔离壁。
7、根据权利要求6所述的半导体存储器件,其中该加热材料层由TiAlN制成。
8、根据权利要求1所述的半导体存储器件,还包括一TiAlN薄膜,其被置于该数据存储部分和该金属互连层之间,其中该TiAlN薄膜的顶面得以氧化。
9、一种制造半导体存储器件的方法,包括:
(a)在一基底上形成一晶体管;
(b)在该基底上形成一第一层间绝缘层,从而覆盖该晶体管;
(c)在该第一层间绝缘层中形成一接触孔,暴露出该晶体管的预定区域;
(d)在该接触孔中形成导电插塞;
(e)在该第一层间绝缘层上形成一第二层间绝缘层;
(f)在该第二层间绝缘层中形成一加热部分;
(g)在该加热部分上形成一硫属化物材料层;以及
(h)在该硫属化物材料层上形成一金属互连层,
其中步骤(f)包括:
在该第二层间绝缘层中形成一通孔,露出该导电插塞;
在该第二层间绝缘层上形成一绝缘薄膜,从而覆盖该通孔的内壁;
通过蚀刻该绝缘薄膜直到露出该第二层间绝缘层为止,在该通孔中形成隔离壁;
在该隔离壁内形成加热材料层;以及
通过等离子氧化工艺氧化该加热材料层的顶面。
10、根据权利要求9所述的方法,其中形成该加热材料层的步骤包括:
在该第二层间绝缘层上形成一TiAlN薄膜,以填充该隔离壁;以及
平坦化该TiAlN薄膜,露出该第二层间绝缘层。
11、根据权利要求10所述的方法,其中利用原子层沉积工艺形成所述TiAlN薄膜。
12、根据权利要求9所述的方法,其中步骤(h)包括:
在该第二层间绝缘层上形成一第三层间绝缘层,从而覆盖该硫属化物材料层;
在该第三层间绝缘层中形成一通孔,露出该硫属化物材料层;以及
在该第三层间绝缘层上形成一金属互连层,以填充该通孔。
13、根据权利要求9所述的方法,其中步骤(h)包括:
在该第二层间绝缘层上形成一第三层间绝缘层,从而覆盖该硫属化物材料层;
在该第三层间绝缘层中形成一通孔,露出该硫属化物材料层;
在该第三层间绝缘层上沉积一TiAlN薄膜,从而覆盖该露出的硫属化物材料层;
氧化该TiAlN薄膜的顶面;以及
在该氧化过的TiAlN薄膜上形成一金属互连层,从而填充所述通孔。
14、根据权利要求13所述的方法,其中氧化该TiAlN薄膜的该顶面的步骤采用等离子氧化工艺进行。
Applications Claiming Priority (3)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
KR32882/03 | 2003-05-23 | ||
KR32882/2003 | 2003-05-23 | ||
KR1020030032882A KR100979710B1 (ko) | 2003-05-23 | 2003-05-23 | 반도체 메모리 소자 및 제조방법 |
Publications (2)
Publication Number | Publication Date |
---|---|
CN1574410A CN1574410A (zh) | 2005-02-02 |
CN100435373C true CN100435373C (zh) | 2008-11-19 |
Family
ID=33095679
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CNB2004100343559A Expired - Fee Related CN100435373C (zh) | 2003-05-23 | 2004-04-12 | 半导体存储器件及其制造方法 |
Country Status (6)
Country | Link |
---|---|
US (2) | US7164147B2 (zh) |
EP (1) | EP1480273B1 (zh) |
JP (1) | JP4813027B2 (zh) |
KR (1) | KR100979710B1 (zh) |
CN (1) | CN100435373C (zh) |
DE (1) | DE602004013489D1 (zh) |
Families Citing this family (146)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US7893419B2 (en) * | 2003-08-04 | 2011-02-22 | Intel Corporation | Processing phase change material to improve programming speed |
KR100629265B1 (ko) * | 2004-08-04 | 2006-09-29 | 삼성전자주식회사 | 국부적인 고저항영역을 구비하는 도전층 형성방법 및 이를사용하여 제조된 반도체 소자 |
TW200620473A (en) * | 2004-09-08 | 2006-06-16 | Renesas Tech Corp | Nonvolatile memory device |
KR100738070B1 (ko) * | 2004-11-06 | 2007-07-12 | 삼성전자주식회사 | 한 개의 저항체와 한 개의 트랜지스터를 지닌 비휘발성메모리 소자 |
CN100461482C (zh) * | 2004-11-17 | 2009-02-11 | 株式会社东芝 | 开关元件、线路转换设备和逻辑电路 |
JP4783045B2 (ja) * | 2004-11-17 | 2011-09-28 | 株式会社東芝 | スイッチング素子 |
KR100827653B1 (ko) * | 2004-12-06 | 2008-05-07 | 삼성전자주식회사 | 상변화 기억 셀들 및 그 제조방법들 |
DE102004059428A1 (de) | 2004-12-09 | 2006-06-22 | Infineon Technologies Ag | Herstellungsverfahren für eine mikroelektronische Elektrodenstruktur, insbesondere für ein PCM-Speicherelement, und entsprechende mikroelektronische Elektrodenstruktur |
KR100618879B1 (ko) | 2004-12-27 | 2006-09-01 | 삼성전자주식회사 | 게르마늄 전구체, 이를 이용하여 형성된 gst 박막,상기 박막의 제조 방법 및 상변화 메모리 소자 |
KR100604923B1 (ko) * | 2005-01-04 | 2006-07-28 | 삼성전자주식회사 | 원자층 증착법에 의한 티탄 알루미늄 질화막 형성방법 및이를 이용하여 제조된 발열 전극을 갖는 상변화 메모리 소자 |
US20060169968A1 (en) * | 2005-02-01 | 2006-08-03 | Thomas Happ | Pillar phase change memory cell |
JP4591821B2 (ja) * | 2005-02-09 | 2010-12-01 | エルピーダメモリ株式会社 | 半導体装置 |
KR100688532B1 (ko) | 2005-02-14 | 2007-03-02 | 삼성전자주식회사 | 텔루르 전구체, 이를 이용하여 제조된 Te-함유 칼코게나이드(chalcogenide) 박막, 상기 박막의 제조방법 및 상변화 메모리 소자 |
JP5474272B2 (ja) * | 2005-03-15 | 2014-04-16 | ピーエスフォー ルクスコ エスエイアールエル | メモリ装置及びその製造方法 |
JP2006352082A (ja) * | 2005-05-19 | 2006-12-28 | Renesas Technology Corp | 半導体記憶装置及びその製造方法 |
KR100650752B1 (ko) * | 2005-06-10 | 2006-11-27 | 주식회사 하이닉스반도체 | 상변환 기억 소자 및 그의 제조방법 |
US20060284156A1 (en) * | 2005-06-16 | 2006-12-21 | Thomas Happ | Phase change memory cell defined by imprint lithography |
KR100642645B1 (ko) * | 2005-07-01 | 2006-11-10 | 삼성전자주식회사 | 고집적 셀 구조를 갖는 메모리 소자 및 그 제조방법 |
KR100625170B1 (ko) | 2005-07-13 | 2006-09-15 | 삼성전자주식회사 | 전극 구조체, 이의 제조 방법, 이를 포함하는 상변화메모리 장치 및 그 제조 방법 |
JP4560818B2 (ja) | 2005-07-22 | 2010-10-13 | エルピーダメモリ株式会社 | 半導体装置及びその製造方法 |
KR100682969B1 (ko) * | 2005-08-04 | 2007-02-15 | 삼성전자주식회사 | 상변화 물질, 이를 포함하는 상변화 램과 이의 제조 및 동작 방법 |
KR100655440B1 (ko) | 2005-08-30 | 2006-12-08 | 삼성전자주식회사 | 상변화 기억 소자 및 그 형성 방법 |
DE602005015853D1 (de) | 2005-09-14 | 2009-09-17 | St Microelectronics Srl | Verfahren zur Herstellung einer Phasenwechselspeicher-Anordnung mit einheitlicher Heizelementhöhe |
US7589364B2 (en) * | 2005-11-02 | 2009-09-15 | Elpida Memory, Inc. | Electrically rewritable non-volatile memory element and method of manufacturing the same |
US7541607B2 (en) * | 2005-11-02 | 2009-06-02 | Elpida Memory, Inc. | Electrically rewritable non-volatile memory element and method of manufacturing the same |
US7635855B2 (en) * | 2005-11-15 | 2009-12-22 | Macronix International Co., Ltd. | I-shaped phase change memory cell |
US7786460B2 (en) | 2005-11-15 | 2010-08-31 | Macronix International Co., Ltd. | Phase change memory device and manufacturing method |
US7414258B2 (en) | 2005-11-16 | 2008-08-19 | Macronix International Co., Ltd. | Spacer electrode small pin phase change memory RAM and manufacturing method |
US7449710B2 (en) * | 2005-11-21 | 2008-11-11 | Macronix International Co., Ltd. | Vacuum jacket for phase change memory element |
US7829876B2 (en) | 2005-11-21 | 2010-11-09 | Macronix International Co., Ltd. | Vacuum cell thermal isolation for a phase change memory device |
US7599217B2 (en) * | 2005-11-22 | 2009-10-06 | Macronix International Co., Ltd. | Memory cell device and manufacturing method |
JP4860249B2 (ja) * | 2005-11-26 | 2012-01-25 | エルピーダメモリ株式会社 | 相変化メモリ装置および相変化メモリ装置の製造方法 |
US7688619B2 (en) | 2005-11-28 | 2010-03-30 | Macronix International Co., Ltd. | Phase change memory cell and manufacturing method |
US7459717B2 (en) | 2005-11-28 | 2008-12-02 | Macronix International Co., Ltd. | Phase change memory cell and manufacturing method |
US7521364B2 (en) * | 2005-12-02 | 2009-04-21 | Macronix Internation Co., Ltd. | Surface topology improvement method for plug surface areas |
US7531825B2 (en) * | 2005-12-27 | 2009-05-12 | Macronix International Co., Ltd. | Method for forming self-aligned thermal isolation cell for a variable resistance memory array |
US8062833B2 (en) | 2005-12-30 | 2011-11-22 | Macronix International Co., Ltd. | Chalcogenide layer etching method |
KR100695166B1 (ko) * | 2006-01-03 | 2007-03-14 | 삼성전자주식회사 | 플러렌층을 구비한 상변화 메모리 소자의 제조 방법 |
US7595218B2 (en) * | 2006-01-09 | 2009-09-29 | Macronix International Co., Ltd. | Programmable resistive RAM and manufacturing method |
US7560337B2 (en) * | 2006-01-09 | 2009-07-14 | Macronix International Co., Ltd. | Programmable resistive RAM and manufacturing method |
US7741636B2 (en) | 2006-01-09 | 2010-06-22 | Macronix International Co., Ltd. | Programmable resistive RAM and manufacturing method |
JP4591833B2 (ja) * | 2006-01-17 | 2010-12-01 | エルピーダメモリ株式会社 | 相変化メモリ装置および相変化メモリ装置の製造方法 |
JP4691454B2 (ja) * | 2006-02-25 | 2011-06-01 | エルピーダメモリ株式会社 | 相変化メモリ装置およびその製造方法 |
US7324365B2 (en) * | 2006-03-02 | 2008-01-29 | Infineon Technologies Ag | Phase change memory fabricated using self-aligned processing |
US7514705B2 (en) * | 2006-04-25 | 2009-04-07 | International Business Machines Corporation | Phase change memory cell with limited switchable volume |
CN100459049C (zh) * | 2006-04-28 | 2009-02-04 | 台湾薄膜电晶体液晶显示器产业协会 | 运用金属-硫系元素化合物的先驱物溶液制作主动层薄膜的方法 |
US7608848B2 (en) * | 2006-05-09 | 2009-10-27 | Macronix International Co., Ltd. | Bridge resistance random access memory device with a singular contact structure |
US7494841B2 (en) * | 2006-05-12 | 2009-02-24 | International Business Machines Corporation | Solution-based deposition process for metal chalcogenides |
WO2007138703A1 (ja) * | 2006-05-31 | 2007-12-06 | Renesas Technology Corp. | 半導体装置 |
US7696506B2 (en) * | 2006-06-27 | 2010-04-13 | Macronix International Co., Ltd. | Memory cell with memory material insulation and manufacturing method |
US7750333B2 (en) * | 2006-06-28 | 2010-07-06 | Intel Corporation | Bit-erasing architecture for seek-scan probe (SSP) memory storage |
US7785920B2 (en) | 2006-07-12 | 2010-08-31 | Macronix International Co., Ltd. | Method for making a pillar-type phase change memory element |
JP2008053494A (ja) * | 2006-08-25 | 2008-03-06 | Elpida Memory Inc | 半導体装置及びその製造方法 |
JP4437299B2 (ja) | 2006-08-25 | 2010-03-24 | エルピーダメモリ株式会社 | 半導体装置及びその製造方法 |
JP2008060541A (ja) * | 2006-08-29 | 2008-03-13 | Korea Electronics Telecommun | Gstカルコゲニドパターンを備える相変化メモリ素子の製造方法 |
US7772581B2 (en) * | 2006-09-11 | 2010-08-10 | Macronix International Co., Ltd. | Memory device having wide area phase change element and small electrode contact area |
JP4267013B2 (ja) | 2006-09-12 | 2009-05-27 | エルピーダメモリ株式会社 | 半導体装置の製造方法 |
KR100807230B1 (ko) | 2006-09-27 | 2008-02-28 | 삼성전자주식회사 | 상변화 물질층 및 이를 포함하는 상변화 메모리 장치 |
KR100766504B1 (ko) | 2006-09-29 | 2007-10-15 | 삼성전자주식회사 | 반도체 소자 및 그 제조 방법 |
US7504653B2 (en) * | 2006-10-04 | 2009-03-17 | Macronix International Co., Ltd. | Memory cell device with circumferentially-extending memory element |
CN100461484C (zh) * | 2006-10-13 | 2009-02-11 | 中国科学院上海微系统与信息技术研究所 | 相变存储器存储单元及其制备方法 |
KR100858083B1 (ko) * | 2006-10-18 | 2008-09-10 | 삼성전자주식회사 | 하부전극 콘택층과 상변화층 사이에 넓은 접촉면적을 갖는상변화 메모리 소자 및 그 제조 방법 |
US7863655B2 (en) * | 2006-10-24 | 2011-01-04 | Macronix International Co., Ltd. | Phase change memory cells with dual access devices |
US8067762B2 (en) | 2006-11-16 | 2011-11-29 | Macronix International Co., Ltd. | Resistance random access memory structure for enhanced retention |
US7476587B2 (en) | 2006-12-06 | 2009-01-13 | Macronix International Co., Ltd. | Method for making a self-converged memory material element for memory cell |
US7682868B2 (en) * | 2006-12-06 | 2010-03-23 | Macronix International Co., Ltd. | Method for making a keyhole opening during the manufacture of a memory cell |
US7903447B2 (en) | 2006-12-13 | 2011-03-08 | Macronix International Co., Ltd. | Method, apparatus and computer program product for read before programming process on programmable resistive memory cell |
US7718989B2 (en) * | 2006-12-28 | 2010-05-18 | Macronix International Co., Ltd. | Resistor random access memory cell device |
US7619311B2 (en) * | 2007-02-02 | 2009-11-17 | Macronix International Co., Ltd. | Memory cell device with coplanar electrode surface and method |
US7884343B2 (en) | 2007-02-14 | 2011-02-08 | Macronix International Co., Ltd. | Phase change memory cell with filled sidewall memory element and method for fabricating the same |
US7956344B2 (en) * | 2007-02-27 | 2011-06-07 | Macronix International Co., Ltd. | Memory cell with memory element contacting ring-shaped upper end of bottom electrode |
KR100858089B1 (ko) * | 2007-03-06 | 2008-09-10 | 삼성전자주식회사 | 상변화 메모리 소자와 그 제조 및 동작 방법 |
US7786461B2 (en) | 2007-04-03 | 2010-08-31 | Macronix International Co., Ltd. | Memory structure with reduced-size memory element between memory material portions |
US7940552B2 (en) * | 2007-04-30 | 2011-05-10 | Samsung Electronics Co., Ltd. | Multiple level cell phase-change memory device having pre-reading operation resistance drift recovery, memory systems employing such devices and methods of reading memory devices |
KR100881055B1 (ko) | 2007-06-20 | 2009-01-30 | 삼성전자주식회사 | 상변화 메모리 유닛, 이의 제조 방법, 이를 포함하는상변화 메모리 장치 및 그 제조 방법 |
KR100914267B1 (ko) * | 2007-06-20 | 2009-08-27 | 삼성전자주식회사 | 가변저항 메모리 장치 및 그것의 형성방법 |
KR100875165B1 (ko) * | 2007-07-04 | 2008-12-22 | 주식회사 동부하이텍 | 반도체 소자 및 제조 방법 |
KR101308549B1 (ko) * | 2007-07-12 | 2013-09-13 | 삼성전자주식회사 | 멀티-레벨 상변환 메모리 장치 및 그것의 쓰기 방법 |
TWI402980B (zh) | 2007-07-20 | 2013-07-21 | Macronix Int Co Ltd | 具有緩衝層之電阻式記憶結構 |
KR101258268B1 (ko) * | 2007-07-26 | 2013-04-25 | 삼성전자주식회사 | 비휘발성 메모리 소자의 낸드형 저항성 메모리 셀 스트링들및 그 제조방법들 |
US7729161B2 (en) | 2007-08-02 | 2010-06-01 | Macronix International Co., Ltd. | Phase change memory with dual word lines and source lines and method of operating same |
US7642125B2 (en) * | 2007-09-14 | 2010-01-05 | Macronix International Co., Ltd. | Phase change memory cell in via array with self-aligned, self-converged bottom electrode and method for manufacturing |
US8178386B2 (en) | 2007-09-14 | 2012-05-15 | Macronix International Co., Ltd. | Phase change memory cell array with self-converged bottom electrode and method for manufacturing |
US7755074B2 (en) * | 2007-10-12 | 2010-07-13 | Ovonyx, Inc. | Low area contact phase-change memory |
JP2009099854A (ja) * | 2007-10-18 | 2009-05-07 | Elpida Memory Inc | 縦型相変化メモリ装置の製造方法 |
US7919766B2 (en) | 2007-10-22 | 2011-04-05 | Macronix International Co., Ltd. | Method for making self aligning pillar memory cell device |
US7646631B2 (en) * | 2007-12-07 | 2010-01-12 | Macronix International Co., Ltd. | Phase change memory cell having interface structures with essentially equal thermal impedances and manufacturing methods |
KR101198100B1 (ko) | 2007-12-11 | 2012-11-09 | 삼성전자주식회사 | 상변화 물질층 패턴의 형성 방법, 상변화 메모리 장치의제조 방법 및 이에 사용되는 상변화 물질층 연마용 슬러리조성물 |
US7879643B2 (en) | 2008-01-18 | 2011-02-01 | Macronix International Co., Ltd. | Memory cell with memory element contacting an inverted T-shaped bottom electrode |
US7879645B2 (en) * | 2008-01-28 | 2011-02-01 | Macronix International Co., Ltd. | Fill-in etching free pore device |
US8158965B2 (en) | 2008-02-05 | 2012-04-17 | Macronix International Co., Ltd. | Heating center PCRAM structure and methods for making |
US8084842B2 (en) * | 2008-03-25 | 2011-12-27 | Macronix International Co., Ltd. | Thermally stabilized electrode structure |
US8030634B2 (en) | 2008-03-31 | 2011-10-04 | Macronix International Co., Ltd. | Memory array with diode driver and method for fabricating the same |
US7825398B2 (en) | 2008-04-07 | 2010-11-02 | Macronix International Co., Ltd. | Memory cell having improved mechanical stability |
US7791057B2 (en) * | 2008-04-22 | 2010-09-07 | Macronix International Co., Ltd. | Memory cell having a buried phase change region and method for fabricating the same |
US8077505B2 (en) * | 2008-05-07 | 2011-12-13 | Macronix International Co., Ltd. | Bipolar switching of phase change device |
US7701750B2 (en) | 2008-05-08 | 2010-04-20 | Macronix International Co., Ltd. | Phase change device having two or more substantial amorphous regions in high resistance state |
KR100981736B1 (ko) * | 2008-05-23 | 2010-09-13 | 한국전자통신연구원 | 상변화 메모리 소자 및 그 제조 방법 |
US8415651B2 (en) * | 2008-06-12 | 2013-04-09 | Macronix International Co., Ltd. | Phase change memory cell having top and bottom sidewall contacts |
US8134857B2 (en) * | 2008-06-27 | 2012-03-13 | Macronix International Co., Ltd. | Methods for high speed reading operation of phase change memory and device employing same |
US20100019215A1 (en) * | 2008-07-22 | 2010-01-28 | Macronix International Co., Ltd. | Mushroom type memory cell having self-aligned bottom electrode and diode access device |
US7932506B2 (en) | 2008-07-22 | 2011-04-26 | Macronix International Co., Ltd. | Fully self-aligned pore-type memory cell having diode access device |
US7903457B2 (en) * | 2008-08-19 | 2011-03-08 | Macronix International Co., Ltd. | Multiple phase change materials in an integrated circuit for system on a chip application |
US7719913B2 (en) * | 2008-09-12 | 2010-05-18 | Macronix International Co., Ltd. | Sensing circuit for PCRAM applications |
US8324605B2 (en) * | 2008-10-02 | 2012-12-04 | Macronix International Co., Ltd. | Dielectric mesh isolated phase change structure for phase change memory |
US7897954B2 (en) | 2008-10-10 | 2011-03-01 | Macronix International Co., Ltd. | Dielectric-sandwiched pillar memory device |
US8036014B2 (en) * | 2008-11-06 | 2011-10-11 | Macronix International Co., Ltd. | Phase change memory program method without over-reset |
US8907316B2 (en) * | 2008-11-07 | 2014-12-09 | Macronix International Co., Ltd. | Memory cell access device having a pn-junction with polycrystalline and single crystal semiconductor regions |
US8664689B2 (en) | 2008-11-07 | 2014-03-04 | Macronix International Co., Ltd. | Memory cell access device having a pn-junction with polycrystalline plug and single-crystal semiconductor regions |
KR20100060323A (ko) * | 2008-11-27 | 2010-06-07 | 삼성전자주식회사 | 가변저항 메모리 장치 및 그 형성 방법 |
US7869270B2 (en) | 2008-12-29 | 2011-01-11 | Macronix International Co., Ltd. | Set algorithm for phase change memory cell |
US8089137B2 (en) * | 2009-01-07 | 2012-01-03 | Macronix International Co., Ltd. | Integrated circuit memory with single crystal silicon on silicide driver and manufacturing method |
US8107283B2 (en) * | 2009-01-12 | 2012-01-31 | Macronix International Co., Ltd. | Method for setting PCRAM devices |
US8030635B2 (en) | 2009-01-13 | 2011-10-04 | Macronix International Co., Ltd. | Polysilicon plug bipolar transistor for phase change memory |
US8064247B2 (en) | 2009-01-14 | 2011-11-22 | Macronix International Co., Ltd. | Rewritable memory device based on segregation/re-absorption |
US8933536B2 (en) | 2009-01-22 | 2015-01-13 | Macronix International Co., Ltd. | Polysilicon pillar bipolar transistor with self-aligned memory element |
US8084760B2 (en) | 2009-04-20 | 2011-12-27 | Macronix International Co., Ltd. | Ring-shaped electrode and manufacturing method for same |
US8173987B2 (en) * | 2009-04-27 | 2012-05-08 | Macronix International Co., Ltd. | Integrated circuit 3D phase change memory array and manufacturing method |
US8097871B2 (en) | 2009-04-30 | 2012-01-17 | Macronix International Co., Ltd. | Low operational current phase change memory structures |
US7933139B2 (en) * | 2009-05-15 | 2011-04-26 | Macronix International Co., Ltd. | One-transistor, one-resistor, one-capacitor phase change memory |
US7968876B2 (en) | 2009-05-22 | 2011-06-28 | Macronix International Co., Ltd. | Phase change memory cell having vertical channel access transistor |
US8350316B2 (en) | 2009-05-22 | 2013-01-08 | Macronix International Co., Ltd. | Phase change memory cells having vertical channel access transistor and memory plane |
US8809829B2 (en) * | 2009-06-15 | 2014-08-19 | Macronix International Co., Ltd. | Phase change memory having stabilized microstructure and manufacturing method |
US8406033B2 (en) | 2009-06-22 | 2013-03-26 | Macronix International Co., Ltd. | Memory device and method for sensing and fixing margin cells |
US8238149B2 (en) | 2009-06-25 | 2012-08-07 | Macronix International Co., Ltd. | Methods and apparatus for reducing defect bits in phase change memory |
US8363463B2 (en) | 2009-06-25 | 2013-01-29 | Macronix International Co., Ltd. | Phase change memory having one or more non-constant doping profiles |
US8198619B2 (en) | 2009-07-15 | 2012-06-12 | Macronix International Co., Ltd. | Phase change memory cell structure |
US7894254B2 (en) | 2009-07-15 | 2011-02-22 | Macronix International Co., Ltd. | Refresh circuitry for phase change memory |
US8110822B2 (en) | 2009-07-15 | 2012-02-07 | Macronix International Co., Ltd. | Thermal protect PCRAM structure and methods for making |
US8064248B2 (en) | 2009-09-17 | 2011-11-22 | Macronix International Co., Ltd. | 2T2R-1T1R mix mode phase change memory array |
US8178387B2 (en) | 2009-10-23 | 2012-05-15 | Macronix International Co., Ltd. | Methods for reducing recrystallization time for a phase change material |
US8729521B2 (en) | 2010-05-12 | 2014-05-20 | Macronix International Co., Ltd. | Self aligned fin-type programmable memory cell |
US8310864B2 (en) | 2010-06-15 | 2012-11-13 | Macronix International Co., Ltd. | Self-aligned bit line under word line memory array |
US8247789B2 (en) * | 2010-08-31 | 2012-08-21 | Micron Technology, Inc. | Memory cells and methods of forming memory cells |
US8395935B2 (en) | 2010-10-06 | 2013-03-12 | Macronix International Co., Ltd. | Cross-point self-aligned reduced cell size phase change memory |
WO2012057772A1 (en) * | 2010-10-29 | 2012-05-03 | Hewlett-Packard Development Company, L.P. | Memristive devices and memristors with ribbon-like junctions and methods for fabricating the same |
US8497705B2 (en) | 2010-11-09 | 2013-07-30 | Macronix International Co., Ltd. | Phase change device for interconnection of programmable logic device |
US8467238B2 (en) | 2010-11-15 | 2013-06-18 | Macronix International Co., Ltd. | Dynamic pulse operation for phase change memory |
US8987700B2 (en) | 2011-12-02 | 2015-03-24 | Macronix International Co., Ltd. | Thermally confined electrode for programmable resistance memory |
JP2014049497A (ja) | 2012-08-29 | 2014-03-17 | Toshiba Corp | 不揮発性半導体記憶装置及びその動作方法 |
JP5826779B2 (ja) | 2013-02-27 | 2015-12-02 | 株式会社東芝 | 不揮発性半導体記憶装置 |
TWI549229B (zh) | 2014-01-24 | 2016-09-11 | 旺宏電子股份有限公司 | 應用於系統單晶片之記憶體裝置內的多相變化材料 |
US9627612B2 (en) * | 2014-02-27 | 2017-04-18 | International Business Machines Corporation | Metal nitride keyhole or spacer phase change memory cell structures |
US9559113B2 (en) | 2014-05-01 | 2017-01-31 | Macronix International Co., Ltd. | SSL/GSL gate oxide in 3D vertical channel NAND |
US9672906B2 (en) | 2015-06-19 | 2017-06-06 | Macronix International Co., Ltd. | Phase change memory with inter-granular switching |
US10957587B2 (en) * | 2018-07-31 | 2021-03-23 | Taiwan Semiconductor Manufacturing Company, Ltd. | Structure and formation method of semiconductor device with conductive feature |
Citations (8)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US6072716A (en) * | 1999-04-14 | 2000-06-06 | Massachusetts Institute Of Technology | Memory structures and methods of making same |
US20020058389A1 (en) * | 2000-09-29 | 2002-05-16 | Wicker Guy C. | Reduced contact area of sidewall conductor |
CN1352808A (zh) * | 1999-03-25 | 2002-06-05 | 能源变换设备有限公司 | 带有改进的接触点的电可编程存储器元件 |
US20020080647A1 (en) * | 2000-12-21 | 2002-06-27 | Chien Chiang | Metal structure for a phase-change memory device |
US20030003634A1 (en) * | 2001-06-30 | 2003-01-02 | Lowrey Tyler A. | Utilizing atomic layer deposition for programmable device |
US20030036232A1 (en) * | 2000-12-14 | 2003-02-20 | Charles Dennison | Method to selectively increase the top resistance of the lower programming electrode in a phase-change memory. |
US20030047727A1 (en) * | 2001-09-07 | 2003-03-13 | Chien Chiang | Using selective deposition to form phase-change memory cells |
US6545903B1 (en) * | 2001-12-17 | 2003-04-08 | Texas Instruments Incorporated | Self-aligned resistive plugs for forming memory cell with phase change material |
Family Cites Families (18)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US6147395A (en) | 1996-10-02 | 2000-11-14 | Micron Technology, Inc. | Method for fabricating a small area of contact between electrodes |
US5825046A (en) * | 1996-10-28 | 1998-10-20 | Energy Conversion Devices, Inc. | Composite memory material comprising a mixture of phase-change memory material and dielectric material |
US6969866B1 (en) * | 1997-10-01 | 2005-11-29 | Ovonyx, Inc. | Electrically programmable memory element with improved contacts |
US6555860B2 (en) * | 2000-09-29 | 2003-04-29 | Intel Corporation | Compositionally modified resistive electrode |
US6764894B2 (en) * | 2001-08-31 | 2004-07-20 | Ovonyx, Inc. | Elevated pore phase-change memory |
JP4911845B2 (ja) * | 2001-09-20 | 2012-04-04 | 株式会社リコー | 相変化型不揮発性メモリ素子、該相変化型不揮発性メモリ素子を用いたメモリアレーおよび該相変化型不揮発性メモリ素子の情報記録方法 |
JP2003100084A (ja) * | 2001-09-27 | 2003-04-04 | Toshiba Corp | 相変化型不揮発性記憶装置 |
US6566700B2 (en) * | 2001-10-11 | 2003-05-20 | Ovonyx, Inc. | Carbon-containing interfacial layer for phase-change memory |
EP1318552A1 (en) * | 2001-12-05 | 2003-06-11 | STMicroelectronics S.r.l. | Small area contact region, high efficiency phase change memory cell and fabrication method thereof |
JP3948292B2 (ja) * | 2002-02-01 | 2007-07-25 | 株式会社日立製作所 | 半導体記憶装置及びその製造方法 |
US6707087B2 (en) * | 2002-06-21 | 2004-03-16 | Hewlett-Packard Development Company, L.P. | Structure of chalcogenide memory element |
US6859382B2 (en) * | 2002-08-02 | 2005-02-22 | Unity Semiconductor Corporation | Memory array of a non-volatile ram |
US6869883B2 (en) * | 2002-12-13 | 2005-03-22 | Ovonyx, Inc. | Forming phase change memories |
US6912146B2 (en) * | 2002-12-13 | 2005-06-28 | Ovonyx, Inc. | Using an MOS select gate for a phase change memory |
US7115927B2 (en) * | 2003-02-24 | 2006-10-03 | Samsung Electronics Co., Ltd. | Phase changeable memory devices |
JP4254293B2 (ja) * | 2003-03-25 | 2009-04-15 | 株式会社日立製作所 | 記憶装置 |
KR100504698B1 (ko) * | 2003-04-02 | 2005-08-02 | 삼성전자주식회사 | 상변화 기억 소자 및 그 형성 방법 |
US6937507B2 (en) * | 2003-12-05 | 2005-08-30 | Silicon Storage Technology, Inc. | Memory device and method of operating same |
-
2003
- 2003-05-23 KR KR1020030032882A patent/KR100979710B1/ko not_active IP Right Cessation
-
2004
- 2004-03-12 EP EP04251445A patent/EP1480273B1/en not_active Expired - Fee Related
- 2004-03-12 DE DE602004013489T patent/DE602004013489D1/de not_active Expired - Lifetime
- 2004-04-12 CN CNB2004100343559A patent/CN100435373C/zh not_active Expired - Fee Related
- 2004-05-06 US US10/839,261 patent/US7164147B2/en not_active Expired - Fee Related
- 2004-05-24 JP JP2004152661A patent/JP4813027B2/ja not_active Expired - Fee Related
-
2007
- 2007-01-09 US US11/650,972 patent/US7501307B2/en active Active
Patent Citations (8)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN1352808A (zh) * | 1999-03-25 | 2002-06-05 | 能源变换设备有限公司 | 带有改进的接触点的电可编程存储器元件 |
US6072716A (en) * | 1999-04-14 | 2000-06-06 | Massachusetts Institute Of Technology | Memory structures and methods of making same |
US20020058389A1 (en) * | 2000-09-29 | 2002-05-16 | Wicker Guy C. | Reduced contact area of sidewall conductor |
US20030036232A1 (en) * | 2000-12-14 | 2003-02-20 | Charles Dennison | Method to selectively increase the top resistance of the lower programming electrode in a phase-change memory. |
US20020080647A1 (en) * | 2000-12-21 | 2002-06-27 | Chien Chiang | Metal structure for a phase-change memory device |
US20030003634A1 (en) * | 2001-06-30 | 2003-01-02 | Lowrey Tyler A. | Utilizing atomic layer deposition for programmable device |
US20030047727A1 (en) * | 2001-09-07 | 2003-03-13 | Chien Chiang | Using selective deposition to form phase-change memory cells |
US6545903B1 (en) * | 2001-12-17 | 2003-04-08 | Texas Instruments Incorporated | Self-aligned resistive plugs for forming memory cell with phase change material |
Also Published As
Publication number | Publication date |
---|---|
EP1480273B1 (en) | 2008-05-07 |
EP1480273A2 (en) | 2004-11-24 |
DE602004013489D1 (de) | 2008-06-19 |
EP1480273A3 (en) | 2006-02-08 |
US7501307B2 (en) | 2009-03-10 |
US20040234895A1 (en) | 2004-11-25 |
US20070108433A1 (en) | 2007-05-17 |
US7164147B2 (en) | 2007-01-16 |
CN1574410A (zh) | 2005-02-02 |
KR100979710B1 (ko) | 2010-09-02 |
KR20040100499A (ko) | 2004-12-02 |
JP2004349709A (ja) | 2004-12-09 |
JP4813027B2 (ja) | 2011-11-09 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
CN100435373C (zh) | 半导体存储器件及其制造方法 | |
CN102237390B (zh) | 半导体装置及其制造方法 | |
US8796101B2 (en) | Memory device | |
CN100541855C (zh) | 非易失存储元件及其制造方法 | |
KR100766504B1 (ko) | 반도체 소자 및 그 제조 방법 | |
US6919578B2 (en) | Utilizing atomic layer deposition for programmable device | |
US20070246748A1 (en) | Phase change memory cell with limited switchable volume | |
KR100763916B1 (ko) | GeSbTe 박막의 제조방법 및 이를 이용한 상변화메모리 소자의 제조방법 | |
US20060125108A1 (en) | Method of producing a microelectronic electrode structure, and microelectronic electrode structure | |
CN1983660B (zh) | 非易失存储元件的制造方法 | |
JP2003174144A (ja) | 半導体装置における微小コンタクト領域、高性能相変化メモリセル及びその製造方法 | |
US20090212272A1 (en) | Self-converging bottom electrode ring | |
US6770531B2 (en) | Adhesive material for programmable device | |
KR20040054250A (ko) | 상전이 메모리 셀 및 그 형성방법 | |
JPWO2010140210A1 (ja) | 半導体記憶装置およびその製造方法 | |
KR100857466B1 (ko) | 안티몬-아연 합금을 이용한 상변화형 비휘발성 메모리 소자및 이의 제조방법 | |
US7829877B2 (en) | Memory structure with a programmable resistive element and its manufacturing process | |
EP1559146A1 (en) | Utilizing atomic layer deposition for programmable device | |
CN104934531A (zh) | 制造具有相变层的半导体集成电路的方法 | |
US7985693B2 (en) | Method of producing phase change memory device | |
CN106997924B (zh) | 相变存储器及其制造方法和电子设备 | |
KR100676342B1 (ko) | 프로그램 가능 디바이스에 대해 원자 층 증착을 활용하는장치 및 방법 | |
US20240099164A1 (en) | Phase change memory cell | |
US20240099168A1 (en) | Phase change memory cell | |
US20230189672A1 (en) | Pcm cell with nanoheater surrounded with airgaps |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
C06 | Publication | ||
PB01 | Publication | ||
C10 | Entry into substantive examination | ||
SE01 | Entry into force of request for substantive examination | ||
C14 | Grant of patent or utility model | ||
GR01 | Patent grant | ||
C17 | Cessation of patent right | ||
CF01 | Termination of patent right due to non-payment of annual fee |
Granted publication date: 20081119 Termination date: 20140412 |