BR9914200A - Métodos para projetar um sistema de circuito, para expandir uma metodologia existente para avaliar a viabilidade de um projeto de circuito, para realizar uma avaliação de viabilidade para um projeto de circuito, para refinar uma primeira regra de decisão para um projeto de circuito, para formar uma segunda regra de decisão para um projeto de circuito, para organizar os dados de experiência de um projetista relativos a uma pluralidade de blocos de circuito pré-projetados, para aumentar a eficiência de distribuição de lógica de cola e para distribuir uma pluralidade de elementos lógicos de cola entre os blocos de projeto e distribuir lógica de cola para execução em um esquema de projeto de dispositivo de circuito integrado, para converter uma interface especìfica de um bloco de circuito, para selecionar um coletor de circuito, para projetar um dispositivo que incorpora o projeto e habilitar um teste do dispositivo, para verificar o correto funcionamento de um projeto de circuito e para desenvolver uma bancada de teste de nìvel comportamental, interface de colar e sistema de interface - Google Patents

Métodos para projetar um sistema de circuito, para expandir uma metodologia existente para avaliar a viabilidade de um projeto de circuito, para realizar uma avaliação de viabilidade para um projeto de circuito, para refinar uma primeira regra de decisão para um projeto de circuito, para formar uma segunda regra de decisão para um projeto de circuito, para organizar os dados de experiência de um projetista relativos a uma pluralidade de blocos de circuito pré-projetados, para aumentar a eficiência de distribuição de lógica de cola e para distribuir uma pluralidade de elementos lógicos de cola entre os blocos de projeto e distribuir lógica de cola para execução em um esquema de projeto de dispositivo de circuito integrado, para converter uma interface especìfica de um bloco de circuito, para selecionar um coletor de circuito, para projetar um dispositivo que incorpora o projeto e habilitar um teste do dispositivo, para verificar o correto funcionamento de um projeto de circuito e para desenvolver uma bancada de teste de nìvel comportamental, interface de colar e sistema de interface

Info

Publication number
BR9914200A
BR9914200A BR9914200-7A BR9914200A BR9914200A BR 9914200 A BR9914200 A BR 9914200A BR 9914200 A BR9914200 A BR 9914200A BR 9914200 A BR9914200 A BR 9914200A
Authority
BR
Brazil
Prior art keywords
circuit
design
blocks
interface
feasibility
Prior art date
Application number
BR9914200-7A
Other languages
English (en)
Inventor
Henry Chang
Larry Cooke
Merrill Hunt
Wuudiann Ke
Christopher K Lennard
Grant Martin
Peter Paterson
Khoan Truong
Kumar Venkatramani
Original Assignee
Cadence Design Systems Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Cadence Design Systems Inc filed Critical Cadence Design Systems Inc
Publication of BR9914200A publication Critical patent/BR9914200A/pt

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Classifications

    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F30/00Computer-aided design [CAD]
    • G06F30/30Circuit design
    • G06F30/32Circuit design at the digital level
    • G06F30/33Design verification, e.g. functional simulation or model checking
    • G06F30/3308Design verification, e.g. functional simulation or model checking using simulation
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F30/00Computer-aided design [CAD]
    • G06F30/30Circuit design
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F30/00Computer-aided design [CAD]
    • G06F30/30Circuit design
    • G06F30/32Circuit design at the digital level
    • G06F30/33Design verification, e.g. functional simulation or model checking
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F2115/00Details relating to the type of the circuit
    • G06F2115/08Intellectual property [IP] blocks or IP cores

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Evolutionary Computation (AREA)
  • Geometry (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Design And Manufacture Of Integrated Circuits (AREA)
  • Semiconductor Integrated Circuits (AREA)

Abstract

"MéTODOS PARA PROJETAR UM SISTEMA DE CIRCUITO, PARA EXPANDIR UMA METODOLOGIA EXISTENTE PARA AVALIAR A VIABILIDADE DE UM PROJETO DE CIRCUITO, PARA REALIZAR UMA AVALIAçãO DE VIABILIDADE PARA UM PROJETO DE CIRCUITO, PARA REFINAR UMA PRIMEIRA REGRA DE DECISãO PARA UM PROJETO DE CIRCUITO, PARA FORMAR UMA SEGUNDA REGRA DE DECISãO PARA UM PROJETO DE CIRCUITO, PARA ORGANIZAR OS DADOS DE EXPERIêNCIA DE UM PROJETISTA RELATIVOS A UMA PLURALIDADE DE BLOCOS DE CIRCUITO PRé-PROJETADOS, PARA AUMENTAR A EFICIêNCIA DE DISTRIBUIçãO DE LóGICA DE COLA E PARA DISTRIBUIR UMA PLURALIDADE DE ELEMENTOS LóGICOS DE COLA ENTRE OS BLOCOS DE PROJETO E DISTRIBUIR LóGICA DE COLA PARA EXECUçãO EM UM ESQUEMA DE PROJETO DE DISPOSITIVO DE CIRCUITO INTEGRADO, PARA CONVERTER UMA INTERFACE ESPECìFICA DE UM BLOCO DE CIRCUITO, PARA SELECIONAR UM COLETOR DE CIRCUITO, PARA PROJETAR UM DISPOSITIVO QUE INCORPORA O PROJETO E HABILITAR UM TESTE DO DISPOSITIVO, PARA VERIFICAR O CORRETO FUNCIONAMENTO DE UM PROJETO DE CIRCUITO E PARA DESENVOLVER UMA BANCADA DE TESTE DE NIVEL COMPORTAMENTAL, INTERFACE DE COLAR E SISTEMA DE INTERFACE. Um método e aparelho para projeto de um sistema de circuito, que inclui selecionar uma pluralidade de blocos de circuito pré-projetados a serem usados para o projeto do sistema de circuito, recolher dados refletindo a experiência do projetista com relação aos blocos de circuito pré-projetados, a experiência do projetista sendo adaptável a um método de processamento, aceitando ou rejeitando um projeto do sistema de circuito de uma maneira com base em os dados de experiência do projetista e o grau de risco aceitável, mediante a aceitação, formar especificações de bloco para desenvolver os blocos de circuito sobre uma planta baixa de um chip, como um sistema sobre um chip, de acordo com os critérios e limitações modificadas, e substancialmente sem alterar o bloco de circuito selecionado e o método de processamento.
BR9914200-7A 1998-09-30 1999-09-30 Métodos para projetar um sistema de circuito, para expandir uma metodologia existente para avaliar a viabilidade de um projeto de circuito, para realizar uma avaliação de viabilidade para um projeto de circuito, para refinar uma primeira regra de decisão para um projeto de circuito, para formar uma segunda regra de decisão para um projeto de circuito, para organizar os dados de experiência de um projetista relativos a uma pluralidade de blocos de circuito pré-projetados, para aumentar a eficiência de distribuição de lógica de cola e para distribuir uma pluralidade de elementos lógicos de cola entre os blocos de projeto e distribuir lógica de cola para execução em um esquema de projeto de dispositivo de circuito integrado, para converter uma interface especìfica de um bloco de circuito, para selecionar um coletor de circuito, para projetar um dispositivo que incorpora o projeto e habilitar um teste do dispositivo, para verificar o correto funcionamento de um projeto de circuito e para desenvolver uma bancada de teste de nìvel comportamental, interface de colar e sistema de interface BR9914200A (pt)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US10256698P 1998-09-30 1998-09-30
PCT/US1999/022984 WO2000019343A2 (en) 1998-09-30 1999-09-30 Block based design methodology

Publications (1)

Publication Number Publication Date
BR9914200A true BR9914200A (pt) 2002-01-22

Family

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Family Applications (1)

Application Number Title Priority Date Filing Date
BR9914200-7A BR9914200A (pt) 1998-09-30 1999-09-30 Métodos para projetar um sistema de circuito, para expandir uma metodologia existente para avaliar a viabilidade de um projeto de circuito, para realizar uma avaliação de viabilidade para um projeto de circuito, para refinar uma primeira regra de decisão para um projeto de circuito, para formar uma segunda regra de decisão para um projeto de circuito, para organizar os dados de experiência de um projetista relativos a uma pluralidade de blocos de circuito pré-projetados, para aumentar a eficiência de distribuição de lógica de cola e para distribuir uma pluralidade de elementos lógicos de cola entre os blocos de projeto e distribuir lógica de cola para execução em um esquema de projeto de dispositivo de circuito integrado, para converter uma interface especìfica de um bloco de circuito, para selecionar um coletor de circuito, para projetar um dispositivo que incorpora o projeto e habilitar um teste do dispositivo, para verificar o correto funcionamento de um projeto de circuito e para desenvolver uma bancada de teste de nìvel comportamental, interface de colar e sistema de interface

Country Status (13)

Country Link
US (10) US6269467B1 (pt)
EP (1) EP1145159A3 (pt)
JP (1) JP2002526908A (pt)
KR (1) KR100846089B1 (pt)
CN (1) CN1331079C (pt)
AU (1) AU1100500A (pt)
BR (1) BR9914200A (pt)
CA (1) CA2345648A1 (pt)
EE (1) EE200100189A (pt)
HU (1) HUP0301274A2 (pt)
IL (1) IL142279A0 (pt)
PL (1) PL350155A1 (pt)
WO (1) WO2000019343A2 (pt)

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