EE200100189A - Plokkidel põhineva väljatöötamise metodoloogia - Google Patents

Plokkidel põhineva väljatöötamise metodoloogia

Info

Publication number
EE200100189A
EE200100189A EEP200100189A EEP200100189A EE200100189A EE 200100189 A EE200100189 A EE 200100189A EE P200100189 A EEP200100189 A EE P200100189A EE P200100189 A EEP200100189 A EE P200100189A EE 200100189 A EE200100189 A EE 200100189A
Authority
EE
Estonia
Prior art keywords
block based
based development
development methodology
methodology
block
Prior art date
Application number
EEP200100189A
Other languages
English (en)
Inventor
Chang Henry
Cooke Larry
Hunt Merrill
Ke Wuudiann
K. Lennard Christopher
Martin Grant
Paterson Peter
Truong Khoan
Venkatramani Kumar
Original Assignee
Cadence Design Systems, Inc.
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Cadence Design Systems, Inc. filed Critical Cadence Design Systems, Inc.
Publication of EE200100189A publication Critical patent/EE200100189A/et

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F30/00—Computer-aided design [CAD]
    • G06F30/30—Circuit design
    • G06F30/32—Circuit design at the digital level
    • G06F30/33—Design verification, e.g. functional simulation or model checking
    • G06F30/3308—Design verification, e.g. functional simulation or model checking using simulation
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F30/00—Computer-aided design [CAD]
    • G06F30/30—Circuit design
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F30/00—Computer-aided design [CAD]
    • G06F30/30—Circuit design
    • G06F30/32—Circuit design at the digital level
    • G06F30/33—Design verification, e.g. functional simulation or model checking
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F2115/00—Details relating to the type of the circuit
    • G06F2115/08—Intellectual property [IP] blocks or IP cores

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Evolutionary Computation (AREA)
  • Geometry (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Design And Manufacture Of Integrated Circuits (AREA)
  • Semiconductor Integrated Circuits (AREA)
EEP200100189A 1998-09-30 1999-09-30 Plokkidel põhineva väljatöötamise metodoloogia EE200100189A (et)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US10256698P 1998-09-30 1998-09-30
PCT/US1999/022984 WO2000019343A2 (en) 1998-09-30 1999-09-30 Block based design methodology

Publications (1)

Publication Number Publication Date
EE200100189A true EE200100189A (et) 2002-08-15

Family

ID=22290503

Family Applications (1)

Application Number Title Priority Date Filing Date
EEP200100189A EE200100189A (et) 1998-09-30 1999-09-30 Plokkidel põhineva väljatöötamise metodoloogia

Country Status (13)

Country Link
US (10) US6269467B1 (et)
EP (1) EP1145159A3 (et)
JP (1) JP2002526908A (et)
KR (1) KR100846089B1 (et)
CN (1) CN1331079C (et)
AU (1) AU1100500A (et)
BR (1) BR9914200A (et)
CA (1) CA2345648A1 (et)
EE (1) EE200100189A (et)
HU (1) HUP0301274A2 (et)
IL (1) IL142279A0 (et)
PL (1) PL350155A1 (et)
WO (1) WO2000019343A2 (et)

Families Citing this family (349)

* Cited by examiner, † Cited by third party
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US20030115564A1 (en) 2003-06-19
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US6631470B2 (en) 2003-10-07
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US6698002B2 (en) 2004-02-24
US6567957B1 (en) 2003-05-20
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US6269467B1 (en) 2001-07-31
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US20010042237A1 (en) 2001-11-15
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