WO2019153940A1 - 像素排列结构及其显示方法和制备方法、显示基板 - Google Patents

像素排列结构及其显示方法和制备方法、显示基板 Download PDF

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Publication number
WO2019153940A1
WO2019153940A1 PCT/CN2018/124404 CN2018124404W WO2019153940A1 WO 2019153940 A1 WO2019153940 A1 WO 2019153940A1 CN 2018124404 W CN2018124404 W CN 2018124404W WO 2019153940 A1 WO2019153940 A1 WO 2019153940A1
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WIPO (PCT)
Prior art keywords
pixel
color sub
pixel block
color
virtual rectangle
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PCT/CN2018/124404
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English (en)
French (fr)
Inventor
王红丽
皇甫鲁江
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京东方科技集团股份有限公司
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Application filed by 京东方科技集团股份有限公司 filed Critical 京东方科技集团股份有限公司
Priority to EP18903035.6A priority Critical patent/EP3751610A4/en
Priority to JP2019543028A priority patent/JP7264818B2/ja
Priority to KR1020197024785A priority patent/KR102331850B1/ko
Priority to US16/483,210 priority patent/US11462589B2/en
Publication of WO2019153940A1 publication Critical patent/WO2019153940A1/zh
Priority to US17/890,427 priority patent/US11957019B2/en

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    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10KORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/10OLED displays
    • H10K59/12Active-matrix OLED [AMOLED] displays
    • H10K59/121Active-matrix OLED [AMOLED] displays characterised by the geometry or disposition of pixel elements
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10KORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/30Devices specially adapted for multicolour light emission
    • H10K59/35Devices specially adapted for multicolour light emission comprising red-green-blue [RGB] subpixels
    • H10K59/353Devices specially adapted for multicolour light emission comprising red-green-blue [RGB] subpixels characterised by the geometrical arrangement of the RGB subpixels
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10KORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/30Devices specially adapted for multicolour light emission
    • H10K59/35Devices specially adapted for multicolour light emission comprising red-green-blue [RGB] subpixels
    • H10K59/352Devices specially adapted for multicolour light emission comprising red-green-blue [RGB] subpixels the areas of the RGB subpixels being different
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10KORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K71/00Manufacture or treatment specially adapted for the organic devices covered by this subclass
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10KORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/10OLED displays
    • H10K59/12Active-matrix OLED [AMOLED] displays

Definitions

  • Embodiments of the present disclosure relate to a pixel arrangement structure, a display method thereof, a preparation method, and a display substrate.
  • liquid crystal display (LCD) devices mainly include liquid crystal display (LCD) devices and organic light-emitting diode (OLED) display devices.
  • LCD liquid crystal display
  • OLED organic light-emitting diode
  • the liquid crystal display device has the advantages of simple control, low power consumption, no radiation, and the like, and is widely used in displays, televisions, mobile phones, computers, notebook computers and the like.
  • the organic light emitting diode display device has the advantages of large viewing angle, light volume, fast response speed, high luminous brightness, and the like, and is easy to realize color display and large screen display, and is easy to realize flexible display, and thus has broad application prospects.
  • the pixel arrangement structure of the display panel generally includes a plurality of repeatedly arranged pixel units.
  • Each pixel unit generally includes a red sub-pixel block R, a green sub-pixel block G, and a blue sub-pixel block B that are sequentially arranged.
  • the three sub-pixel blocks respectively emit light with different brightnesses, and since the size of the sub-pixel block is very small, it is visually mixed into a desired color.
  • At least one embodiment of the present disclosure provides a pixel arrangement structure including: a plurality of first color sub-pixel blocks, a plurality of second color sub-pixel blocks, and a plurality of third color sub-pixel blocks distributed in a plurality of minimum repetition regions
  • Each of the minimum repeating regions is a rectangular shape and includes four virtual rectangles, the four virtual rectangles including a first virtual rectangle, and the first virtual rectangle includes a first color sub-pixel block and a second a color sub-pixel block and a third color sub-pixel block, any one side of the first virtual rectangle having an angle other than zero with the first direction, the first direction being a row direction or a column direction, the first The virtual rectangle includes a first side and a second side perpendicular to each other, the first color sub-pixel block being located on a vertical line of the first side, the second color sub-pixel block and the third color sub-pixel Blocks are distributed on both sides of the vertical line of the first side, and the distance between the second color sub-pixel block and the third color sub-pixel
  • an angle between any one side of the first virtual rectangle and the first direction is 10 degrees to 50 degrees.
  • a center of the first color sub-pixel block is located on a vertical line of the first side
  • the second color sub-pixel block and the third Color sub-pixel blocks are distributed on both sides of a vertical line of the first side, and a distance between a center of the second color sub-pixel block and a center of the third color sub-pixel block and the first side are smaller than a distance between a center of the first color sub-pixel block and the first side.
  • the four virtual rectangles further include a second virtual rectangle, a third virtual rectangle, and a fourth virtual rectangle, the first virtual rectangle, the second virtual rectangle,
  • the third virtual rectangle and the fourth virtual rectangle form a 2*2 matrix in a coplanar manner to constitute the minimum repeating region, the second virtual rectangle sharing the first side with the first virtual rectangle, and the a second virtual rectangle and the first virtual rectangle are mirror-symmetrical with respect to the first side, and the first virtual rectangle is translated along a diagonal line thereof, and a length of the diagonal line coincides with the third virtual rectangle
  • the third virtual rectangle is adjacent to the second virtual rectangle, the third virtual rectangle includes a third side, the fourth virtual rectangle shares the third side with the third virtual rectangle, and the The fourth virtual rectangle and the third virtual rectangle are mirror-symmetrical with respect to the third side, and the third side is on the same line as the first side.
  • the first color sub-pixel block is a green sub-pixel block
  • the second color sub-pixel block is a red sub-pixel block
  • the third color sub-pixel is The block is a blue sub-pixel block.
  • the shape of the first color sub-pixel block is a right-angled bottom angle symmetric pentagon, and the right-angled bottom angle symmetric pentagon is about the first side.
  • the mid-perpendicular line is symmetrical, and the bottom edge of the right-angled bottom-angle symmetrical pentagon is parallel to the first side, and the pentagon is symmetric with respect to the right-angled bottom angle in a direction perpendicular to the first side The vertices are further away from the first side.
  • the shape of the second color sub-pixel block and/or the third color sub-pixel block is a right angle bottom angle symmetric pentagon, and the right angle bottom angle a bottom edge of the symmetrical pentagon parallel to the first side or on the first side, and closer to a apex of the symmetrical pentagon with respect to the right angle bottom angle in a direction perpendicular to the first side The first side.
  • the shapes of the second color sub-pixel block and the third color sub-pixel block are both right-angled bottom pentagons, and the right-angled bottom corners are five sides.
  • a bottom edge of the shape parallel to the first side or on the first side, and closer to the first edge with respect to a vertex of the right angle base pentagon in a direction perpendicular to the first side a right angled pentagon including a first oblique edge and a second oblique edge passing through the apex of the right angled pentagon, the first oblique edge and the first one located within the same virtual rectangle
  • the color sub-pixel blocks are oppositely disposed, and the length of the first oblique side is greater than the length of the second oblique side.
  • the shape of the first color sub-pixel block is a right-angled bottom angle symmetric pentagon, and the right-angled bottom angle symmetric pentagon is about the first side.
  • the mid-perpendicular line is symmetrical, and the bottom edge of the right-angled bottom-angle symmetrical pentagon is parallel to the first side, and the pentagon is symmetric with respect to the right-angled bottom angle in a direction perpendicular to the first side
  • the vertex is further away from the first side
  • the right-angled bottom angle symmetrical pentagon includes a third oblique side and a fourth oblique side passing through the right-angled bottom angle symmetric pentagon apex, the third oblique side and the fourth
  • the length of the hypotenuse is the same, the third oblique side of the first color sub-pixel block is parallel to the first oblique side of the second color sub-pixel block located in the same virtual rectangle, and the spacing is a
  • the second color sub-pixel block in the first virtual rectangle and the second virtual rectangle, is more relative to the third color sub-pixel block.
  • the third color sub-pixel block Far from the center of the minimum repeating region, in the third virtual rectangle and the fourth virtual rectangle, the third color sub-pixel block is further away from the minimum repeating region than the second color sub-pixel block a center, wherein the third color sub-pixel block in the first virtual rectangle is adjacent to the second color sub-pixel block in the fourth virtual rectangle, and the third color sub-pixel block in the second virtual rectangle a second color sub-pixel block of the third virtual rectangle adjacent to the second color sub-pixel block, and a second oblique color of the second color sub-pixel block of the fourth virtual rectangle
  • the sides are parallel and the pitch is a third distance, and the second oblique side of the third color sub-pixel block in the second virtual rectangle is parallel to the second oblique side of the second color sub-pixel block in the third virtual rectangle and the spacing is Four distances.
  • the first distance, the second distance, the third distance, and the fourth distance are all equal.
  • the shapes of the second color sub-pixel block and the third color sub-pixel block are each a right-angled trapezoid, and a bottom edge of the right-angled trapezoid is perpendicular to the In the first side, a distance between the right-angled side of the right-angled trapezoid and the first side is smaller than a distance between the oblique side of the right-angled trapezoid and the first side.
  • the shape of the first color sub-pixel block is a right-angled bottom angle symmetric pentagon, and the right-angled bottom angle symmetric pentagon is about the first side.
  • the mid-perpendicular line is symmetrical, and the bottom edge of the right-angled bottom-angle symmetrical pentagon is parallel to the first side, and the pentagon is symmetric with respect to the right-angled bottom angle in a direction perpendicular to the first side
  • the vertex is further away from the first side
  • the right-angled bottom angle symmetrical pentagon includes a third oblique side and a fourth oblique side passing through the right-angled bottom angle symmetric pentagon apex, the third oblique side and the fourth
  • the length of the hypotenuse is the same, the third oblique side of the first color sub-pixel block is parallel to the oblique side of the second color sub-pixel block located in the same virtual rectangle, and the distance is a fifth
  • the third color sub-pixel block is more relative to the second color sub-pixel block.
  • the second color sub-pixel block is closer to the minimum repeating region relative to the third color sub-pixel block Center
  • the third color sub-pixel block in the first virtual rectangle is adjacent to the second color sub-pixel block in the fourth virtual rectangle
  • the third in the second virtual rectangle a color sub-pixel block adjacent to the second color sub-pixel block in the third virtual rectangle, an acute corner portion of the third color sub-pixel block in the first virtual rectangle and the fourth virtual rectangle
  • the acute corner spacing of the second color sub-pixel block is a seventh distance
  • the acute corner spacing of the color sub-pixel block is Eight distance.
  • the fifth distance, the sixth distance, the seventh distance, and the eighth distance are all equal.
  • a distance between a center of the first color sub-pixel block and the first side is greater than or equal to half of a length of the second side and less than or equal to Three-quarters of the length of the second side.
  • the first color sub-pixel block in the third virtual rectangle and the first color in the fourth virtual rectangle is greater than or equal to half the length of the second side and less than or equal to the length of the second side.
  • the second color sub-pixel block of the first virtual rectangle and the second color sub-pixel of the second virtual rectangle are integrated into the same sub-pixel and displayed together as a whole, wherein the two adjacent minimum repeating regions include the first minimum repeat in two of the minimum repeating regions adjacent in a direction perpendicular to the first side a region and a second minimum repeating region, wherein a fourth virtual rectangle of the first minimum repeating region is adjacent to a third virtual rectangle of the second minimum repeating region, and a fourth virtual rectangle of the first minimum repeating region
  • the second color sub-pixel block and the second color sub-pixel block of the third virtual rectangle of the second minimum overlap area are integrated into the same sub-pixel and displayed together as a whole.
  • the third color sub-pixel block of the first virtual rectangle and the third color sub-pixel of the second virtual rectangle are integrated into the same sub-pixel and displayed together as a whole, wherein the two adjacent minimum repeating regions include the first minimum repeat in two of the minimum repeating regions adjacent in a direction perpendicular to the first side a region and a second minimum repeating region, wherein a fourth virtual rectangle of the first minimum repeating region is adjacent to a third virtual rectangle of the second minimum repeating region, and a fourth virtual rectangle of the first minimum repeating region
  • the third color sub-pixel block and the third color sub-pixel block of the third virtual rectangle of the second minimum overlap region are integrated into the same sub-pixel and displayed together as a whole.
  • the pixel arrangement structure constitutes a rectangular arrangement area, and an angle between any side of the rectangular arrangement area and either side of the first virtual rectangle is 45 degrees. .
  • the first direction is parallel or perpendicular to an extending direction of a driving line that drives the pixel arrangement structure.
  • At least one embodiment of the present disclosure further provides a pixel arrangement structure including: a plurality of first color sub-pixel blocks, a plurality of second color sub-pixel blocks, and a plurality of third color sub-pixels distributed in a plurality of minimum repetition regions a block, wherein each of the minimum repeating regions is a rectangular shape and includes four virtual rectangles, the four virtual rectangles include a first virtual rectangle, and the first virtual rectangle includes a first color sub-pixel block, a first a two-color sub-pixel block and a third color sub-pixel block, the pixel arrangement structure constituting a rectangular arrangement area, and an arbitrary side of the first virtual rectangle has an angle other than zero on either side of the rectangular arrangement area
  • the first virtual rectangle includes a first side and a second side perpendicular to each other, a center of the first color sub-pixel block is located on a vertical line of the first side, and the second color sub-pixel block and The third color sub-pixel block is distributed on both sides of a vertical line of the first side,
  • At least one embodiment of the present disclosure further provides a display substrate comprising: a substrate substrate; a plurality of pixels disposed on the substrate substrate; wherein the plurality of pixels adopt the pixels according to any embodiment of the present disclosure Arrange the structure.
  • the four virtual rectangles further include a second virtual rectangle, a third virtual rectangle, and a fourth virtual rectangle, the first virtual rectangle, the second virtual rectangle, and the first a three-virtual rectangle and a fourth virtual rectangle form a 2*2 matrix in a co-edge manner to constitute the minimum repeating region, the second virtual rectangle sharing the first edge with the first virtual rectangle, and the first a second virtual rectangle and the first virtual rectangle are mirror-symmetrical with respect to the first side, the first virtual rectangle translating along a diagonal thereof, the length of the diagonal coincides with the third virtual rectangle, a third virtual rectangle adjacent to the second virtual rectangle, the third virtual rectangle including a third side, the fourth virtual rectangle sharing the third side with the third virtual rectangle, and the fourth The virtual rectangle and the third virtual rectangle are mirror-symmetrical with respect to the third side, the third side is on the same line as the first side, and the first color sub-pixel block includes a first color pixel electrode And set in the a first color light emitting layer
  • the first color light emitting layer of the first color sub-pixel block of the third virtual rectangle and the fourth virtual rectangle is formed by sharing the same single color pattern area, and the two adjacent ones of the two minimum repeat areas adjacent in a direction perpendicular to the first side
  • the minimum repeating region includes a first minimum repeating region and a second minimum repeating region, the first color light emitting layer and the second minimum repeating region of the first color sub-pixel block of the first virtual rectangle of the first minimum repeating region
  • the first color light-emitting layer of the first color sub-pixel block of the second virtual rectangle is formed by sharing the same single color pattern area.
  • the first color sub-pixel block of the third virtual rectangle formed by sharing the same single color graphics region is The area of the first color light emitting layer of the first color light emitting layer and the first color sub-pixel block of the fourth virtual rectangle is larger than the area of the first color sub-pixel block of the third virtual rectangle a sum of an area of the first color pixel electrode and an area of the first color pixel electrode of the first color sub-pixel block of the fourth virtual rectangle adjacent in a direction perpendicular to the first side Of the two minimum repeating regions, the adjacent two minimum repeating regions include a first minimum repeating region and a second minimum repeating region, and the first minimum repeating region formed by sharing the same single color graphic region The first color light emitting layer of the first color sub-pixel block of the first virtual rectangle and the first color sub-pixel block of the second virtual rectangle of the second minimum repeating area An area of the first color light emitting layer is larger than an area of the first color pixel electrode
  • the second color pixel electrode of the second color sub-pixel block of the first virtual rectangle and the second virtual rectangle are merged into the same pixel electrode, and the two adjacent minimum repeats in the two minimum repeat regions adjacent in the direction perpendicular to the first side
  • the region includes a first minimum repeating region and a second minimum repeating region, the second color pixel electrode of the second color sub-pixel block of the fourth virtual rectangular region of the first minimum repeating region and the second minimum repeating region
  • the second color pixel electrodes of the second color sub-pixel block of the third virtual rectangle are merged into the same pixel electrode.
  • the third color pixel electrode of the third color sub-pixel block of the first virtual rectangle and the second virtual rectangle are merged into the same pixel electrode, and the two adjacent minimum repeats in the two minimum repeat regions adjacent in the direction perpendicular to the first side
  • the region includes a first minimum repeating region and a second minimum repeating region, the third color pixel electrode of the third color sub-pixel block of the fourth virtual rectangular of the first minimum repeating region and the second minimum repeating region
  • the third color pixel electrodes of the third color sub-pixel block of the third virtual rectangle are merged into the same pixel electrode.
  • the first color sub-pixel block includes a first color filter
  • the second color sub-pixel block includes a second color filter
  • the third The color sub-pixel block includes a third color filter
  • At least one embodiment of the present disclosure further provides a display method of a pixel arrangement structure according to any one of the embodiments of the present disclosure, including: respectively, the first color sub-pixel block along the first direction and the first The direction perpendicular to the direction is connected as a plurality of virtual lines crossing each other, determining that the intersection of the virtual lines is a virtual pixel; assigning display data to the virtual pixel; according to two adjacent to each of the virtual rectangles The display data of the virtual pixel points calculates display data of the sub-pixel block within the corresponding virtual rectangle.
  • two virtual pixel points corresponding to one of the virtual rectangles in two of the virtual rectangles adjacent in a direction perpendicular to the first side Distributed in the first direction, two virtual pixel points corresponding to another of the virtual rectangles are distributed in a direction perpendicular to the first direction.
  • calculating display data of a sub-pixel block in a corresponding virtual rectangle according to display data of two virtual pixel points adjacent to the virtual rectangle includes: calculating by using an interpolation method Display data of sub-pixel blocks within the virtual rectangle.
  • At least one embodiment of the present disclosure further provides a method for fabricating a pixel arrangement structure according to any of the embodiments of the present disclosure, including: depositing a thin metal mask on an array substrate to form the pixel arrangement structure; The web direction of the fine metal mask has an angle of not zero with the first direction.
  • FIG. 1 is a schematic diagram of a pixel arrangement structure according to an embodiment of the present disclosure
  • FIG. 2 is a schematic diagram of a shape of a sub-pixel block in a pixel arrangement structure according to an embodiment of the present disclosure
  • FIG. 3 is a schematic diagram of another pixel arrangement structure according to an embodiment of the present disclosure.
  • FIG. 4 is a schematic diagram of another pixel arrangement structure according to an embodiment of the present disclosure.
  • FIG. 5 is a schematic diagram of another pixel arrangement structure according to an embodiment of the present disclosure.
  • FIG. 6 is a schematic diagram of another pixel arrangement structure according to an embodiment of the present disclosure.
  • FIG. 7 is a schematic cross-sectional view of a display substrate according to an embodiment of the present disclosure.
  • FIG. 8 is a partial plan view showing another display substrate according to an embodiment of the present disclosure.
  • 9A is a cross-sectional view of the display substrate taken along line A-A' of FIG. 8 according to an embodiment of the present disclosure
  • FIG. 9B is a schematic cross-sectional view of another display substrate according to an embodiment of the present disclosure.
  • FIG. 10 is a flowchart of a display method according to an embodiment of the present disclosure.
  • FIG. 11 is a schematic diagram of a pixel arrangement structure according to an embodiment of the present disclosure.
  • the requirements for the resolution of display devices are getting higher and higher.
  • the display device needs to achieve high resolution display, the number of pixels required is large.
  • the purpose of improving the resolution of the display device is generally achieved by reducing the size of the pixels and reducing the spacing between the pixels. Therefore, as the process technology continues to be refined, the process difficulty and manufacturing cost of the display device are correspondingly increased.
  • At least one embodiment of the present disclosure provides a pixel arrangement structure, a display method thereof, a preparation method, and a display substrate.
  • the pixel arrangement structure can equalize the distribution of RGB sub-pixel blocks, avoiding colored edges at the edges of the screen, and help to improve display quality, and can realize real pixel display with 300 PPI or slightly higher resolution.
  • the pixel arrangement structure includes a plurality of first color sub-pixel blocks, a plurality of second color sub-pixel blocks, and a plurality of third color sub-pixel blocks distributed in the plurality of minimum repetition regions.
  • Each of the minimum repeating regions is a rectangular shape and includes four virtual rectangles, the four virtual rectangles including a first virtual rectangle, and the first virtual rectangle includes a first color sub-pixel block and a second color sub-pixel A block and a third color sub-pixel block. Any one side of the first virtual rectangle has an angle other than zero with the first direction, and the first direction is a row direction or a column direction.
  • the first virtual rectangle includes a first side and a second side perpendicular to each other, the first color sub-pixel block is located on a vertical line of the first side, the second color sub-pixel block and the first The three color sub-pixel blocks are distributed on both sides of the vertical line of the first side, and the distance between the second color sub-pixel block and the third color sub-pixel block and the first side are smaller than the first The distance of a color sub-pixel block from the first side.
  • FIG. 1 is a schematic diagram of a pixel arrangement structure according to an embodiment of the present disclosure.
  • a plurality of first color sub-pixel blocks 111, a plurality of second color sub-pixel blocks 112, and a plurality of third color sub-pixel blocks 113 are distributed in a plurality of minimum overlap regions 100.
  • a plurality of minimum repeating regions 100 are repeatedly arranged.
  • the repeating arrangement refers to the repeated arrangement of sub-pixel blocks in the minimum repeating area 100, without including the driving lines or other components, and the driving lines or other components in the different minimum repeating areas 100 may be the same or different.
  • each of the minimum repeating regions 100 is a rectangular shape (eg, a square).
  • each of the minimum repeating regions 100 includes four virtual rectangles, which are a first virtual rectangle 110, a second virtual rectangle 120, a third virtual rectangle 130, and a fourth virtual rectangle 140, respectively.
  • Either side of each virtual rectangle has an angle other than zero with the first direction.
  • the angle between any side of each virtual rectangle and the first direction is 10 degrees to 50 degrees.
  • the embodiment of the present disclosure is not limited thereto, and the angle between any side of each virtual rectangle and the first direction may also be 40 degrees to 50 degrees, or even 45 degrees.
  • angle setting it is possible to better eliminate the occurrence of aliasing in the horizontal direction or the vertical direction when a color edge appears on the edge of the screen and a partial image is displayed.
  • the angle is 40 degrees to 50 degrees (including 40 degrees), it is advantageous to reduce the phenomenon that the display screen is parallel to the edge of the first direction and the edge of the first direction is colored or jagged, and the human eye is lowered.
  • the degree of recognition is such that both the horizontal direction and the vertical direction of the screen display are taken into consideration.
  • the angle is 45 degrees, the color edges appearing at the edge of the picture can be better eliminated, so that the edge of the picture parallel to the first direction and the edge perpendicular to the first direction have better display effects.
  • the angle is 10 degrees to 40 degrees (excluding 40 degrees), it may be more advantageous to eliminate a color edge or a zigzag pattern in which the display image is parallel to the edge in the first direction or perpendicular to the edge in the first direction.
  • the angle of the angle may be determined within the above range of angles according to requirements, thereby facilitating the display panel. Uniformity of the brightness distribution.
  • the angle between any side of each virtual rectangle and the first direction may be, for example, 30 degrees, 20 degrees, 15 degrees, 10 degrees, etc., to adjust the distribution of the brightness center, and optimize some specific The direction is displayed in the horizontal or vertical direction.
  • the first direction is the row direction or the column direction.
  • the row direction or column direction displays the specified row direction or column direction for the matrix.
  • the first direction is, for example, parallel or perpendicular to the extending direction of the driving line for driving the pixel arrangement structure on the display panel.
  • the first direction is parallel or perpendicular to the horizontal direction when the human eye is viewed. Therefore, the angle of either side of each virtual rectangle may be, for example, an oblique 45 degrees.
  • "oblique" refers to, for example, relative in the viewing plane.
  • the display area of the display panel is a rectangle
  • either side of each virtual rectangle has an angle with either side of the display area, for example, the angle is 45 degrees.
  • the first virtual rectangle 110, the second virtual rectangle 120, the third virtual rectangle 130, and the fourth virtual rectangle 140 form a 2*2 matrix in a coplanar manner to constitute the minimum overlap region 100.
  • co-edge means that two adjacent virtual rectangles are adjacent to each other and have overlapping sides.
  • the first virtual rectangle 110 includes a first side 1101 and a second side 1102 that are perpendicular to each other.
  • the second virtual rectangle 120 shares the first side 1101 with the first virtual rectangle 110, and the second virtual rectangle 120 and the first virtual rectangle 110 are mirror-symmetrical with respect to the first side 1101.
  • the two virtual rectangles are mirror-symmetrical, meaning that the virtual rectangles and the sub-pixel blocks within the virtual rectangle are mirror-symmetrical.
  • the length of the first virtual rectangle 110 along its diagonal translation diagonal coincides with the third virtual rectangle 130, and the third virtual rectangle 130 is adjacent to the second virtual rectangle 120.
  • two virtual rectangles coincide, meaning that the virtual rectangle and the sub-pixel blocks within the virtual rectangle are coincident.
  • the third virtual rectangle 130 includes a third edge 1303, the fourth virtual rectangle 140 shares a third edge 1303 with the third virtual rectangle 130, and the fourth virtual rectangle 140 and the third virtual rectangle 130 are mirror-symmetrical with respect to the third edge 1303.
  • the three sides 1303 are on the same line as the first side 1101.
  • the first virtual rectangle 110 includes a first color sub-pixel block 111, a second color sub-pixel block 112, and a third color sub-pixel block 113.
  • the first color sub-pixel block 111, the second color sub-pixel block 112, and the third color sub-pixel block 113 constitute a first pixel unit.
  • the first color sub-pixel block 111, the second color sub-pixel block 112, and the third color sub-pixel block 113 in the second virtual rectangle 120, the third virtual rectangle 130, and the fourth virtual rectangle 140 respectively constitute the second pixel. a unit, a third pixel unit, and a fourth pixel unit.
  • the first color sub-pixel block 111 (e.g., the center of the first color sub-pixel block 111) is located on the vertical line 1105 of the first side 1101.
  • the second color sub-pixel block 112 and the third color sub-pixel block 113 are distributed on both sides of the vertical line 1105 of the first side 1101.
  • the distance between the second color sub-pixel block 112 (eg, the center of the second color sub-pixel block 112) and the third color sub-pixel block 113 (eg, the center of the third color sub-pixel block 113) and the first side 1101 is less than the first color
  • the distance of the sub-pixel block 111 (for example, the center of the first color sub-pixel block 111) from the first side 1101.
  • the second color sub-pixel block 112 and the third color sub-pixel block 113 are closer to the first side 1101 than the first color sub-pixel block 111.
  • the second color sub-pixel block 112 and the third color sub-pixel block 113 are mirror-symmetrical with respect to the mid-perpendicular line 1105, which makes the distribution of each sub-pixel block more uniform.
  • the second color sub-pixel block 112 and the third color sub-pixel block 113 are located at both ends of the first side 1101, so that the distance between the second color sub-pixel block 112 and the third color sub-pixel block 113 can be made more distant from each other. Large and easy to manufacture.
  • the edge distances of the first color sub-pixel block 111, the second color sub-pixel block 112, and the third color sub-pixel block 113 are equal to each other to make the distribution of the pixel arrangement structure more uniform.
  • the center of a pixel block refers to a luminance center or a color center of a pixel block.
  • the center of the pixel block can also be the geometric center of the pixel block pattern.
  • the sub-pixels (that is, the respective sub-pixel blocks described above) are generally designed in a regular shape, such as a hexagon, a pentagon, a trapezoid or other shapes.
  • the center of the sub-pixel may be the geometric center of the regular shape described above.
  • the shape of the formed sub-pixels generally deviates from the regular shape of the above design. For example, the corners of the shape of the above rule may become rounded, and therefore, the shape of the sub-pixel may be a rounded figure.
  • the shape of the actually fabricated sub-pixel may also have other variations from the shape of the design.
  • the shape of a sub-pixel designed as a hexagon may become an approximately elliptical shape in actual fabrication. Therefore, the center of the sub-pixel may not be the strict geometric center of the irregular shape of the sub-pixel formed.
  • the center of the sub-pixel may have a certain offset from the geometric center of the shape of the sub-pixel.
  • the center of the sub-pixel refers to any point in the area enclosed by a specific point on the radiant line of each point of the sub-pixel from the geometric center of the sub-pixel, the specific point on the radiant line is at a distance from the geometric center 1 /3 The length of the radiation segment.
  • the definition of the center of the sub-pixel applies to the center of a regular-shaped sub-pixel, and also to the center of an irregular-shaped sub-pixel.
  • the actual fabricated sub-pixel shape may deviate from the designed sub-pixel shape due to various manufacturing errors. Therefore, in the present disclosure, there may be a certain error in the relationship between the position involving the center of the sub-pixel and the position of the sub-pixel center and other objects.
  • a line connecting the centers of sub-pixels or a line passing through the center of a sub-pixel if the lines satisfy corresponding other definitions (for example, an extending direction), the lines may pass through the area enclosed by the specific point of the above-mentioned radiant line segment.
  • the center of the sub-pixel is located on a certain line, which means that the line passes through a region enclosed by a specific point of the above-mentioned radiation segment.
  • coincident means that at least 70% of the area of the corresponding sub-pixel or other component can be coincident;
  • mirror symmetry as described in the present disclosure means after mirroring operation At least 70% of the area of the corresponding sub-pixels can be overlapped.
  • the first color sub-pixel block 111 in the third virtual rectangle 130 and the center of the first color sub-pixel block 111 in the fourth virtual rectangle 140 When the distance is S, then 0.5h ⁇ S ⁇ h.
  • h is the length of the second side 1102.
  • the distance between the center of the first color sub-pixel block 111 and the first side 1101 is L, then 0.5h ⁇ L ⁇ 0.75h, and h is the length of the second side 1102.
  • the first color sub-pixel block 111 serves as a center of luminance, thereby making the light emission of the pixel arrangement structure more uniform.
  • the length of the second side 1102 may be equal to the length of the first side 1101 or may not be equal to the length of the first side 1101. This embodiment of the present disclosure does not limit this.
  • the first color sub-pixel block 111, the second color sub-pixel block 112, and the third color sub-pixel block 113 may be separately used as one sub-pixel for display, the first color in each virtual rectangle
  • the sub-pixel block 111, the second color sub-pixel block 112, and the third color sub-pixel block 113 may constitute a pixel unit for color display.
  • embodiments of the present disclosure include, but are not limited to, the first color sub-pixel block 111, the second color sub-pixel block 112, and the third color sub-pixel block 113, respectively, and adjacent concentric dice in different virtual rectangles.
  • the pixel blocks are merged into one sub-pixel, for example, at the common edges of adjacent virtual rectangles for display.
  • the first side 1101 passes through the merged sub-pixels, and the merged sub-pixels are symmetric about the first side 1101.
  • the first color sub-pixel block 111 is a sensitive color sub-pixel. Since the sensitivity of the human eye to color is different, adjacent sensitive color sub-pixels are more likely to be adjacent when the adjacent sensitive color sub-pixels are closer to each other, and the adjacent two sensitive color sub-pixels are difficult to distinguish. A situation in which the human eye is visually combined into one. Thereby, the pixel arrangement structure can improve the distribution uniformity of the sensitive color sub-pixels, thereby improving the visual resolution and improving the display quality. It should be noted that when the pixel arrangement structure adopts the red, green and blue (RGB) mode, the above sensitive color is green.
  • RGB red, green and blue
  • the first color sub-pixel block 111 is a green sub-pixel block G
  • the second color sub-pixel block 112 is a red sub-pixel block R
  • the third color sub-pixel block 113 is a blue sub-pixel block B.
  • the first color sub-pixel block 111, the second color sub-pixel block 112, and the third color sub-pixel block 113 may be sub-pixel blocks of any color, such as a yellow sub-pixel block, white. Sub-pixel block, etc.
  • the first color sub-pixel block 111 in the third virtual rectangle 130 and the first color sub-pixel block 111 in the fourth virtual rectangle 140 are formed by the same mask opening to facilitate processing.
  • FIG. 2 is a schematic diagram of a shape of a sub-pixel block in a pixel arrangement structure according to an embodiment of the present disclosure.
  • the shape and distribution of the sub-pixel block will now be described with reference to FIGS. 1 and 2.
  • the shapes of the first color sub-pixel block 111, the second color sub-pixel block 112, and the third color sub-pixel block 113 are all right-angled bottom-angle symmetrical pentagons.
  • the right angle bottom angle symmetrical pentagon includes a bottom edge 210 and a vertex 220.
  • the bottom edge 210 is adjacent to two right-angled bottom corners of the right-angled bottom angle symmetrical pentagon.
  • the intersection on the mid-perpendicular line of the bottom side 210 is the apex 220.
  • the first color sub-pixel block 111 is symmetric about a vertical line 1105 of the first side 1101, and the bottom side 210 of the first color sub-pixel block 111 is parallel to the first side 1101 and opposite to the first side 1101.
  • the vertices 220 of one color sub-pixel block 111 are further away from the first side 1101.
  • the bottom side 210 of the second color sub-pixel block 112 is parallel to the first side 1101 or on the first side 1101, and is closer to the apex 220 of the second color sub-pixel block 112 in a direction perpendicular to the first side 1101.
  • the first side is 1101.
  • the bottom side 210 of the third color sub-pixel block 113 is parallel to the first side 1101 or on the first side 1101, and is closer to the apex 220 of the third color sub-pixel block 113 in a direction perpendicular to the first side 1101.
  • the first side is 1101.
  • the second color sub-pixel block 112 and the third color sub-pixel block 113 are mirror-symmetrical with respect to the mid-perpendicular line 1105 of the first side 1101.
  • the shape and size of the first color sub-pixel block 111, the second color sub-pixel block 112, and the third color sub-pixel block 113 are identical, so that the illumination of the sub-pixel blocks of the respective colors can be made more uniform.
  • the distance between adjacent edges of the two first color sub-pixel blocks 111 is greater than or equal to 12 microns or greater than or equal to 14 microns.
  • the two first color sub-pixel blocks 111 have an axis of symmetry parallel to the mid-perpendicular line 1105 (eg, as shown in FIG. 1 , the first color sub-pixel block 111 and the fourth virtual rectangle 140 in the third virtual rectangle 130)
  • the axis of symmetry of the first color sub-pixel block 111 is parallel to the mid-perpendicular line 1105, and the axis of symmetry passes through the respective vertices of the two first color sub-pixel blocks 111).
  • the distance between the two first color sub-pixel blocks 111 each parallel to the intersection of the side of the third side 1303 and the axis of symmetry is greater than or equal to 12 microns or greater than or equal to 14 microns.
  • the two first color sub-pixel blocks 111 in each of the minimum repeating regions 100 are, for example, the first ones of the first color sub-pixel block 111 and the fourth virtual rectangle 140 in the third virtual rectangle 130.
  • the edges of the two first color sub-pixel blocks 111 adjacent to each other refer to the sides of the two first color sub-pixel blocks 111 that are respectively parallel to the third side 1303.
  • the above distances of the two first color sub-pixel blocks 111 can be set to different values according to different resolution conditions.
  • the distance between adjacent edges of the two first color sub-pixel blocks 111 is greater than or equal to 12 microns in the case of a quarter full HD resolution, and greater than or equal to the full HD resolution. 14 microns.
  • the shapes and sizes of the first color sub-pixel block 111, the second color sub-pixel block 112, and the third color sub-pixel block 113 are not limited, and the shapes and sizes of the three are different. They may be the same or different, which may be determined according to actual process conditions.
  • the shapes of the first color sub-pixel block 111, the second color sub-pixel block 112, and the third color sub-pixel block 113 are trapezoidal, and the second color sub-pixel block 112 and the third color sub-pixel The block 113 is no longer mirror-symmetrical with respect to the vertical line 1105 of the first side 1101, so that the light-emitting area of each color sub-pixel block can be flexibly set to meet diverse display requirements.
  • FIG. 3 is a schematic diagram of another pixel arrangement structure according to an embodiment of the present disclosure.
  • the pixel arrangement structure of this embodiment is substantially the same as the pixel arrangement structure shown in FIG. 1 except for the arrangement of the second color sub-pixel block 112 and the third color sub-pixel block 113.
  • the adjacent two second color sub-pixel blocks 112 are integrated into the same sub-pixel (ie, integrally formed), and the adjacent two third color sub-pixel blocks 113 are also integrated into the same sub-pixel.
  • the sub-pixels in which the two second color sub-pixel blocks 112 are integrated are driven as a whole to emit light as a whole
  • the sub-pixels in which the two third color sub-pixel blocks 113 are integrated are driven as a whole so that It emits light as a whole.
  • the two minimum repeating regions adjacent in the direction perpendicular to the first side 1101 are the first minimum repeating region 1001 and the second minimum repeating region 1002, respectively.
  • the second color sub-pixel block 112 in the first virtual rectangle 110 and the second color sub-pixel block 112 in the second virtual rectangle 120 are integrated into the same a sub-pixel
  • the second color sub-pixel block 112 in the first virtual rectangle 110 and the second color sub-pixel block 112 in the second virtual rectangle 120 are respectively part of the integrated sub-pixel
  • the integrated sub-pixel The center is located on the first side 1101.
  • the third color sub-pixel block 113 in the first virtual rectangle 110 and the third color sub-pixel block 113 in the second virtual rectangle 120 are integrated into the same sub-pixel, the third color sub-pixel block 113 in the first virtual rectangle 110 and The third color sub-pixel block 113 in the second virtual rectangle 120 is respectively a part of the integrated sub-pixel, and the center of the integrated sub-pixel is located on the first side 1101. Similarly, in the first minimum overlap region 1001, the second color sub-pixel block 112 and the third color sub-pixel block 113 are also in the same arrangement.
  • the fourth virtual rectangle 140 in the first minimum overlap region 1001 and the third virtual rectangle 130 in the second minimum overlap region 1002 are adjacent and have a shared edge.
  • the second color sub-pixel block 112 of the fourth virtual rectangle 140 of the first minimum overlap region 1001 and the second color sub-pixel block 112 of the third virtual rectangle 130 of the second minimum overlap region 1002 are integrated into the same sub-pixel, the above two
  • the second color sub-pixel block 112 is respectively a part of the integrated sub-pixel, and the center of the integrated sub-pixel is located at the fourth virtual rectangle 140 of the first minimum repeating region 1001 and the third of the second minimum repeating region 1002.
  • the shared edge of the virtual rectangle 130 is provided.
  • the third color sub-pixel block 113 of the fourth virtual rectangle 140 of the first minimum overlap region 1001 and the third color sub-pixel block 113 of the third virtual rectangle 130 of the second minimum overlap region 1002 are integrated into the same sub-pixel, the above two
  • the third color sub-pixel block 113 is respectively a part of the integrated sub-pixel, and the center of the integrated sub-pixel is located at the fourth virtual rectangle 140 of the first minimum repeating region 1001 and the third of the second minimum repeating region 1002.
  • the shared edge of the virtual rectangle 130 is provided.
  • the adjacent two second color sub-pixel blocks 112 and/or the adjacent two third color sub-pixel blocks 113 are integrated into the same sub-pixel, and the same opening can be used in the FMM process, thereby simplifying the process and reducing the process difficulty. And production costs.
  • the shape of the adjacent two second color sub-pixel blocks 112 and/or the adjacent two third color sub-pixel blocks 113 after integration is hexagonal.
  • the second color sub-pixel block 112 and the third color sub-pixel block 113 may be integrated at the same time, or only one of them may be integrated. In the pixel arrangement structure, all adjacent second color sub-pixel blocks 112 and third color sub-pixel blocks 113 may be integrated, or only partially adjacent second color sub-pixel blocks 112 and third color sub-pixel blocks may be integrated. 113.
  • the shape of the sub-pixel after integration is not limited, and may be any shape such as a hexagon, a pentagon, or a trapezoid.
  • FIG. 4 is a schematic diagram of another pixel arrangement structure according to an embodiment of the present disclosure.
  • the pixel arrangement structure constitutes a rectangular array area 300 (an area surrounded by a solid line in FIG. 4).
  • the rectangular array area 300 is a display area.
  • two sides are parallel to the first direction, and the other two sides are perpendicular to the first direction.
  • the first direction is, for example, a row direction or a column direction.
  • An angle between any one of the rectangular array regions 300 and either side of the first virtual rectangle 110 is 40 to 50 degrees, for example, the angle is 45 degrees.
  • any one side of the rectangular array area 300 and the second virtual rectangle 120, The angle between any of the three virtual rectangles 130 and the fourth virtual rectangle 140 is also 45 degrees. This way, it is possible to avoid the occurrence of color edges at the edges of the screen (for example, blue or red edges appearing in the direction of either side of the rectangular array area 300), which contributes to an improvement in display quality.
  • the horizontal direction when viewed by the human eye is the same as or perpendicular to the first direction. Since the human eye is sensitive to the picture quality in the horizontal or vertical direction, and is less sensitive to the picture quality in the direction of the angle of 45 degrees with the horizontal direction, the overall display quality can be improved.
  • the first direction is a matrix showing a prescribed row direction or column direction.
  • the display panel includes driving lines (eg, scan lines or data lines) that drive the pixel arrangement structure, the first direction being parallel to or perpendicular to the extending direction of the driving lines.
  • the shape of the area formed by the pixel arrangement structure in this embodiment is not limited, and may be a rectangle, a square, or other suitable shape.
  • the angular relationship between any side of the first virtual rectangle 110 and the area may be determined according to actual needs. For example, when one side of the area is the same as the horizontal direction when viewed by the human eye, either side of the first virtual rectangle 110 has an angle with the one side.
  • the distribution pattern of the pixel arrangement structure in this embodiment is substantially the same as the pixel arrangement structure described in FIG. 1, and details are not described herein again.
  • FIG. 5 is a schematic diagram of another pixel arrangement structure according to an embodiment of the present disclosure.
  • the shapes of the second color sub-pixel block 112 and the third color sub-pixel block 113 are all right-angled trapezoids, and the bottom edge of the right-angled trapezoid is perpendicular to the first side 1101, and the distance between the right-angled side of the right-angled trapezoid and the first side 1101 It is smaller than the distance between the oblique side of the right-angled trapezoid and the first side 1101. As shown in FIG.
  • the hypotenuses of the second color sub-pixel block 112 and the third color sub-pixel block 113 may be oppositely disposed (face-to-face) with the first color sub-pixel block 111, and the second color sub-pixel block 112 and The oblique sides of the third color sub-pixel block 113 are parallel or nearly parallel to the two oblique sides of the first color sub-pixel block 111, respectively, so that the process precision is constant, that is, the first color sub-pixel block 111 is respectively In the case where the distance from the edge of the second color sub-pixel block 112 and the third color sub-pixel block 113 is constant, the areas of the second color sub-pixel block 112 and the third color sub-pixel block 113 are increased.
  • the pixel arrangement structure can improve the utilization of the space within the virtual rectangle.
  • the shapes of the second color sub-pixel block 112 and the third color sub-pixel block 113 are both right-angled trapezoids, the shapes of the second color sub-pixel block 112 and the third color sub-pixel block 113 are both right angle and bottom angle symmetry.
  • the acute color portion 190 of the second color sub-pixel block 112 and the third color sub-pixel block 113 may further increase the areas of the second color sub-pixel block 112 and the third color sub-pixel block 113, thereby further improving Utilization of space within a virtual rectangle.
  • the shape of the first color sub-pixel block 111 is a right-angled bottom-angle symmetrical pentagon, and the right-angled bottom-angle symmetrical pentagon is symmetric about the mid-perpendicular line of the first side, and a right angle
  • the bottom edge of the bottom angle symmetrical pentagon is parallel to the first side 1101, and the apex of the pentagon is more distant from the first side with respect to the right angle base angle in a direction perpendicular to the first side, the right angle bottom angle symmetry pentagon
  • the third oblique side 193 and the fourth oblique side 194 passing through the apex of the right angle corner symmetrical pentagon, the third oblique side 193 and the fourth oblique side 194 are the same length, and the third oblique side 193 of the first color sub-pixel block 111 Parallel to the oblique side of the second color sub-pixel block 112 located in the same virtual rectangle and having
  • the third color sub-pixel block 113 is closer to the minimum repeating region 100 with respect to the second color sub-pixel block 112.
  • the second color sub-pixel block 112 is closer to the center of the minimum repeating region 100 with respect to the third color sub-pixel block 113, and the third in the first virtual rectangle 110
  • the color sub-pixel block 113 is adjacent to the second color sub-pixel block 112 of the fourth virtual rectangle 140, and the second color sub-pixel block 113 of the second virtual rectangle 120 and the second color sub-pixel block of the third virtual rectangle 130 112, the acute angle portion 190 of the third color sub-pixel block 113 in the first virtual rectangle 110 and the acute angle portion 190 of the second color sub-pixel block 112 in the fourth virtual rectangle 140 are spaced apart by a seventh distance d7, and second An acute angle portion of the acute angle portion 190 of the third color sub-pixel block 113 in
  • the fifth distance d5, the sixth distance d6, the seventh distance d7, and the eighth distance d8 are all equal.
  • the third color sub-pixel block 113 and the second color sub-pixel block 112 may also each have an asymmetrical shape, for example, asymmetric with respect to any straight line passing through the center thereof. .
  • FIG. 6 is a schematic diagram of another pixel arrangement structure according to an embodiment of the present disclosure.
  • the shapes of the second color sub-pixel block 112 and the third color sub-pixel block 113 are both right-angled bottom pentagons, and the bottom side of the right-angled bottom pentagon is parallel to the first side 1101 or on the first side.
  • the right-angled bottom-angle pentagon including a first oblique passing through a right-angled bottom-angle pentagon
  • the side 191 and the second oblique side 192 are opposite to the first color sub-pixel block 111 located in the same virtual rectangle, and the length of the first oblique side 191 is greater than the length of the second oblique side 192.
  • the first oblique side 191 of the second color sub-pixel block 112 is disposed opposite to the first color sub-pixel block 111
  • the first oblique side 191 of the third color sub-pixel block 113 is opposite to the first color sub-pixel block 111. Therefore, in the case where the process precision is constant, that is, when the first color sub-pixel block 111 has a certain distance from the edge of the second color sub-pixel block 112 and the third color sub-pixel block 113, respectively, the second color sub is added.
  • the area of the pixel block 112 and the third color sub-pixel block 113 thereby increasing the utilization of the space within the virtual rectangle.
  • the shapes of the second color sub-pixel block 112 and the third color sub-pixel block 113 are both rectangular corner pentagons, the shapes of the second color sub-pixel block 112 and the third color sub-pixel block 113 are both In the case of a rectangular symmetrical pentagon, the second color sub-pixel block 112 and the second slanted edge 192 of the third color sub-pixel block 113 may further add the second color sub-pixel block 112 and the third color sub-pixel.
  • the area of the pixel block 113 thereby further improving the utilization of the space within the virtual rectangle; the second color sub-pixel is opposite to the case where the shapes of the second color sub-pixel block 112 and the third color sub-pixel block 113 are both right-angled trapezoids
  • the second oblique side 192 of the block 112 and the third color sub-pixel block 113 can reduce the manufacturing difficulty.
  • the shapes of the second color sub-pixel block and the third color sub-pixel block can adopt a right-angled bottom angle and five sides. shape.
  • the shape of the first color sub-pixel block 111 is a right-angled bottom angle symmetrical pentagon, which is symmetric with respect to the mid-perpendicular line 1105 of the first side 1101, and the right-angled bottom angle is symmetrical with a pentagon
  • the bottom edge is parallel to the first side 1101, and the apex of the symmetrical pentagon is further away from the first side 1101 with respect to the right angle base angle in a direction perpendicular to the first side 1101.
  • the right angle bottom angle symmetrical pentagon includes a third oblique side 193 and a fourth oblique side 194 that pass through a right angled bottom angle symmetrical pentagon apex, and the third oblique side 193 and the fourth oblique side 194 have the same length.
  • the third oblique side 193 of the first color sub-pixel block 111 is parallel to the first oblique side 191 of the second color sub-pixel block 112 located in the same virtual rectangle and spaced apart by a first distance d1, and the first color sub-pixel block 111
  • the fourth oblique side 194 is parallel to the first oblique side 191 of the third color sub-pixel block 113 located in the same virtual rectangle and has a second distance d2.
  • the second color sub-pixel block 112 is further away from the center of the minimum repeating region 100 with respect to the third color sub-pixel block 113.
  • the third color sub-pixel block 113 is further away from the center of the minimum repeating region 100 with respect to the second color sub-pixel block 112.
  • the third color sub-pixel block 113 in the first virtual rectangle 110 is adjacent to the second color sub-pixel block 112 in the fourth virtual rectangle 140, and the third color sub-pixel block 113 and the third virtual rectangle in the second virtual rectangle 120
  • the second color sub-pixel block 112 in 130 is adjacent.
  • the second oblique side 192 of the third color sub-pixel block 113 in the first virtual rectangle 110 is parallel to the second oblique side 192 of the second color sub-pixel block 112 in the fourth virtual rectangle 140 and has a third distance d3.
  • the second oblique side 192 of the third color sub-pixel block 113 in the second virtual rectangle 120 is parallel to the second oblique side 192 of the second color sub-pixel block 112 in the third virtual rectangle 130 and has a fourth distance d4.
  • the first distance d1, the second distance d2, the third distance d3, and the fourth distance d4 are all equal.
  • At least one embodiment of the present disclosure also provides a pixel arrangement structure.
  • the pixel arrangement structure includes: a plurality of first color sub-pixel blocks, a plurality of second color sub-pixel blocks, and a plurality of third color sub-pixel blocks distributed in the plurality of minimum repetition regions, each of the minimum repetition regions being a rectangle
  • the shape includes four virtual rectangles, the four virtual rectangles including a first virtual rectangle, and the first virtual rectangle includes a first color sub-pixel block, a second color sub-pixel block, and a third color sub-pixel Piece.
  • the pixel arrangement structure constitutes a rectangular array area, and any one side of the first virtual rectangle has an angle other than zero on either side of the rectangular array area.
  • the first virtual rectangle includes a first side and a second side perpendicular to each other, a center of the first color sub-pixel block is located on a vertical line of the first side, and the second color sub-pixel block and the The third color sub-pixel block is distributed on both sides of the vertical line of the first side, the center of the second color sub-pixel block and the center of the third color sub-pixel block and the first side The distances are each smaller than the distance between the center of the first color sub-pixel block and the first side.
  • At least one embodiment of the present disclosure also provides a display substrate.
  • the display substrate includes a substrate substrate and a plurality of pixels disposed on the substrate, the plurality of pixels adopting a pixel arrangement structure according to any of the embodiments of the present disclosure.
  • the display substrate can equalize the distribution of RGB sub-pixel blocks, avoiding colored edges at the edges of the screen, which helps to improve display quality, and can realize real pixel display with 300 PPI or slightly higher resolution.
  • FIG. 7 is a schematic cross-sectional view of a display substrate according to an embodiment of the present disclosure.
  • the display substrate includes a base substrate 41 and a plurality of pixels 42.
  • the base substrate 41 serves as a carrier for supporting, protecting, and the like, and may be a glass substrate, a plastic substrate, or the like.
  • a plurality of pixels 42 are disposed on the base substrate 41 and configured to be displayed in accordance with display data.
  • the plurality of pixels 42 adopt the pixel arrangement structure described in any of the embodiments of the present disclosure.
  • the display substrate can be applied to a liquid crystal display panel or an organic light emitting diode display panel.
  • the display substrate may be, for example, an array substrate or a color filter substrate, and the like, which is not limited in the embodiment of the present disclosure.
  • FIG. 8 is a partial plan view of another display substrate according to an embodiment of the present disclosure.
  • FIG. 9A is a cross-sectional view of the display substrate taken along line A-A' of FIG. 8 according to an embodiment of the present disclosure.
  • the first color sub-pixel block 111 includes a first color pixel electrode 1110 and a first color light-emitting layer 1111 disposed on the first color pixel electrode 1110, and the second color sub-pixel block 112 includes a second color pixel.
  • the third color sub-pixel block 113 includes a third color pixel electrode 1130 and a third color light emitting layer disposed on the third color pixel electrode 1130 1131.
  • the display substrate can be an array substrate.
  • the first color pixel electrode 1110 is configured to drive the first color luminescent layer 1111 to emit light.
  • the shape of the first color pixel electrode 1110 may be the same as the shape of the first color sub-pixel block 111.
  • embodiments of the present disclosure include, but are not limited to, the shape of the first color pixel electrode 1110 may be different from the shape of the first color sub-pixel block 111, and the shape of the first color sub-pixel block 111 may be defined by the pixel defining layer.
  • the shape of the first color sub-pixel block is the shape of the light-emitting area of the first color sub-pixel block.
  • the shape of the first color light-emitting layer may be set according to a preparation process, and the embodiment of the present disclosure is not limited herein.
  • the shape of the first color luminescent layer can be determined by the shape of the reticle opening in the fabrication process.
  • the first color pixel electrode 1110 may be in contact with the first color light emitting layer 1111 so that the light emitting layer can be driven to emit light at a portion in contact with each other, and the first color pixel electrode 1110 can be in contact with the first color light emitting layer 1111. It is the effective part that the sub-pixel can emit light. Therefore, the shape of the first color sub-pixel block described above is the shape of the light-emitting area of the first color sub-pixel block.
  • the first color pixel electrode 1110 may be an anode, but is not limited to an anode, and a cathode of the light emitting diode may be used as a pixel electrode.
  • the second color pixel electrode 1120 is configured to drive the second color luminescent layer 1121 to illuminate.
  • the shape of the second color pixel electrode 1120 may be the same as the shape of the second color sub-pixel block 112.
  • embodiments of the present disclosure include, but are not limited to, the shape of the second color pixel electrode 1120 may be different from the shape of the first color sub-pixel block 112, and the shape of the second color sub-pixel block 112 may be defined by the pixel defining layer.
  • the shape of the second color sub-pixel block is the shape of the light-emitting area of the second color sub-pixel block.
  • the shape of the second color light-emitting layer may be set according to a preparation process, and the embodiment of the present disclosure is not limited herein.
  • the shape of the second color luminescent layer can be determined by the shape of the reticle opening in the fabrication process.
  • the second color pixel electrode 1120 may be in contact with the second color light emitting layer 1121 so that the light emitting layer can be driven to emit light at a portion in contact with each other, and the second color pixel electrode 1120 can be in contact with the second color light emitting layer 1121. It is the effective part that the sub-pixel can emit light. Therefore, the shape of the second color sub-pixel block described above is the shape of the light-emitting area of the second color sub-pixel block.
  • the second color pixel electrode 1120 may be an anode, but is not limited to an anode, and a cathode of the light emitting diode may also be used as a pixel electrode.
  • the shape of the third color pixel electrode 1130 is configured to drive the third color light emitting layer 1131 to emit light.
  • the shape of the third color pixel electrode 1130 may be the same as the shape of the third color sub-pixel block 113.
  • embodiments of the present disclosure include, but are not limited to, the shape of the third color pixel electrode 1130 may be different from the shape of the third color sub-pixel block 113, and the shape of the third color sub-pixel block 113 may be defined by the pixel defining layer.
  • the shape of the third color sub-pixel block is the shape of the light-emitting area of the third color sub-pixel block.
  • the shape of the third color light-emitting layer may be set according to a preparation process, and the embodiment of the present disclosure is not limited herein.
  • the shape of the third color light-emitting layer may be determined by the shape of the opening of the mask in the preparation process.
  • the third color pixel electrode 1130 may be in contact with the third color light-emitting layer 1131 so that the light-emitting layer can be driven to emit light at a portion in contact with each other, and the third color pixel electrode 1130 can be in contact with the third color light-emitting layer 1131. It is the effective part that the sub-pixel can emit light. Therefore, the shape of the third color sub-pixel block described above is the shape of the light-emitting area of the third color sub-pixel block.
  • the third color pixel electrode 1130 may be an anode, but is not limited to an anode, and a cathode of the light emitting diode may also be used as a pixel electrode.
  • the area of the pixel electrode may be slightly larger than the area of the light-emitting layer, or the area of the light-emitting layer may be slightly larger than the area of the pixel electrode, which is not particularly limited in the embodiment of the present disclosure.
  • the light-emitting layer herein may include the electroluminescent layer itself and other functional layers on both sides of the electroluminescent layer, for example, a hole injection layer, a hole transport layer, an electron injection layer, an electron transport layer, and the like.
  • the shape of the pixel can also be defined by a pixel defining layer.
  • a lower electrode (for example, an anode) of the light emitting diode may be disposed under the pixel defining layer, the pixel defining layer including an opening for defining a pixel, the opening exposing a portion of the lower electrode, and the light emitting layer is formed on the pixel defining layer In the middle opening, the light-emitting layer is in contact with the lower electrode, so that the light-emitting layer can be driven to emit light in this portion. Therefore, in this case, the opening of the pixel defining layer defines the shape of the sub-pixel.
  • the shapes of the various sub-pixels described in the embodiments of the present disclosure are all substantially shaped, and when the light-emitting layer or various electrode layers are formed, the edges of the sub-pixels are not guaranteed to be strictly straight and the angle is strict. Horny.
  • the light-emitting layer may be formed by an evaporation process through a mask, and thus, the corner portion thereof may have a rounded shape.
  • the metal etch has a draft angle, and therefore, when the luminescent layer of the sub-pixel is formed by an evaporation process, a corner of the luminescent layer may be removed.
  • the first color light emitting layer 1111 and the fourth virtual color of the first color sub-pixel block 111 of the third virtual rectangle 130 can be formed by the same mask opening, for example, by vapor deposition using the same opening of the fine metal mask, thereby reducing the manufacturing difficulty and simplifying the process.
  • the first color illuminating layer 1111 of the first color sub-pixel block 111 of the third virtual rectangle 130 of the same luminescent layer 130 and the first color sub-pixel block 111 of the fourth virtual rectangle 140 are merged
  • the area of the color light-emitting layer 1111 is larger than the area of the first color pixel electrode 1110 of the first color sub-pixel block 111 of the third virtual rectangle 130 and the first color pixel electrode 1110 of the first color sub-pixel block 111 of the fourth virtual rectangle 140.
  • the first color of the first color sub-pixel block 111 of the first color sub-pixel block 111 of the third virtual rectangle 130 of the same light-emitting layer 130 and the first color sub-pixel block 111 of the fourth virtual rectangle 140 The area of the layer 1111 is larger than the sum of the areas of the first color pixel electrode 1110 of the first color sub-pixel block 111 of the third virtual rectangle 130 and the first color pixel electrode 1110 of the first color sub-pixel block 111 of the fourth virtual rectangle 140. 1.5 times.
  • the first minimum repeating region 1001 and the second minimum repeating region The first color sub-pixel block of the first color light-emitting layer 1111 of the first color sub-pixel block 111 of the first virtual rectangle 110 of the first minimum overlap area 1001 and the second virtual rectangle 120 of the second minimum overlap area 1002
  • the first color light-emitting layer 1111 of 111 is formed by the same mask opening.
  • the first color illuminating layer 1111 and the second minimum repeating region 1002 of the first color sub-pixel block 111 of the first virtual rectangle 110 of the first minimum repeating region 1001 of the same luminescent layer are merged.
  • the area of the first color light-emitting layer 1111 of the first color sub-pixel block 111 of the virtual rectangle 120 is larger than the first color pixel electrode 1110 of the first color sub-pixel block 111 of the first virtual rectangle 110 of the first minimum overlap area 1001 and the first The sum of the areas of the first color pixel electrodes 1110 of the first color sub-pixel block 111 of the second virtual rectangle 120 of the two minimum overlap regions 1002.
  • the distance is greater than 1/2 of the length of the second side 1102, and merges into the first color illuminating layer 1111 and the second color of the first color sub-pixel block 111 of the first virtual rectangle 110 of the first minimum repeating region 1001 of the same luminescent layer.
  • the area of the first color light-emitting layer 1111 of the first color sub-pixel block 111 of the second virtual rectangle 120 of the minimum overlap region 1002 is larger than the first color sub-pixel block 111 of the first virtual rectangle 110 of the first minimum overlap region 1001.
  • the second color pixel electrode 1120 and the second virtual rectangle 120 of the second color sub-pixel block 112 of the first virtual rectangle 110 is merged into the same pixel electrode to load a data signal as one pixel electrode.
  • the first minimum repeating region 1001 and the second minimum repeating region a region 1002
  • a second color sub-pixel block of the third virtual rectangle 130 of the second minimum overlap region 1002 The second color pixel electrodes 1120 of 112 are merged into the same pixel electrode to load a data signal as one pixel electrode.
  • the third color pixel electrode 1130 and the second virtual rectangle 120 of the third color sub-pixel block 113 of the first virtual rectangle 110 is merged into the same pixel electrode to load a data signal as one pixel electrode.
  • the third color pixel electrode 1130 of the third color sub-pixel block 113 of the fourth virtual rectangle 140 of the first minimum overlap region 1001 and the third color sub-pixel block of the third virtual rectangle 130 of the second minimum overlap region 1002 is merged into the same pixel electrode to load a data signal as one pixel electrode.
  • the side length (or pitch) of the minimum repeating area is approximately the side length of two virtual rectangles.
  • the second color sub-pixel block 112 and the third color sub-pixel block 113 in the first virtual rectangle 110 and the second color sub-pixel block in the second virtual rectangle 120 112 and the third color sub-pixel block 113 may be combined into one second color sub-pixel and one third color sub-pixel, respectively, plus one of the first sub-color pixel block 111 and the fourth virtual rectangle 140 of the third virtual rectangle 130.
  • a first sub-pixel block 111 in the middle may form a repeating unit. That is, the size or pitch of the repeating unit in the direction parallel to the first side 1101 is twice the length of the side of the virtual rectangle parallel to the first side 1101.
  • the second color sub-pixel and the third color sub-pixel are elongated, that is, elongated shapes extending in a direction perpendicular to the first side 1101.
  • the second color sub-pixel and the third color sub-pixel may also be elliptical.
  • the second color sub-pixel if it is divided into two parts by the center in the direction parallel to the first side 1101 (the two parts are, for example, the second color sub-pixel block 112 located in the first virtual rectangle 110 and located
  • the second color sub-pixel block 112 in the second virtual rectangle 120 has a distance between the centers of the two second color sub-pixel blocks 112 that is less than 0.3 times the side length of the virtual rectangle.
  • the size of the second color sub-pixel in a direction perpendicular to the first side 1101 is less than 0.6 times the side length of the virtual rectangle.
  • the ratio of the dimension in the direction perpendicular to the first side 1101 to the dimension in the direction parallel to the first side 1101 is ⁇ , and ⁇ >1. That is, the second color sub-pixel and the third color sub-pixel are elongated shapes extending in a direction perpendicular to the first side 1101.
  • the second color sub-pixel is a red sub-pixel
  • the third color sub-pixel is a blue sub-pixel.
  • the life of the red sub-pixel is usually longer than the blue sub-pixel. Therefore, the area of the red sub-pixel may be smaller than the area of the blue sub-pixel, but the above-mentioned size ratio ⁇ of the red sub-pixel may not be too small, and if it is too small, the horizontal direction may be The difference from the vertical is obvious.
  • the display substrate may include more or less structures, and the positional relationship between the structures is not limited, and may be determined according to actual needs.
  • the colors of the first color sub-pixel block 111, the second color sub-pixel block 112, and the third color sub-pixel block 113 are not limited and may be any color.
  • the structures of the first color sub-pixel block 111, the second color sub-pixel block 112, and the third color sub-pixel block 113 are not limited and may be determined according to actual needs.
  • the display substrate is a color film substrate
  • the first color sub-pixel block 111 includes a first color filter 114
  • the second color sub-pixel block 112 includes a second color filter.
  • the light sheet 115, the third color sub-pixel block 113 includes a third color filter 116, and the filters of the respective colors have the same shape as the sub-pixel blocks of the corresponding color.
  • At least one embodiment of the present disclosure also provides a display method for a pixel arrangement structure according to any of the embodiments of the present disclosure.
  • the display method includes: connecting the first color sub-pixel block in the first direction and a direction perpendicular to the first direction, respectively, into a plurality of virtual lines crossing each other, and determining that the intersection of the virtual lines is a virtual pixel; assigning display data to the virtual pixel; and calculating display data of the sub-pixel block in the corresponding virtual rectangle according to display data of two virtual pixels adjacent to each of the virtual rectangles.
  • the pixel arrangement structure of any embodiment of the present disclosure can be displayed, which can avoid color edges appearing at the edge of the screen, help to improve display quality, and can realize real pixels with 300 PPI or slightly higher resolution. display.
  • FIG. 10 is a flowchart of a display method according to an embodiment of the present disclosure. Referring to FIG. 10, the display method includes the following steps:
  • Step S510 connecting the first color sub-pixel blocks in the first direction and the direction perpendicular to the first direction, respectively, into a plurality of virtual lines crossing each other, and determining that the intersection of the virtual lines is a virtual pixel point;
  • Step S520 Allocating display data for the virtual pixel points
  • Step S530 Calculate display data of the sub-pixel block in the corresponding virtual rectangle according to the display data of the two virtual pixel points adjacent to each virtual rectangle.
  • step S510 the first color sub-pixel block 111 is connected in a first direction and a direction perpendicular to the first direction, respectively, into a plurality of virtual lines crossing each other, and the intersection of the virtual lines is determined to be Virtual pixel point.
  • a plurality of virtual pixel points are obtained, for example, the first virtual pixel point 1, the second virtual pixel point 2, and the third virtual pixel point 3.
  • the embodiment of the present disclosure is not limited thereto, and the number of virtual pixel points may be any number, which may be determined according to the size of the pixel arrangement structure and the number of the first color sub-pixel blocks 111. For example, each virtual pixel does not overlap with the first color sub-pixel block 111.
  • a plurality of virtual pixel points are aligned in a first direction and a direction perpendicular to the first direction.
  • the first direction is parallel or perpendicular to the direction in which the drive line extends.
  • the distances of the respective adjacent virtual pixel points are equal to each other.
  • the distances between the adjacent virtual pixel points are also equal to each other.
  • display data is assigned to the virtual pixel points, that is, the display data is allocated to a plurality of virtual pixel points arranged neatly.
  • the display data allocated for the first virtual pixel 1 is 1 (r1, g1, b1)
  • the display data allocated for the second virtual pixel 2 is 2 (r2, g2, b2), which is the third virtual pixel.
  • the displayed display data is 3 (r3, g3, b3).
  • the display controller may be processed and distributed by using a timing controller disposed outside the display panel to match the size and resolution of the display panel.
  • the allocation method may be similar to the conventional display panel distribution method, and embodiments of the present disclosure. There is no limit to this.
  • a first virtual rectangle 110 and a second virtual rectangle 120 are shown in FIG.
  • the display data of the sub-pixel block in the first virtual rectangle 110 is represented by A(Ra, Ga, Ba)
  • Ra represents the display data of the second color sub-pixel block 112
  • Ga represents the display of the first color sub-pixel block 111.
  • Data represents display data of the third color sub-pixel block 113.
  • the display data of the sub-pixel block in the second virtual rectangle 120 is represented by B (Rb, Gb, Bb).
  • step S530 display data of sub-pixel blocks within the corresponding virtual rectangle is calculated based on display data of two virtual pixel points adjacent to each virtual rectangle.
  • the display of the sub-pixel block within the first virtual rectangle 110 is calculated based on the display data 1 (r1, g1, b1) and 2 (r2, g2, b2) of the first virtual pixel 1 and the second virtual pixel 2.
  • Data A (Ra, Ga, Ba).
  • the display data B of the sub-pixel block in the second virtual rectangle 120 is calculated according to the display data 1 (r1, g1, b1) and 3 (r3, g3, b3) of the first virtual pixel point 1 and the third virtual pixel point 3 (Rb, Gb, Bb).
  • the calculation method may employ interpolation, for example, average interpolation.
  • the sub-pixel blocks in the other virtual rectangles are also calculated in such a manner that the display data of the virtual pixel points can be converted into the display data of the sub-pixel blocks in each of the virtual rectangles in the pixel arrangement structure. , you can display the image you want.
  • the type of the interpolation method is not limited, and may be an average interpolation method, or may be a Lagrange interpolation method, a Newton interpolation method, or other applicable interpolation methods, which may be displayed according to the display effect. And set.
  • the calculation method is not limited to the interpolation method, and may be other applicable methods, and the embodiment of the present disclosure does not limit this.
  • Two virtual pixel points corresponding to one virtual rectangle are distributed in the first direction
  • two virtual pixel points corresponding to the other virtual rectangle are distributed in a direction perpendicular to the first direction.
  • the first virtual pixel point 1 and the second virtual pixel point 2 corresponding to the first virtual rectangle 110 are distributed in the first direction
  • the first virtual pixel point 1 and the third virtual pixel point corresponding to the second virtual rectangle 120 3 is distributed in a direction perpendicular to the first direction. This can improve the display quality of the picture in the first direction and in the direction perpendicular to the first direction.
  • the display method is not limited to the steps and the order described above, and may include more or fewer steps, and the order between the steps may be determined according to actual needs.
  • At least one embodiment of the present disclosure further provides a method for fabricating a pixel arrangement structure according to any one of the embodiments of the present disclosure.
  • the pixel arrangement structure can be prepared by using the preparation method, and the color edge appearing at the edge of the screen can be avoided or improved. Helps improve display quality and enables real pixel display with 300PPI or slightly higher resolution.
  • the method of fabricating the pixel arrangement structure includes the following operations:
  • the pixel array structure is formed by vapor deposition on the array substrate using a fine metal mask.
  • the pixel arrangement structure is a pixel arrangement structure as shown in any of FIGS. 1 to 6 and 8.
  • the direction of the web of the fine metal mask has a non-zero angle with the first direction, which is equal to, for example, the angle between any side of each virtual rectangle in the pixel arrangement and the first direction. Therefore, in this manner, the meshing direction of the fine metal mask can be made to coincide with the extending direction of the opening corresponding to each sub-pixel block, so that the direction of the force of the fine metal mask and the opening corresponding to each sub-pixel block are extended.
  • the same direction is beneficial to reduce the process difficulty and improve the process precision.
  • the meshing direction of the fine metal mask can be made to have an angle with the arbitrary side of the array substrate, so that the pattern of the pixel array structure can be formed.
  • the method for preparing the pixel arrangement structure is not limited to the steps and the order described above, and may include more steps, and the order between the steps may be determined according to actual needs.

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Abstract

一种像素排列结构及其显示方法和制备方法、显示基板,该像素排列结构包括:分布在多个最小重复区域(100)中的多个第一颜色子像素块(111)、多个第二颜色子像素块(112)和多个第三颜色子像素块(113)。最小重复区域(100)为矩形且包括第一虚拟矩形(110),第一虚拟矩形(110)包括第一颜色子像素块(111)、第二颜色子像素块(112)和第三颜色子像素块(113)。第一虚拟矩形(110)的任意一边与第一方向具有不为零的夹角,第一方向为行方向或列方向。第一虚拟矩形(110)包括相互垂直的第一边(1101)和第二边(1102),第一颜色子像素块(111)位于第一边(1101)的中垂线(1105)上,第二、第三颜色子像素块(112、113)分布在第一边(1101)的中垂线(1105)的两侧,第二、第三颜色子像素块(112、113)与第一边(1101)的距离均小于第一颜色子像素块(111)与第一边(1101)的距离。利用该像素排列结构,可以避免在画面边缘出现彩边。

Description

像素排列结构及其显示方法和制备方法、显示基板
本申请要求于2018年2月9日递交的中国专利申请第201810136335.4号的优先权,在此全文引用上述中国专利申请公开的内容以作为本申请的一部分。
技术领域
本公开的实施例涉及一种像素排列结构及其显示方法和制备方法、显示基板。
背景技术
近年来,应用较为广泛的显示装置主要包括液晶显示(Liquid Crystal Display,LCD)装置和有机发光二极管(Organic Light-Emitting Diode,OLED)显示装置等。液晶显示装置具有控制简单、耗电低、无辐射等优点,广泛应用于显示器、电视机、移动电话、计算机、笔记本电脑等设备中。有机发光二极管显示装置具有可视角度大、体积轻薄、响应速度快、发光亮度高等优点,且易于实现彩色显示和大屏幕显示,易于实现柔性显示,因而具有广阔的应用前景。
在显示装置中,显示面板的像素排列结构通常包括多个重复排列的像素单元。每个像素单元通常包括依次排列的红色子像素块R、绿色子像素块G及蓝色子像素块B。当需要显示不同颜色的时候,三个子像素块分别以不同的亮度发光,由于子像素块的尺寸非常小,在视觉上就会混合成所需要的颜色。
发明内容
本公开至少一个实施例提供一种像素排列结构,包括:分布在多个最小重复区域中的多个第一颜色子像素块、多个第二颜色子像素块以及多个第三颜色子像素块,其中,各所述最小重复区域为矩形形状且包括四个虚拟矩形,所述四个虚拟矩形包括第一虚拟矩形,一个所述第一虚拟矩形包括一个第一 颜色子像素块、一个第二颜色子像素块以及一个第三颜色子像素块,所述第一虚拟矩形的任意一边与第一方向具有不为零的夹角,所述第一方向为行方向或列方向,所述第一虚拟矩形包括相互垂直的第一边和第二边,所述第一颜色子像素块位于所述第一边的中垂线上,所述第二颜色子像素块和所述第三颜色子像素块分布在所述第一边的中垂线的两侧,所述第二颜色子像素块和所述第三颜色子像素块与所述第一边的距离均小于所述第一颜色子像素块与所述第一边的距离。
例如,在本公开一实施例提供的像素排列结构中,所述第一虚拟矩形的任意一边与所述第一方向的夹角为10度至50度。
例如,在本公开一实施例提供的像素排列结构中,所述第一颜色子像素块的中心位于所述第一边的中垂线上,所述第二颜色子像素块和所述第三颜色子像素块分布在所述第一边的中垂线的两侧,所述第二颜色子像素块的中心和所述第三颜色子像素块的中心与所述第一边的距离均小于所述第一颜色子像素块的中心与所述第一边的距离。
例如,在本公开一实施例提供的像素排列结构中,所述四个虚拟矩形还包括第二虚拟矩形、第三虚拟矩形以及第四虚拟矩形,所述第一虚拟矩形、第二虚拟矩形、第三虚拟矩形以及第四虚拟矩形以共边的方式形成2*2矩阵以构成所述最小重复区域,所述第二虚拟矩形与所述第一虚拟矩形共用所述第一边,且所述第二虚拟矩形与所述第一虚拟矩形关于所述第一边呈镜像对称,所述第一虚拟矩形沿其对角线平移所述对角线的长度与所述第三虚拟矩形重合,所述第三虚拟矩形与所述第二虚拟矩形相邻,所述第三虚拟矩形包括第三边,所述第四虚拟矩形与所述第三虚拟矩形共用所述第三边,且所述第四虚拟矩形与所述第三虚拟矩形关于所述第三边呈镜像对称,所述第三边与所述第一边在同一条直线上。
例如,在本公开一实施例提供的像素排列结构中,所述第一颜色子像素块为绿色子像素块,所述第二颜色子像素块为红色子像素块,所述第三颜色子像素块为蓝色子像素块。
例如,在本公开一实施例提供的像素排列结构中,所述第一颜色子像素块的形状为直角底角对称五边形,所述直角底角对称五边形关于所述第一边的中垂线对称,且所述直角底角对称五边形的底边平行于所述第一边,且在 垂直于所述第一边的方向上相对于所述直角底角对称五边形的顶点更远离所述第一边。
例如,在本公开一实施例提供的像素排列结构中,所述第二颜色子像素块和/或所述第三颜色子像素块的形状为直角底角对称五边形,所述直角底角对称五边形的底边平行于所述第一边或者位于所述第一边上,且在垂直于所述第一边的方向上相对于所述直角底角对称五边形的顶点更靠近所述第一边。
例如,在本公开一实施例提供的像素排列结构中,所述第二颜色子像素块和所述第三颜色子像素块的形状均为直角底角五边形,所述直角底角五边形的底边平行于所述第一边或者位于所述第一边上,且在垂直于所述第一边的方向上相对于所述直角底角五边形的顶点更靠近所述第一边,所述直角底角五边形包括经过所述直角底角五边形顶点的第一斜边和第二斜边,所述第一斜边与位于同一个虚拟矩形内的所述第一颜色子像素块相对设置,所述第一斜边的长度大于所述第二斜边的长度。
例如,在本公开一实施例提供的像素排列结构中,所述第一颜色子像素块的形状为直角底角对称五边形,所述直角底角对称五边形关于所述第一边的中垂线对称,且所述直角底角对称五边形的底边平行于所述第一边,且在垂直于所述第一边的方向上相对于所述直角底角对称五边形的顶点更远离所述第一边,所述直角底角对称五边形包括经过所述直角底角对称五边形顶点的第三斜边和第四斜边,所述第三斜边和第四斜边长度相同,所述第一颜色子像素块的第三斜边与位于同一个虚拟矩形内的所述第二颜色子像素块的第一斜边平行且间距为第一距离,所述第一颜色子像素块的第四斜边与位于同一个虚拟矩形内的所述第三颜色子像素块的第一斜边平行且间距为第二距离。
例如,在本公开一实施例提供的像素排列结构中,在所述第一虚拟矩形和所述第二虚拟矩形中,所述第二颜色子像素块相对于所述第三颜色子像素块更远离所述最小重复区域的中心,在所述第三虚拟矩形和所述第四虚拟矩形中,所述第三颜色子像素块相对于所述第二颜色子像素块更远离所述最小重复区域的中心,其中,所述第一虚拟矩形中的第三颜色子像素块与第四虚拟矩形中的第二颜色子像素块相邻,所述第二虚拟矩形中第三颜色子像素块 与第三虚拟矩形中的第二颜色子像素块相邻,所述第一虚拟矩形中的第三颜色子像素块的第二斜边与第四虚拟矩形中的第二颜色子像素块的第二斜边平行且间距为第三距离,所述第二虚拟矩形中第三颜色子像素块的第二斜边与第三虚拟矩形中的第二颜色子像素块的第二斜边平行且间距为第四距离。
例如,在本公开一实施例提供的像素排列结构中,所述第一距离、所述第二距离、所述第三距离和所述第四距离均相等。
例如,在本公开一实施例提供的像素排列结构中,所述第二颜色子像素块和所述第三颜色子像素块的形状均为直角梯形,所述直角梯形的底边垂直于所述第一边,所述直角梯形的直角边与所述第一边的距离小于所述直角梯形的斜边与所述第一边的距离。
例如,在本公开一实施例提供的像素排列结构中,所述第一颜色子像素块的形状为直角底角对称五边形,所述直角底角对称五边形关于所述第一边的中垂线对称,且所述直角底角对称五边形的底边平行于所述第一边,且在垂直于所述第一边的方向上相对于所述直角底角对称五边形的顶点更远离所述第一边,所述直角底角对称五边形包括经过所述直角底角对称五边形顶点的第三斜边和第四斜边,所述第三斜边和第四斜边长度相同,所述第一颜色子像素块的第三斜边与位于同一个虚拟矩形内的所述第二颜色子像素块的斜边平行且间距为第五距离,所述第一颜色子像素块的第四斜边与位于同一个虚拟矩形内的所述第三颜色子像素块的斜边平行且间距为第六距离。
例如,在本公开一实施例提供的像素排列结构中,在所述第一虚拟矩形和所述第二虚拟矩形中,所述第三颜色子像素块相对于所述第二颜色子像素块更靠近所述最小重复区域的中心,在所述第三虚拟矩形和所述第四虚拟矩形中,所述第二颜色子像素块相对于所述第三颜色子像素块更靠近所述最小重复区域的中心,所述第一虚拟矩形中的所述第三颜色子像素块与所述第四虚拟矩形中的所述第二颜色子像素块相邻,所述第二虚拟矩形中所述第三颜色子像素块与所述第三虚拟矩形中的所述第二颜色子像素块相邻,所述第一虚拟矩形中的所述第三颜色子像素块的锐角部与所述第四虚拟矩形中的所述第二颜色子像素块的锐角部间距为第七距离,所述第二虚拟矩形中所述第三颜色子像素块的锐角部与所述第三虚拟矩形中的所述第二颜色子像素块的锐角部间距为第八距离。
例如,在本公开一实施例提供的像素排列结构中,所述第五距离、所述第六距离、所述第七距离和所述第八距离均相等。
例如,在本公开一实施例提供的像素排列结构中,所述第一颜色子像素块的中心与所述第一边的距离大于或等于所述第二边的长度的一半且小于或等于所述第二边的长度的四分之三。
例如,在本公开一实施例提供的像素排列结构中,在同一所述最小重复区域中,所述第三虚拟矩形中的第一颜色子像素块与所述第四虚拟矩形中的第一颜色子像素块的中心距离大于或等于所述第二边的长度的一半且小于或等于所述第二边的长度。
例如,在本公开一实施例提供的像素排列结构中,在同一所述最小重复区域中,所述第一虚拟矩形的第二颜色子像素块和所述第二虚拟矩形的第二颜色子像素块集成为同一个子像素并作为整体共同显示,在与所述第一边垂直的方向上相邻的两个所述最小重复区域中,所述相邻的两个最小重复区域包括第一最小重复区域和第二最小重复区域,所述第一最小重复区域的第四虚拟矩形和所述第二最小重复区域的第三虚拟矩形相邻,所述第一最小重复区域的第四虚拟矩形的第二颜色子像素块和所述第二最小重复区域的第三虚拟矩形的第二颜色子像素块集成为同一个子像素并作为整体共同显示。
例如,在本公开一实施例提供的像素排列结构中,在同一所述最小重复区域中,所述第一虚拟矩形的第三颜色子像素块和所述第二虚拟矩形的第三颜色子像素块集成为同一个子像素并作为整体共同显示,在与所述第一边垂直的方向上相邻的两个所述最小重复区域中,所述相邻的两个最小重复区域包括第一最小重复区域和第二最小重复区域,所述第一最小重复区域的第四虚拟矩形和所述第二最小重复区域的第三虚拟矩形相邻,所述第一最小重复区域的第四虚拟矩形的第三颜色子像素块和所述第二最小重复区域的第三虚拟矩形的第三颜色子像素块集成为同一个子像素并作为整体共同显示。
例如,在本公开一实施例提供的像素排列结构中,所述像素排列结构构成一个矩形排列区域,所述矩形排列区域的任意一边与所述第一虚拟矩形的任意一边的夹角为45度。
例如,在本公开一实施例提供的像素排列结构中,所述第一方向与驱动所述像素排列结构的驱动线的延伸方向平行或相互垂直。
本公开至少一个实施例还提供一种像素排列结构,包括:分布在多个最小重复区域中的多个第一颜色子像素块、多个第二颜色子像素块以及多个第三颜色子像素块,其中,各所述最小重复区域为矩形形状且包括四个虚拟矩形,所述四个虚拟矩形包括第一虚拟矩形,一个所述第一虚拟矩形包括一个第一颜色子像素块、一个第二颜色子像素块以及一个第三颜色子像素块,所述像素排列结构构成一个矩形排列区域,所述第一虚拟矩形的任意一边与所述矩形排列区域的任意一边具有不为零的夹角,所述第一虚拟矩形包括相互垂直的第一边和第二边,所述第一颜色子像素块的中心位于所述第一边的中垂线上,所述第二颜色子像素块和所述第三颜色子像素块分布在所述第一边的中垂线的两侧,所述第二颜色子像素块的中心和所述第三颜色子像素块的中心与所述第一边的距离均小于所述第一颜色子像素块的中心与所述第一边的距离。
本公开至少一个实施例还提供一种显示基板,包括:衬底基板;设置在所述衬底基板上的多个像素;其中,所述多个像素采用本公开任一实施例所述的像素排列结构。
例如,在本公开一实施例提供的显示基板中,所述四个虚拟矩形还包括第二虚拟矩形、第三虚拟矩形以及第四虚拟矩形,所述第一虚拟矩形、第二虚拟矩形、第三虚拟矩形以及第四虚拟矩形以共边的方式形成2*2矩阵以构成所述最小重复区域,所述第二虚拟矩形与所述第一虚拟矩形共用所述第一边,且所述第二虚拟矩形与所述第一虚拟矩形关于所述第一边呈镜像对称,所述第一虚拟矩形沿其对角线平移所述对角线的长度与所述第三虚拟矩形重合,所述第三虚拟矩形与所述第二虚拟矩形相邻,所述第三虚拟矩形包括第三边,所述第四虚拟矩形与所述第三虚拟矩形共用所述第三边,且所述第四虚拟矩形与所述第三虚拟矩形关于所述第三边呈镜像对称,所述第三边与所述第一边在同一条直线上,所述第一颜色子像素块包括第一颜色像素电极以及设置在所述第一颜色像素电极上的第一颜色发光层,所述第二颜色子像素块包括第二颜色像素电极以及设置在所述第二颜色像素电极上的第二颜色发光层,所述第三颜色子像素块包括第三颜色像素电极以及设置在所述第三颜色像素电极上的第三颜色发光层,所述第一颜色像素电极被配置为驱动所述第一颜色发光层发光,所述第二颜色像素电极被配置为驱动所述第二颜色发 光层发光,所述第三颜色像素电极被配置为驱动所述第三颜色发光层发光。
例如,在本公开一实施例提供的显示基板中,在同一所述最小重复区域中,所述第三虚拟矩形的第一颜色子像素块的第一颜色发光层和所述第四虚拟矩形的第一颜色子像素块的第一颜色发光层通过分享同一单一色彩图形区域形成,在与所述第一边垂直的方向上相邻的两个所述最小重复区域中,所述相邻的两个最小重复区域包括第一最小重复区域和第二最小重复区域,所述第一最小重复区域的第一虚拟矩形的第一颜色子像素块的第一颜色发光层和所述第二最小重复区域的所述第二虚拟矩形的第一颜色子像素块的第一颜色发光层通过分享同一单一色彩图形区域形成。
例如,在本公开一实施例提供的显示基板中,在同一所述最小重复区域中,通过分享同一单一色彩图形区域形成的所述第三虚拟矩形的所述第一颜色子像素块的所述第一颜色发光层和所述第四虚拟矩形的所述第一颜色子像素块的所述第一颜色发光层的面积大于所述第三虚拟矩形的所述第一颜色子像素块的所述第一颜色像素电极的面积和所述第四虚拟矩形的所述第一颜色子像素块的所述第一颜色像素电极的面积之和,在与所述第一边垂直的方向上相邻的两个所述最小重复区域中,所述相邻的两个最小重复区域包括第一最小重复区域和第二最小重复区域,通过分享同一单一色彩图形区域形成的所述第一最小重复区域的所述第一虚拟矩形的所述第一颜色子像素块的所述第一颜色发光层和所述第二最小重复区域的所述第二虚拟矩形的所述第一颜色子像素块的所述第一颜色发光层的面积大于所述第一最小重复区域的所述第一虚拟矩形的所述第一颜色子像素块的所述第一颜色像素电极的面积和所述第二最小重复区域的所述第二虚拟矩形的所述第一颜色子像素块的所述第一颜色像素电极的面积之和。
例如,在本公开一实施例提供的显示基板中,在同一所述最小重复区域中,所述第一虚拟矩形的第二颜色子像素块的第二颜色像素电极和所述第二虚拟矩形的第二颜色子像素块的第二颜色像素电极合并为同一像素电极,在与所述第一边垂直的方向上相邻的两个所述最小重复区域中,所述相邻的两个最小重复区域包括第一最小重复区域和第二最小重复区域,所述第一最小重复区域的第四虚拟矩形的第二颜色子像素块的第二颜色像素电极和所述第二最小重复区域的所述第三虚拟矩形的第二颜色子像素块的第二颜色像素电 极合并为同一像素电极。
例如,在本公开一实施例提供的显示基板中,在同一所述最小重复区域中,所述第一虚拟矩形的第三颜色子像素块的第三颜色像素电极和所述第二虚拟矩形的第三颜色子像素块的第三颜色像素电极合并为同一像素电极,在与所述第一边垂直的方向上相邻的两个所述最小重复区域中,所述相邻的两个最小重复区域包括第一最小重复区域和第二最小重复区域,所述第一最小重复区域的第四虚拟矩形的第三颜色子像素块的第三颜色像素电极和所述第二最小重复区域的所述第三虚拟矩形的第三颜色子像素块的第三颜色像素电极合并为同一像素电极。
例如,在本公开一实施例提供的显示基板中,所述第一颜色子像素块包括第一颜色滤光片,所述第二颜色子像素块包括第二颜色滤光片,所述第三颜色子像素块包括第三颜色滤光片。
本公开至少一个实施例还提供一种本公开任一实施例所述的像素排列结构的显示方法,包括:将所述第一颜色子像素块分别沿所述第一方向和与所述第一方向垂直的方向连接为多条彼此交叉的虚拟线,确定所述虚拟线的交叉点为虚拟像素点;为所述虚拟像素点分配显示数据;根据与每个所述虚拟矩形相邻的两个虚拟像素点的显示数据计算对应的虚拟矩形内的子像素块的显示数据。
例如,在本公开一实施例提供的显示方法中,在与所述第一边垂直的方向上相邻的两个所述虚拟矩形中,与其中一个所述虚拟矩形对应的两个虚拟像素点分布在所述第一方向上,与另一个所述虚拟矩形对应的两个虚拟像素点分布在与所述第一方向垂直的方向上。
例如,在本公开一实施例提供的显示方法中,根据与所述虚拟矩形相邻的两个虚拟像素点的显示数据计算对应的虚拟矩形内的子像素块的显示数据包括:利用插值法计算所述虚拟矩形内的子像素块的显示数据。
本公开至少一个实施例还提供一种如本公开任一实施例所述的像素排列结构的制备方法,包括:利用精细金属掩模板在阵列基板上蒸镀以形成所述像素排列结构;其中,所述精细金属掩模板的张网方向与所述第一方向具有不为零的夹角。
附图说明
为了更清楚地说明本公开实施例的技术方案,下面将对实施例的附图作简单地介绍,显而易见地,下面描述中的附图仅仅涉及本公开的一些实施例,而非对本公开的限制。
图1为本公开一实施例提供的一种像素排列结构的示意图;
图2为本公开一实施例提供的一种像素排列结构中的子像素块的形状示意图;
图3为本公开一实施例提供的另一种像素排列结构的示意图;
图4为本公开一实施例提供的另一种像素排列结构的示意图;
图5为本公开一实施例提供的另一种像素排列结构的示意图;
图6为本公开一实施例提供的另一种像素排列结构的示意图;
图7为本公开一实施例提供的一种显示基板的剖面示意图;
图8为本公开一实施例提供的另一种显示基板的局部平面示意图;
图9A为本公开一实施例提供的一种显示基板沿图8中A-A’方向的剖面示意图;
图9B为本公开一实施例提供的另一种显示基板的剖面示意图;
图10为本公开一实施例提供的一种显示方法的流程图;以及
图11为本公开一实施例提供的一种像素排列结构的示意图。
具体实施方式
为使本公开实施例的目的、技术方案和优点更加清楚,下面将结合本公开实施例的附图,对本公开实施例的技术方案进行清楚、完整地描述。显然,所描述的实施例是本公开的一部分实施例,而不是全部的实施例。基于所描述的本公开的实施例,本领域普通技术人员在无需创造性劳动的前提下所获得的所有其他实施例,都属于本公开保护的范围。
除非另作定义,此处使用的技术术语或者科学术语应当为本公开所属领域内具有一般技能的人士所理解的通常意义。本公开中使用的“第一”、“第二”以及类似的词语并不表示任何顺序、数量或者重要性,而只是用来区分不同的组成部分。同样,“包括”或者“包含”等类似的词语意指出现该词前面的元件或者物件涵盖出现在该词后面列举的元件或者物件及其等同,而不排除其 他元件或者物件。“连接”或者“相连”等类似的词语并非限定于物理的或者机械的连接,而是可以包括电性的连接,不管是直接的还是间接的。“上”、“下”、“左”、“右”等仅用于表示相对位置关系,当被描述对象的绝对位置改变后,则该相对位置关系也可能相应地改变。
随着技术的发展,对显示装置的分辨率的要求越来越高。当显示装置需要实现高分辨率显示时,所需要的像素的数量很多。通常通过减小像素的尺寸并减小像素间的间距来达到提高显示装置分辨率的目的。因此,随着工艺技术的不断细化,显示装置的工艺难度和制造成本也相应增加。
由于精细金属掩模板(Fine Metal Mask,FMM)技术的限制,制作高分辨率显示器的工艺难度很大,在高于300像素密度(Pixels Per Inch,PPI)分辨率时现阶段FMM工艺实现起来非常困难。因此,一些通过对RGB子像素块排布相对位置进行调整从而降低FMM工艺难度的方法被提出。然而采用这类像素排布方式进行显示时,由于在水平方向和/或竖直方向上各个颜色的像素的数量有差异,因此会在画面边缘出现水平方向(X方向)和竖直方向(Y方向)的彩边(例如,红边或蓝边),从而影响显示质量。
本公开至少一个实施例提供一种像素排列结构及其显示方法和制备方法、显示基板。该像素排列结构可以均衡RGB子像素块的分布,避免在画面边缘出现彩边,有助于提高显示质量,可以实现300PPI或略高的分辨率的真实像素显示。
下面,将参考附图详细地说明本公开的实施例。应当注意的是,不同的附图中相同的附图标记将用于指代已描述的相同的元件。
本公开至少一个实施例提供一种像素排列结构。该像素排列结构包括:分布在多个最小重复区域中的多个第一颜色子像素块、多个第二颜色子像素块以及多个第三颜色子像素块。各所述最小重复区域为矩形形状且包括四个虚拟矩形,所述四个虚拟矩形包括第一虚拟矩形,一个所述第一虚拟矩形包括一个第一颜色子像素块、一个第二颜色子像素块以及一个第三颜色子像素块。所述第一虚拟矩形的任意一边与第一方向具有不为零的夹角,所述第一方向为行方向或列方向。所述第一虚拟矩形包括相互垂直的第一边和第二边,所述第一颜色子像素块位于所述第一边的中垂线上,所述第二颜色子像素块和所述第三颜色子像素块分布在所述第一边的中垂线的两侧,所述第二颜色 子像素块和所述第三颜色子像素块与所述第一边的距离均小于所述第一颜色子像素块与所述第一边的距离。
图1为本公开一实施例提供的一种像素排列结构的示意图。参考图1,多个第一颜色子像素块111、多个第二颜色子像素块112以及多个第三颜色子像素块113分布在多个最小重复区域100中。例如,多个最小重复区域100重复排列。例如,重复排列指最小重复区域100中的子像素块重复排列,而不包括驱动线或其他部件,不同的最小重复区域100中的驱动线或其他部件可以相同也可以不同。例如,子像素块重复排列指各个子像素块的位置、形状、大小等特征相近,而不是绝对相同。例如,在一些实施例中,为了布线或者开孔的需要,子像素块的形状可能略有不同。例如,每个最小重复区域100为矩形形状(例如,为正方形)。例如,每个最小重复区域100包括四个虚拟矩形,分别为第一虚拟矩形110、第二虚拟矩形120、第三虚拟矩形130和第四虚拟矩形140。每个虚拟矩形的任意一边与第一方向具有不为零的夹角。例如,每个虚拟矩形的任意一边与第一方向的夹角为10度至50度。当然,本公开的实施例不限于此,每个虚拟矩形的任意一边与第一方向的夹角也可以为40度至50度,甚至可以为45度。通过上述角度设置可以更好地消除在画面边缘出现彩边以及显示部分图像时水平方向或竖直方向上出现锯齿现象。
当该夹角为40度至50度(含40度)时,有利于减轻显示画面平行于第一方向的边缘和垂直于第一方向的边缘出现彩边或锯齿状图案的现象,降低人眼识别度,从而同时兼顾水平方向和竖直方向的画面显示。当该夹角为45度时,可以更好地消除在画面边缘出现的彩边,使得画面平行于第一方向的边缘和垂直于第一方向的边缘均具有较好的显示效果。当该夹角为10度至40度(不含40度)时,可以更有利于消除显示画面平行于第一方向的边缘或者垂直于第一方向的边缘出现的彩边或锯齿状图案,能够适用于显示特定画面、变化频率较低的多帧画面或静止的一帧画面等,从而满足用户的特定需求。例如,为了调整该显示面板的亮度中心,改善该显示面板沿某一方向的亮度分布的不均匀性,也可以根据需求在上述角度范围内确定该夹角的角度,从而有利于提高该显示面板的亮度分布的均匀性。
在本公开的另一些实施例中,每个虚拟矩形的任意一边与第一方向的夹 角例如可以为30度、20度、15度、10度等,以调整亮度中心的分布,优化一些特定方向如水平方向或竖直方向的显示。
例如,第一方向为行方向或列方向。例如,行方向或列方向为矩阵显示规定的行方向或列方向。在该像素排列结构应用于显示面板时,第一方向例如与显示面板上的用于驱动像素排列结构的驱动线的延伸方向平行或垂直。例如,第一方向与人眼观看时的水平方向平行或垂直,因此,每个虚拟矩形的任意一边的角度例如可以为斜向45度,这里,“斜向”例如是指在观看平面内相对于水平方向或垂直方向倾斜的方向。又例如,当显示面板的显示区域为矩形时,每个虚拟矩形的任意一边与显示区域的任意一边具有夹角,例如,该夹角为45度。
第一虚拟矩形110、第二虚拟矩形120、第三虚拟矩形130以及第四虚拟矩形140以共边的方式形成2*2矩阵以构成所述最小重复区域100。这里,“共边”是指相邻的两个虚拟矩形彼此紧邻且具有重叠的边。第一虚拟矩形110包括相互垂直的第一边1101和第二边1102。
第二虚拟矩形120与第一虚拟矩形110共用第一边1101,且第二虚拟矩形120与第一虚拟矩形110关于第一边1101呈镜像对称。例如,在本公开中的说明中,两个虚拟矩形呈镜像对称,是指虚拟矩形以及虚拟矩形内的子像素块都呈镜像对称。第一虚拟矩形110沿其对角线平移对角线的长度与第三虚拟矩形130重合,第三虚拟矩形130与第二虚拟矩形120相邻。例如,在本公开中的说明中,两个虚拟矩形重合,是指虚拟矩形以及虚拟矩形内的子像素块都重合。第三虚拟矩形130包括第三边1303,第四虚拟矩形140与第三虚拟矩形130共用第三边1303,且第四虚拟矩形140与第三虚拟矩形130关于第三边1303呈镜像对称,第三边1303与第一边1101在同一条直线上。
第一虚拟矩形110包括第一颜色子像素块111、第二颜色子像素块112以及第三颜色子像素块113。例如,第一颜色子像素块111、第二颜色子像素块112以及第三颜色子像素块113构成第一像素单元。同样地,第二虚拟矩形120、第三虚拟矩形130和第四虚拟矩形140内的第一颜色子像素块111、第二颜色子像素块112以及第三颜色子像素块113分别构成第二像素单元、第三像素单元和第四像素单元。
第一颜色子像素块111(例如第一颜色子像素块111的中心)位于第一 边1101的中垂线1105上。第二颜色子像素块112和第三颜色子像素块113分布在第一边1101的中垂线1105的两侧。第二颜色子像素块112(例如第二颜色子像素块112的中心)和第三颜色子像素块113(例如第三颜色子像素块113的中心)与第一边1101的距离小于第一颜色子像素块111(例如第一颜色子像素块111的中心)与第一边1101的距离。也即是,在中垂线1105的延伸方向上,第二颜色子像素块112和第三颜色子像素块113比第一颜色子像素块111更靠近第一边1101。例如,第二颜色子像素块112和第三颜色子像素块113关于中垂线1105呈镜像对称,这样可以使各个子像素块的分布更均匀。例如,第二颜色子像素块112和第三颜色子像素块113位于第一边1101的两端,这样可以使第二颜色子像素块112和第三颜色子像素块113彼此之间的距离更大,便于制造。例如,第一颜色子像素块111、第二颜色子像素块112和第三颜色子像素块113彼此之间的边缘距离相等,以使像素排列结构的分布更均匀。例如,在本公开的说明中,像素块的中心是指像素块的亮度中心或颜色中心。例如,像素块的中心也可以是像素块图形的几何中心。
需要说明的是,在对像素排列结构进行设计时,子像素(即上述各个子像素块)一般会设计为规则的形状,比如,六边形、五边形、梯形或其他形状。在进行设计时,子像素的中心可以是上述规则形状的几何中心。然而,在实际制造工艺中,所形成的子像素的形状一般会与上述设计的规则形状有一定的偏差。例如,上述规则的形状的各个角可能会变成圆角,因此,子像素的形状可以为圆角图形。此外,实际制造的子像素的形状还可能会与设计的形状有其他的变化。例如,设计为六边形的子像素的形状在实际制造中可能变成近似椭圆形。因此,子像素的中心也可能并非制作形成的子像素的不规则形状的严格的几何中心。在本公开的实施例中,子像素的中心可以与子像素的形状的几何中心有一定的偏移量。子像素的中心是指从子像素的几何中心出发到子像素的边缘各点的辐射线段上的特定点所围成的区域内的任一点,该辐射线段上的特定点在距离该几何中心1/3该辐射线段的长度处。该子像素中心的定义适用于规则形状的子像素的中心,也适用于不规则形状的子像素的中心。
如上所述,由于各种制造误差,实际制造的子像素形状可能与设计的子 像素形状有偏差。因此,在本公开中对于涉及子像素中心的位置以及子像素中心与其他对象的位置之间的关系也可以有一定的误差。例如,子像素中心之间的连线或经过子像素中心的线,如果这些线满足对应的其他限定(例如,延伸方向),这些线只要经过上述的辐射线段的特定点围成的区域即可。再例如,子像素的中心位于某条线上,是指这条线穿过上述的辐射线段的特定点围成的区域即可。此外,对于本公开中所描述的“重合”,是指相应的子像素或其他部件的至少70%的面积能够重合即可;对于本公开所描述的“镜像对称”,是指经过镜像操作之后,相应的子像素至少70%的面积能够重合即可。
例如,在同一最小重复区域中(例如,在最小重复区域100中),第三虚拟矩形130中的第一颜色子像素块111与第四虚拟矩形140中的第一颜色子像素块111的中心距离为S,则0.5h≤S≤h。其中,h为第二边1102的长度。子像素块例如,第一颜色子像素块111的中心与第一边1101的距离为L,则0.5h≤L≤0.75h,h为第二边1102的长度。这样可以使第一颜色子像素块111的分布相对均匀。例如,第一颜色子像素块111作为亮度中心,从而使该像素排列结构的发光更为均匀。在中垂线1105的延伸方向上,两个相邻的第一颜色子像素块111之间有较大空间,从而便于更好地调节两个第一颜色子像素块111之间的距离,或者便于增大第一颜色子像素块111的面积以提高发光面积,并且有利于第一颜色子像素块111的均匀化。需要说明的是,第二边1102的长度可以等于第一边1101的长度,也可以不等于第一边1101的长度,本公开的实施例对此不作限制。
例如,在一些示例中,第一颜色子像素块111、第二颜色子像素块112和第三颜色子像素块113可分别单独作为一个子像素以进行显示,每一个虚拟矩形中的第一颜色子像素块111、第二颜色子像素块112和第三颜色子像素块113可组成一个用于彩色显示的像素单元。当然,本公开实施例包括但不限于此,第一颜色子像素块111、第二颜色子像素块112和第三颜色子像素块113可分别与相邻的位于不同的虚拟矩形中的同色子像素块例如在相邻的虚拟矩形的共边处合并为一个子像素,以进行显示。例如,第一边1101穿过该合并的子像素,且该合并的子像素关于第一边1101对称。
例如,在一些示例中,第一颜色子像素块111为敏感颜色子像素。由于 人眼对颜色的敏感程度不同,相邻的敏感颜色子像素距离较近时更容易发生因相邻的敏感颜色子像素距离较近而导致的相邻的两个敏感颜色子像素难以分辨,被人眼视觉上合二为一的情况。由此,该像素排列结构可改善敏感颜色子像素的分布均匀性,从而可提高视觉上的分辨率,并且还可提升显示质量。需要说明的是,当像素排列结构采用红绿蓝(RGB)模式时,上述的敏感颜色为绿色。
例如,第一颜色子像素块111为绿色子像素块G,第二颜色子像素块112为红色子像素块R,第三颜色子像素块113为蓝色子像素块B。当然,本公开的实施例不限于此,第一颜色子像素块111、第二颜色子像素块112和第三颜色子像素块113可以为任意颜色的子像素块,例如黄色子像素块、白色子像素块等。例如,第三虚拟矩形130中的第一颜色子像素块111和第四虚拟矩形140中的第一颜色子像素块111采用同一个掩模板开孔形成,以便于加工。
图2为本公开一实施例提供的一种像素排列结构中的子像素块的形状示意图。现结合图1和图2对子像素块的形状及分布进行说明。例如,第一颜色子像素块111、第二颜色子像素块112和第三颜色子像素块113的形状均为直角底角对称五边形。如图2所示,该直角底角对称五边形包括底边210和顶点220。底边210与该直角底角对称五边形的两个直角底角相邻。在该五边形所有相邻的边的交点中,位于底边210的中垂线上的交点为顶点220。
第一颜色子像素块111关于第一边1101的中垂线1105对称,第一颜色子像素块111的底边210平行于第一边1101且在垂直于第一边1101的方向上相对于第一颜色子像素块111的顶点220更远离第一边1101。第二颜色子像素块112的底边210平行于第一边1101或位于第一边1101上,且在垂直于第一边1101的方向上相对于第二颜色子像素块112的顶点220更靠近第一边1101。第三颜色子像素块113的底边210平行于第一边1101或位于第一边1101上,且在垂直于第一边1101的方向上相对于第三颜色子像素块113的顶点220更靠近第一边1101。例如,第二颜色子像素块112和第三颜色子像素块113关于第一边1101的中垂线1105呈镜像对称。例如,第一颜色子像素块111、第二颜色子像素块112和第三颜色子像素块113的形状和大小完全相同,这样可以使各个颜色的子像素块的发光更为均匀。
例如,两个第一颜色子像素块111的彼此相邻的边缘之间的距离大于或等于12微米或者大于或等于14微米。例如,两个第一颜色子像素块111具有平行于中垂线1105的对称轴(例如,如图1所示,第三虚拟矩形130中的第一颜色子像素块111和第四虚拟矩形140中的第一颜色子像素块111的对称轴平行于中垂线1105,且该对称轴穿过两个第一颜色子像素块111各自的顶点)。例如,两个第一颜色子像素块111各自平行于第三边1303的边与该对称轴的交点之间的距离大于或等于12微米或者大于或等于14微米。如图1所示,每个最小重复区域100中两个第一颜色子像素块111,例如是指第三虚拟矩形130中的第一颜色子像素块111和第四虚拟矩形140中的第一颜色子像素块111。这两个第一颜色子像素块111彼此相邻的边缘是指这两个第一颜色子像素块111中分别与第三边1303平行的边。这两个第一颜色子像素块111的上述距离可以根据不同的分辨率情况设置不同的数值。例如,两个第一颜色子像素块111的彼此相邻的边缘之间的距离在四分之一全高清分辨率的情况下大于或等于12微米,在全高清分辨率的情况下大于或等于14微米。
需要说明的是,本公开的各实施例中,第一颜色子像素块111、第二颜色子像素块112和第三颜色子像素块113的形状和大小不受限制,三者的形状和大小可以相同也可以不同,这可以根据实际工艺条件而定。例如,在其他实施例中,第一颜色子像素块111、第二颜色子像素块112和第三颜色子像素块113的形状为梯形,且第二颜色子像素块112和第三颜色子像素块113不再关于第一边1101的中垂线1105镜像对称,这样可以灵活设置各个颜色子像素块的发光面积,以满足多样化的显示需求。
图3为本公开一实施例提供的另一种像素排列结构的示意图。参考图3,除了第二颜色子像素块112和第三颜色子像素块113的设置方式外,该实施例的像素排列结构与图1中所示的像素排列结构基本上相同。在该实施例中,相邻的两个第二颜色子像素块112集成为同一个子像素(即一体形成),相邻的两个第三颜色子像素块113也集成为同一个子像素。例如,将两个第二颜色子像素块112集成后的子像素作为整体进行驱动以使其作为整体而发光,将两个第三颜色子像素块113集成后的子像素作为整体进行驱动以使其作为整体而发光。
例如,在与第一边1101垂直的方向上(与第一方向的夹角为45度的方向上)相邻的两个最小重复区域分别为第一最小重复区域1001和第二最小重复区域1002。在同一最小重复区域中,例如,在第二最小重复区域1002中,第一虚拟矩形110中的第二颜色子像素块112和第二虚拟矩形120中的第二颜色子像素块112集成为同一个子像素,第一虚拟矩形110中的第二颜色子像素块112和第二虚拟矩形120中的第二颜色子像素块112分别为该集成后的子像素的一部分,且该集成后的子像素的中心位于第一边1101上。第一虚拟矩形110中的第三颜色子像素块113和第二虚拟矩形120中的第三颜色子像素块113集成为同一个子像素,第一虚拟矩形110中的第三颜色子像素块113和第二虚拟矩形120中的第三颜色子像素块113分别为该集成后的子像素的一部分,且该集成后的子像素的中心位于第一边1101上。同样地,在第一最小重复区域1001中,第二颜色子像素块112和第三颜色子像素块113也为同样的设置方式。
第一最小重复区域1001中的第四虚拟矩形140和第二最小重复区域1002中的第三虚拟矩形130相邻且具有共享边。第一最小重复区域1001的第四虚拟矩形140的第二颜色子像素块112和第二最小重复区域1002的第三虚拟矩形130的第二颜色子像素块112集成为同一个子像素,上述两个第二颜色子像素块112分别为该集成后的子像素的一部分,且该集成后的子像素的中心位于第一最小重复区域1001的第四虚拟矩形140和第二最小重复区域1002的第三虚拟矩形130的共享边上。第一最小重复区域1001的第四虚拟矩形140的第三颜色子像素块113和第二最小重复区域1002的第三虚拟矩形130的第三颜色子像素块113集成为同一个子像素,上述两个第三颜色子像素块113分别为该集成后的子像素的一部分,且该集成后的子像素的中心位于第一最小重复区域1001的第四虚拟矩形140和第二最小重复区域1002的第三虚拟矩形130的共享边上。
相邻的两个第二颜色子像素块112和/或相邻的两个第三颜色子像素块113集成为同一个子像素,可以在FMM工艺中采用同一开孔,从而简化工艺,降低工艺难度和生产成本。例如,相邻的两个第二颜色子像素块112和/或相邻的两个第三颜色子像素块113集成之后的形状为六边形。当该实施例的像素排列结构应用于显示面板时,可以采用子像素渲染(Sub-Pixel  Rendering,SPR)算法进行驱动,从而实现虚拟显示。
需要说明的是,本公开的各实施例中,第二颜色子像素块112和第三颜色子像素块113可以同时集成,也可以只集成其中之一。在像素排列结构中,可以集成全部相邻的第二颜色子像素块112和第三颜色子像素块113,也可以只集成部分相邻的第二颜色子像素块112和第三颜色子像素块113。集成之后的子像素的形状不受限制,可以为六边形、五边形、梯形等任意形状。
图4为本公开一实施例提供的另一种像素排列结构的示意图。参考图4,该像素排列结构构成一个矩形排列区域300(如图4中实线包围的区域)。例如,该矩形排列区域300为显示区域。例如,该矩形排列区域300的四条边中,两条边与第一方向平行,另外两条边与第一方向垂直。第一方向例如为行方向或列方向。
矩形排列区域300的任意一边与第一虚拟矩形110的任意一边的夹角为40度至50度,例如,该夹角为45度。根据图1中描述的第一虚拟矩形110、第二虚拟矩形120、第三虚拟矩形130和第四虚拟矩形140的排列方式可知,该矩形排列区域300的任意一边与第二虚拟矩形120、第三虚拟矩形130和第四虚拟矩形140的任意一边的夹角也为45度。这种方式可以避免在画面边缘出现彩边(例如,沿矩形排列区域300的任意一边的方向出现的蓝边或红边),有助于提高显示质量。例如,将该像素排列结构应用于显示面板时,人眼观看时的水平方向与第一方向相同或垂直。由于人眼对水平或垂直方向上的画面质量较为敏感,而对与水平方向的夹角为45度的方向上的画面质量较为不敏感,因此可以提高整体显示质量。
例如,第一方向为矩阵显示规定的行方向或列方向。例如,将该像素排列结构应用于显示面板时,显示面板包括驱动该像素排列结构的驱动线(例如,扫描线或数据线),第一方向与驱动线的延伸方向平行或相互垂直。
需要说明的是,该实施例中的像素排列结构构成的区域的形状不受限制,可以为矩形、正方形或其他适用的形状。第一虚拟矩形110的任意一边与该区域的角度关系可以根据实际需求而定。例如,当该区域的某一边与人眼观看时的水平方向相同时,则第一虚拟矩形110的任意一边与上述某一边具有夹角。该实施例中的像素排列结构的分布形式与图1中描述的像素排列结构基本相同,此处不再赘述。
图5为本公开一实施例提供的另一种像素排列结构的示意图。参考图5,第二颜色子像素块112和第三颜色子像素块113的形状均为直角梯形,直角梯形的底边垂直于第一边1101,直角梯形的直角边与第一边1101的距离小于直角梯形的斜边与第一边1101的距离。如图5所示,第二颜色子像素块112和第三颜色子像素块113的斜边可分别与第一颜色子像素块111相对设置(面对设置),第二颜色子像素块112和第三颜色子像素块113的斜边分别与第一颜色子像素块111的两个斜边平行或近似平行,从而在工艺精度一定的情况下,也就是说,第一颜色子像素块111分别与第二颜色子像素块112和第三颜色子像素块113的边缘距离一定的情况下,增加第二颜色子像素块112和第三颜色子像素块113的面积。由此,该像素排列结构可提高对虚拟矩形内的空间的利用率。并且,由于第二颜色子像素块112和第三颜色子像素块113的形状均为直角梯形,相对于第二颜色子像素块112和第三颜色子像素块113的形状均为直角底角对称五边形的情况,第二颜色子像素块112和第三颜色子像素块113的锐角部190可进一步增大第二颜色子像素块112和第三颜色子像素块113的面积,从而进一步提高对虚拟矩形内的空间的利用率。
例如,在一些示例中,如图5所示,第一颜色子像素块111的形状为直角底角对称五边形,直角底角对称五边形关于第一边的中垂线对称,且直角底角对称五边形的底边平行于第一边1101,且在垂直于第一边的方向上相对于直角底角对称五边形的顶点更远离第一边,直角底角对称五边形包括经过直角底角对称五边形顶点的第三斜边193和第四斜边194,第三斜边193和第四斜边194长度相同,第一颜色子像素块111的第三斜边193与位于同一个虚拟矩形内的第二颜色子像素块112的斜边平行且间距为第五距离d5,第一颜色子像素块111的第四斜边194与位于同一个虚拟矩形内的第三颜色子像素块的斜边平行且间距为第六距离d6。
例如,在一些示例中,如图5所示,在第一虚拟矩形110和第二虚拟矩形120中,第三颜色子像素块113相对于第二颜色子像素块112更靠近最小重复区域100的中心,在第三虚拟矩形130和第四虚拟矩形140中,第二颜色子像素块112相对于第三颜色子像素块113更靠近最小重复区域100的中心,第一虚拟矩形110中的第三颜色子像素块113与第四虚拟矩形140中的 第二颜色子像素块112相邻,第二虚拟矩形120中第三颜色子像素块113与第三虚拟矩形130中的第二颜色子像素块112相邻,第一虚拟矩形110中的第三颜色子像素块113的锐角部190与第四虚拟矩形140中的第二颜色子像素块112的锐角部190间距为第七距离d7,第二虚拟矩形120中第三颜色子像素块113的锐角部190与第三虚拟矩形130中的第二颜色子像素块112的锐角部间距为第八距离d8。
例如,在一些示例中,如图5所示,第五距离d5、第六距离d6、第七距离d7和第八距离d8均相等。
例如,在一些示例中,如图5所示,第三颜色子像素块113和第二颜色子像素块112还可以分别为非对称形状,例如,相对于经过其中心的任意的直线是非对称的。
图6为本公开一实施例提供的另一种像素排列结构的示意图。参考图6,第二颜色子像素块112和第三颜色子像素块113的形状均为直角底角五边形,直角底角五边形的底边平行于第一边1101或位于第一边1101上,且在垂直于第一边1101的方向上相对于直角底角五边形的顶点更靠近第一边1101,直角底角五边形包括经过直角底角五边形顶点的第一斜边191和第二斜边192,第一斜边191与位于同一个虚拟矩形内的第一颜色子像素块111相对设置,第一斜边191的长度大于第二斜边192的长度。例如,第二颜色子像素块112的第一斜边191与第一颜色子像素块111相对设置,第三颜色子像素块113的第一斜边191与第一颜色子像素块111相对设置,从而在工艺精度一定的情况下,也就是说,第一颜色子像素块111分别与第二颜色子像素块112和第三颜色子像素块113的边缘距离一定的情况下,增加第二颜色子像素块112和第三颜色子像素块113的面积,从而提高对虚拟矩形内的空间的利用率。并且,由于第二颜色子像素块112和第三颜色子像素块113的形状均为直角底角五边形,相对于第二颜色子像素块112和第三颜色子像素块113的形状均为直角底角对称五边形的情况,第二颜色子像素块112和第三颜色子像素块113的第二斜边192所在的区域还可进一步增加第二颜色子像素块112和第三颜色子像素块113的面积,从而进一步提高对虚拟矩形内的空间的利用率;相对于第二颜色子像素块112和第三颜色子像素块113的形状均为直角梯形的情况,第二颜色子像素块112和第三颜色子像素块113的第二 斜边192可降低制作难度,当工艺水平较低时,第二颜色子像素块和第三颜色子像素块的形状可采用直角底角五边形。
例如,第一颜色子像素块111的形状为直角底角对称五边形,该直角底角对称五边形关于第一边1101的中垂线1105对称,且该直角底角对称五边形的底边平行于第一边1101,且在垂直于第一边1101的方向上相对于直角底角对称五边形的顶点更远离第一边1101。该直角底角对称五边形包括经过直角底角对称五边形顶点的第三斜边193和第四斜边194,第三斜边193和第四斜边194长度相同。第一颜色子像素块111的第三斜边193与位于同一个虚拟矩形内的第二颜色子像素块112的第一斜边191平行且间距为第一距离d1,第一颜色子像素块111的第四斜边194与位于同一个虚拟矩形内的第三颜色子像素块113的第一斜边191平行且间距为第二距离d2。
例如,在第一虚拟矩形110和第二虚拟矩形120中,第二颜色子像素块112相对于第三颜色子像素块113更远离最小重复区域100的中心。在第三虚拟矩形130和第四虚拟矩形140中,第三颜色子像素块113相对于第二颜色子像素块112更远离最小重复区域100的中心。第一虚拟矩形110中的第三颜色子像素块113与第四虚拟矩形140中的第二颜色子像素块112相邻,第二虚拟矩形120中第三颜色子像素块113与第三虚拟矩形130中的第二颜色子像素块112相邻。第一虚拟矩形110中的第三颜色子像素块113的第二斜边192与第四虚拟矩形140中的第二颜色子像素块112的第二斜边192平行且间距为第三距离d3,第二虚拟矩形120中第三颜色子像素块113的第二斜边192与第三虚拟矩形130中的第二颜色子像素块112的第二斜边192平行且间距为第四距离d4。例如,第一距离d1、第二距离d2、第三距离d3和第四距离d4均相等。
本公开至少一个实施例还提供一种像素排列结构。该像素排列结构包括:分布在多个最小重复区域中的多个第一颜色子像素块、多个第二颜色子像素块以及多个第三颜色子像素块,各所述最小重复区域为矩形形状且包括四个虚拟矩形,所述四个虚拟矩形包括第一虚拟矩形,一个所述第一虚拟矩形包括一个第一颜色子像素块、一个第二颜色子像素块以及一个第三颜色子像素块。所述像素排列结构构成一个矩形排列区域,所述第一虚拟矩形的任意一边与所述矩形排列区域的任意一边具有不为零的夹角。所述第一虚拟矩形包 括相互垂直的第一边和第二边,所述第一颜色子像素块的中心位于所述第一边的中垂线上,所述第二颜色子像素块和所述第三颜色子像素块分布在所述第一边的中垂线的两侧,所述第二颜色子像素块的中心和所述第三颜色子像素块的中心与所述第一边的距离均小于所述第一颜色子像素块的中心与所述第一边的距离。
本公开至少一个实施例还提供一种显示基板。该显示基板包括衬底基板和设置在所述衬底基板上的多个像素,所述多个像素采用本公开任一实施例所述的像素排列结构。该显示基板可以均衡RGB子像素块的分布,避免在画面边缘出现彩边,有助于提高显示质量,可以实现300PPI或略高的分辨率的真实像素显示。
图7为本公开一实施例提供的一种显示基板的剖面示意图。参考图7,该显示基板包括衬底基板41和多个像素42。衬底基板41作为载体而起支撑、保护等作用,可以为玻璃基板、塑料基板等。多个像素42设置在衬底基板41上,配置为根据显示数据进行显示。多个像素42采用本公开任一实施例所述的像素排列结构。该显示基板可以应用于液晶显示面板或有机发光二极管显示面板中。该显示基板例如可以为阵列基板或彩膜基板等,本公开的实施例对此不作限制。
图8为根据本公开一实施例提供的另一种显示基板的局部平面示意图。图9A为根据本公开一实施例提供的一种显示基板沿图8中A-A’方向的剖面示意图。如图8所示,第一颜色子像素块111包括第一颜色像素电极1110以及设置在第一颜色像素电极1110上的第一颜色发光层1111,第二颜色子像素块112包括第二颜色像素电极1120以及设置在第二颜色像素电极1120上的第二颜色发光层1121,第三颜色子像素块113包括第三颜色像素电极1130以及设置在第三颜色像素电极1130上的第三颜色发光层1131。由此,该显示基板可为阵列基板。
例如,在一些示例中,第一颜色像素电极1110被配置为驱动第一颜色发光层1111发光。
例如,第一颜色像素电极1110的形状可与第一颜色子像素块111的形状相同。当然,本公开实施例包括但不限于此,第一颜色像素电极1110的形状可与第一颜色子像素块111的形状不同,第一颜色子像素块111的形状可通 过像素限定层限定。
需要说明的是,上述的第一颜色子像素块的形状为第一颜色子像素块的发光区域的形状。另外,第一颜色发光层的形状可根据制备工艺进行设置,本公开实施例在此不作限制。例如,第一颜色发光层的形状可由制备工艺中的掩模板开孔的形状决定。
例如,第一颜色像素电极1110可与第一颜色发光层1111彼此接触,从而在彼此接触的部分能够驱动发光层进行发光,第一颜色像素电极1110可与第一颜色发光层1111彼此接触的部分为子像素能够发光的有效部分。因此,上述的第一颜色子像素块的形状为第一颜色子像素块的发光区域的形状。在本公开实施例中,第一颜色像素电极1110可为阳极,但不限于阳极,也可以将发光二极管的阴极用作像素电极。
例如,在一些示例中,第二颜色像素电极1120被配置为驱动第二颜色发光层1121发光。
例如,第二颜色像素电极1120的形状可与第二颜色子像素块112的形状相同。当然,本公开实施例包括但不限于此,第二颜色像素电极1120的形状可与第一颜色子像素块112的形状不同,第二颜色子像素块112的形状可通过像素限定层限定。
需要说明的是,上述的第二颜色子像素块的形状为第二颜色子像素块的发光区域的形状。另外,第二颜色发光层的形状可根据制备工艺进行设置,本公开实施例在此不作限制。例如,第二颜色发光层的形状可由制备工艺中的掩模板开孔的形状决定。
例如,第二颜色像素电极1120可与第二颜色发光层1121彼此接触,从而在彼此接触的部分能够驱动发光层进行发光,第二颜色像素电极1120可与第二颜色发光层1121彼此接触的部分为子像素能够发光的有效部分。因此,上述的第二颜色子像素块的形状为第二颜色子像素块的发光区域的形状。在本公开实施例中,第二颜色像素电极1120可为阳极,但不限于阳极,也可以将发光二极管的阴极用作像素电极。
例如,在一些示例中,第三颜色像素电极1130的形状被配置为驱动第三颜色发光层1131发光。
例如,第三颜色像素电极1130的形状可与第三颜色子像素块113的形状 相同。当然,本公开实施例包括但不限于此,第三颜色像素电极1130的形状可与第三颜色子像素块113的形状不同,第三颜色子像素块113的形状可通过像素限定层限定。
需要说明的是,上述的第三颜色子像素块的形状为第三颜色子像素块的发光区域的形状。另外,第三颜色发光层的形状可根据制备工艺进行设置,本公开实施例在此不作限制。例如,第三颜色发光层的形状可由制备工艺中的掩模板开孔的形状决定。
例如,第三颜色像素电极1130可与第三颜色发光层1131彼此接触,从而在彼此接触的部分能够驱动发光层进行发光,第三颜色像素电极1130可与第三颜色发光层1131彼此接触的部分为子像素能够发光的有效部分。因此,上述的第三颜色子像素块的形状为第三颜色子像素块的发光区域的形状。在本公开实施例中,第三颜色像素电极1130可为阳极,但不限于阳极,也可以将发光二极管的阴极用作像素电极。
需要说明的是,对于每个子像素,像素电极的面积可以稍大于发光层的面积,或者也可以是发光层的面积稍大于像素电极的面积,本公开的实施例对此没有特别限定。例如,这里的发光层可以包括电致发光层本身以及位于电致发光层两侧的其他功能层,例如,空穴注入层、空穴传输层、电子注入层以及电子传输层等等。在一些实施例中,像素的形状也可以由像素限定层来定义。例如,对于发光二极管的下电极(例如,阳极)可以设置在像素限定层的下方,像素限定层包括用于限定像素的开口,该开口露出下电极的一部分,当发光层形成在上述像素限定层中的开口中时,发光层与下电极接触,从而在这部分能够驱动发光层进行发光。因此,在这种情况下,像素限定层的开口定义了子像素的形状。
例如,对于本公开实施例中所描述的各种子像素的形状,均为大致的形状,在形成发光层或各种电极层时,并不能保证子像素的边沿为严格的直线且角为严格的角状。例如,发光层可以通过掩模用蒸镀工艺来形成,因此,其角部可以为圆角形状。在一些情况下,如前面所提及的,金属刻蚀会有拔模角,因此,在利用蒸镀工艺形成子像素的发光层时,其发光层的一个角可能被去掉。
例如,在一些示例中,如图8和图9A所示,在同一所述最小重复区域 100中,第三虚拟矩形130的第一颜色子像素块111的第一颜色发光层1111和第四虚拟矩形140的第一颜色子像素块111的第一颜色发光层1111可采用同一掩模板开孔形成,例如采用精细金属掩模板的同一开口进行蒸镀而形成,从而可以降低制作难度,简化工艺。
例如,在一些示例中,合并为同一发光层的第三虚拟矩形130的第一颜色子像素块111的第一颜色发光层1111和第四虚拟矩形140的第一颜色子像素块111的第一颜色发光层1111的面积大于第三虚拟矩形130的第一颜色子像素块111的第一颜色像素电极1110和第四虚拟矩形140的第一颜色子像素块111的第一颜色像素电极1110的面积之和。
例如,在一些示例中,由于第三虚拟矩形130的第一颜色子像素块111的中心和第四虚拟矩形140的第一颜色子像素块111的中心之间的距离大于第二边1102的长度的1/2,合并为同一发光层的第三虚拟矩形130的第一颜色子像素块111的第一颜色发光层1111和第四虚拟矩形140的第一颜色子像素块111的第一颜色发光层1111的面积大于第三虚拟矩形130的第一颜色子像素块111的第一颜色像素电极1110和第四虚拟矩形140的第一颜色子像素块111的第一颜色像素电极1110的面积之和的1.5倍。
例如,在一些示例中,如图8和图9A所示,在与第一边1101垂直的方向上相邻的两个最小重复区域100中,例如,第一最小重复区域1001和第二最小重复区域1002,第一最小重复区域1001的第一虚拟矩形110的第一颜色子像素块111的第一颜色发光层1111和第二最小重复区域1002的第二虚拟矩形120的第一颜色子像素块111的第一颜色发光层1111采用同一掩模板开孔形成。
例如,在一些示例中,合并为同一发光层的第一最小重复区域1001的第一虚拟矩形110的第一颜色子像素块111的第一颜色发光层1111和第二最小重复区域1002的第二虚拟矩形120的第一颜色子像素块111的第一颜色发光层1111的面积大于第一最小重复区域1001的第一虚拟矩形110的第一颜色子像素块111的第一颜色像素电极1110和第二最小重复区域1002的第二虚拟矩形120的第一颜色子像素块111的第一颜色像素电极1110的面积之和。
例如,由于第一最小重复区域1001的第一虚拟矩形110的第一颜色子像素块111的中心和第二最小重复区域1002的第二虚拟矩形120的第一颜色子 像素块111的中心之间的距离大于第二边1102的长度的1/2,合并为同一发光层的第一最小重复区域1001的第一虚拟矩形110的第一颜色子像素块111的第一颜色发光层1111和第二最小重复区域1002的第二虚拟矩形120的第一颜色子像素块111的第一颜色发光层1111的面积大于第一最小重复区域1001的第一虚拟矩形110的第一颜色子像素块111的第一颜色像素电极1110和第二最小重复区域1002的第二虚拟矩形120的第一颜色子像素块111的第一颜色像素电极1110的面积之和的1.5倍。
例如,在一些示例中,如图8和图9A所示,在同一最小重复区域100中,第一虚拟矩形110的第二颜色子像素块112的第二颜色像素电极1120和第二虚拟矩形120的第二颜色子像素块112的第二颜色像素电极1120合并为同一像素电极,从而作为一个像素电极来加载数据信号。
例如,在一些示例中,如图8和图9A所示,在与第一边1101垂直的方向上相邻的两个最小重复区域100中,例如,第一最小重复区域1001和第二最小重复区域1002,第一最小重复区域1001的第四虚拟矩形140的第二颜色子像素块112的第二颜色像素电极1120和第二最小重复区域1002的第三虚拟矩形130的第二颜色子像素块112的第二颜色像素电极1120合并为同一像素电极,从而作为一个像素电极来加载数据信号。
例如,在一些示例中,如图8和图9A所示,在同一最小重复区100中,第一虚拟矩形110的第三颜色子像素块113的第三颜色像素电极1130和第二虚拟矩形120的第三颜色子像素块113的第三颜色像素电极1130合并为同一像素电极,从而作为一个像素电极来加载数据信号。
例如,在一些示例中,如图8和图9A所示,在与第一边1101垂直的方向上相邻的两个最小重复区域100中,例如,第一最小重复区域1001和第二最小重复区域1002,第一最小重复区域1001的第四虚拟矩形140的第三颜色子像素块113的第三颜色像素电极1130和第二最小重复区域1002的第三虚拟矩形130的第三颜色子像素块113的第三颜色像素电极1130合并为同一像素电极,从而作为一个像素电极来加载数据信号。
另外,从图8的各虚拟矩形和最小重复区域的关系来看,最小重复区域的边长(或节距)大约为两个虚拟矩形的边长。如图8所示,在同一个最小重复区域中,第一虚拟矩形110中的第二颜色子像素块112和第三颜色子像 素块113与第二虚拟矩形120中的第二颜色子像素块112和第三颜色子像素块113可分别合并为一个第二颜色子像素和一个第三颜色子像素,加上第三虚拟矩形130中的一个第一子颜色像素块111和第四虚拟矩形140中的一个第一颜子像素块111,可以形成一个重复单元。也就是说,重复单元在平行于第一边1101的方向上的尺寸或节距为虚拟矩形的平行于第一边1101的边长的二倍。
从图8可知,第二颜色子像素和第三颜色子像素为长条形,即,在垂直于第一边1101的方向上延伸的长条形状。另外,第二颜色子像素和第三颜色子像素也可以为椭圆形。对于第二颜色子像素,如果通过沿平行于第一边1101的方向的中心将其分为两个部分(这两部分例如为位于第一虚拟矩形110中的第二颜色子像素块112和位于第二虚拟矩形120中的第二颜色子像素块112),则两个第二颜色子像素块112的中心之间的距离小于虚拟矩形的边长的0.3倍。另外,第二颜色子像素沿垂直于第一边1101的方向的尺寸小于虚拟矩形边长的0.6倍。
对于第二颜色子像素和第三颜色子像素而言,沿垂直于第一边1101的方向的尺寸与沿平行于第一边1101的方向的尺寸的比值为γ,且γ>1。也就是说,第二颜色子像素和第三颜色子像素为沿垂直于第一边1101的方向延伸的长条形状。
例如,第二颜色子像素为红色子像素,第三颜色子像素为蓝色子像素。红色子像素的寿命通常比蓝色子像素长,因此,红色子像素的面积可以小于蓝色子像素的面积,但红色子像素的上述尺寸比值γ也不能太小,如果太小可能会使横向和竖向差异明显。
需要说明的是,本公开的各实施例中,显示基板可以包括更多或更少的结构,各个结构之间的位置关系不受限制,可以根据实际需求而定。第一颜色子像素块111、第二颜色子像素块112和第三颜色子像素块113的颜色不受限制,可以为任意颜色。第一颜色子像素块111、第二颜色子像素块112和第三颜色子像素块113的结构不受限制,可以根据实际需求而定。例如,在另一个示例中,如图9B所示,该显示基板为彩膜基板,第一颜色子像素块111包括第一颜色滤光片114,第二颜色子像素块112包括第二颜色滤光片115,第三颜色子像素块113包括第三颜色滤光片116,各个颜色的滤光片 与对应颜色的子像素块的形状相同。本公开至少一个实施例还提供一种用于本公开任一实施例所述的像素排列结构的显示方法。该显示方法包括:将所述第一颜色子像素块分别沿所述第一方向和与所述第一方向垂直的方向连接为多条彼此交叉的虚拟线,确定所述虚拟线的交叉点为虚拟像素点;为所述虚拟像素点分配显示数据;根据与每个所述虚拟矩形相邻的两个虚拟像素点的显示数据计算对应的虚拟矩形内的子像素块的显示数据。利用该显示方法,可以使本公开任一实施例所述的像素排列结构进行显示,可以避免在画面边缘出现彩边,有助于提高显示质量,能够实现300PPI或略高的分辨率的真实像素显示。
图10为本公开一实施例提供的一种显示方法的流程图。参考图10,该显示方法包括如下步骤:
步骤S510:将第一颜色子像素块分别沿第一方向和与第一方向垂直的方向连接为多条彼此交叉的虚拟线,确定虚拟线的交叉点为虚拟像素点;
步骤S520:为虚拟像素点分配显示数据;
步骤S530:根据与每个虚拟矩形相邻的两个虚拟像素点的显示数据计算对应的虚拟矩形内的子像素块的显示数据。
现结合图11所示的像素排列结构对图10所示的显示方法进行说明。如图11所示,在步骤S510中,将第一颜色子像素块111分别沿第一方向和与第一方向垂直的方向连接为多条彼此交叉的虚拟线,并确定虚拟线的交叉点为虚拟像素点。由此得到多个虚拟像素点,例如,第一虚拟像素点1、第二虚拟像素点2和第三虚拟像素点3。当然,本公开的实施例不限于此,虚拟像素点的数量可以为任意个数,可以根据像素排列结构的大小和第一颜色子像素块111的数量而定。例如,各个虚拟像素点与第一颜色子像素块111不重叠。
例如,多个虚拟像素点沿着第一方向和与第一方向垂直的方向整齐排列。第一方向与驱动线的延伸方向平行或垂直。例如,在第一方向上,各个相邻的虚拟像素点彼此之间的距离相等。例如,在与第一方向垂直的方向上,各个相邻的虚拟像素点彼此之间的距离也相等。在步骤S520中,为虚拟像素点分配显示数据,即将显示数据分配给整齐排列的多个虚拟像素点。例如,为第一虚拟像素点1分配的显示数据为1(r1,g1,b1),为第二虚拟像素点2分 配的显示数据为2(r2,g2,b2),为第三虚拟像素点3分配的显示数据为3(r3,g3,b3)。例如,可以采用设置在显示面板外的定时控制器来对显示数据进行处理和分配,以匹配显示面板的大小和分辨率,分配方法可以与传统的显示面板的分配方法类似,本公开的实施例对此不作限制。
图11中示出了第一虚拟矩形110和第二虚拟矩形120。例如,第一虚拟矩形110内的子像素块的显示数据用A(Ra,Ga,Ba)表示,Ra表示第二颜色子像素块112的显示数据,Ga表示第一颜色子像素块111的显示数据,Ba表示第三颜色子像素块113的显示数据。同样地,第二虚拟矩形120内的子像素块的显示数据用B(Rb,Gb,Bb)表示。在步骤S530中,根据与每个虚拟矩形相邻的两个虚拟像素点的显示数据计算对应的虚拟矩形内的子像素块的显示数据。例如,根据第一虚拟像素点1和第二虚拟像素点2的显示数据1(r1,g1,b1)和2(r2,g2,b2)来计算第一虚拟矩形110内的子像素块的显示数据A(Ra,Ga,Ba)。根据第一虚拟像素点1和第三虚拟像素点3的显示数据1(r1,g1,b1)和3(r3,g3,b3)来计算第二虚拟矩形120内的子像素块的显示数据B(Rb,Gb,Bb)。
例如,计算方法可以采用插值法,例如,平均插值法。第一虚拟矩形110内的子像素块的显示数据A(Ra,Ga,Ba)可以计算为:Ra=(r1+r2)/2,Ga=(g1+g2)/2,Ba=(b1+b2)/2。第二虚拟矩形120内的子像素块的显示数据B(Rb,Gb,Bb)可以计算为:Rb=(r1+r3)/2,Gb=(g1+g3)/2,Bb=(b1+b3)/2。在该像素排列结构中,其他虚拟矩形内的子像素块也采用这种方式进行计算,从而可以将虚拟像素点的显示数据转换为该像素排列结构中各个虚拟矩形内的子像素块的显示数据,即可显示所需要的图像。需要说明的是,在本公开的各实施例中,插值法的类型不受限制,可以为平均插值法,也可以为Lagrange插值法、Newton插值法或其他适用的插值法,这可以根据显示效果而定。当然,计算方法不限于插值法,也可以为其他适用的方法,本公开的实施例对此不作限制。
例如,在与第一边1101垂直(或与第一方向的夹角为45度)的方向上相邻的两个虚拟矩形(例如,第一虚拟矩形110和第二虚拟矩形120)中,与其中一个虚拟矩形对应的两个虚拟像素点分布在第一方向上,与另一个虚拟矩形对应的两个虚拟像素点分布在与第一方向垂直的方向上。例如,与第 一虚拟矩形110对应的第一虚拟像素点1和第二虚拟像素点2分布在第一方向上,与第二虚拟矩形120对应的第一虚拟像素点1和第三虚拟像素点3分布在与第一方向垂直的方向上。这样可以提高画面在第一方向和与第一方向垂直的方向上的显示质量。
需要说明的是,本公开的各实施例中,显示方法不局限于上面描述的步骤和顺序,还可以包括更多或更少的步骤,各个步骤之间的顺序可以根据实际需求而定。
本公开至少一个实施例还提供一种如本公开任一实施例所述的像素排列结构的制备方法,利用该制备方法可以制备上述像素排列结构,可以避免或改善在画面边缘出现的彩边,有助于提高显示质量,能够实现300PPI或略高的分辨率的真实像素显示。
例如,在一个示例中,该像素排列结构的制备方法包括如下操作:
利用精细金属掩模板在阵列基板上蒸镀以形成该像素排列结构。
例如,该像素排列结构为图1至图6、图8中任一所示的像素排列结构。
例如,精细金属掩模板的张网方向与第一方向具有不为零的夹角,该夹角例如与像素排列结构中每个虚拟矩形的任意一边与第一方向的夹角相等。因此,这种方式可以使精细金属掩模板的张网方向与和各个子像素块对应的开口的延伸方向一致,从而使精细金属掩模板的受力方向与和各个子像素块对应的开口的延伸方向一致,有利于降低工艺难度,提高工艺精度。在工艺制程中,例如在蒸镀过程中,可以使精细金属掩模板的张网方向与阵列基板的任意一边具有上述夹角,从而能够形成上述像素排列结构的图案。
需要说明的是,本公开的各实施例中,像素排列结构的制备方法不局限于上面描述的步骤和顺序,还可以包括更多的步骤,各个步骤之间的顺序可以根据实际需求而定。
以上所述仅是本公开的示范性实施方式,而非用于限制本公开的保护范围,本公开的保护范围由所附的权利要求确定。

Claims (33)

  1. 一种像素排列结构,包括:
    分布在多个最小重复区域中的多个第一颜色子像素块、多个第二颜色子像素块以及多个第三颜色子像素块,
    其中,各所述最小重复区域为矩形形状且包括四个虚拟矩形,所述四个虚拟矩形包括第一虚拟矩形,一个所述第一虚拟矩形包括一个第一颜色子像素块、一个第二颜色子像素块以及一个第三颜色子像素块,
    所述第一虚拟矩形的任意一边与第一方向具有不为零的夹角,所述第一方向为行方向或列方向,
    所述第一虚拟矩形包括相互垂直的第一边和第二边,所述第一颜色子像素块位于所述第一边的中垂线上,所述第二颜色子像素块和所述第三颜色子像素块分布在所述第一边的中垂线的两侧,所述第二颜色子像素块和所述第三颜色子像素块与所述第一边的距离均小于所述第一颜色子像素块与所述第一边的距离。
  2. 根据权利要求1所述的像素排列结构,其中,所述第一虚拟矩形的任意一边与所述第一方向的夹角为10度至50度。
  3. 根据权利要求1所述的像素排列结构,其中,所述第一颜色子像素块的中心位于所述第一边的中垂线上,所述第二颜色子像素块和所述第三颜色子像素块分布在所述第一边的中垂线的两侧,所述第二颜色子像素块的中心和所述第三颜色子像素块的中心与所述第一边的距离均小于所述第一颜色子像素块的中心与所述第一边的距离。
  4. 根据权利要求1-3任一所述的像素排列结构,其中,所述四个虚拟矩形还包括第二虚拟矩形、第三虚拟矩形以及第四虚拟矩形,所述第一虚拟矩形、第二虚拟矩形、第三虚拟矩形以及第四虚拟矩形以共边的方式形成2*2矩阵以构成所述最小重复区域,
    所述第二虚拟矩形与所述第一虚拟矩形共用所述第一边,且所述第二虚拟矩形与所述第一虚拟矩形关于所述第一边呈镜像对称,
    所述第一虚拟矩形沿其对角线平移所述对角线的长度与所述第三虚拟矩形重合,所述第三虚拟矩形与所述第二虚拟矩形相邻,
    所述第三虚拟矩形包括第三边,所述第四虚拟矩形与所述第三虚拟矩形共用所述第三边,且所述第四虚拟矩形与所述第三虚拟矩形关于所述第三边呈镜像对称,所述第三边与所述第一边在同一条直线上。
  5. 根据权利要求1-4任一所述的像素排列结构,其中,所述第一颜色子像素块为绿色子像素块,所述第二颜色子像素块为红色子像素块,所述第三颜色子像素块为蓝色子像素块。
  6. 根据权利要求1-5任一所述的像素排列结构,其中,所述第一颜色子像素块的形状为直角底角对称五边形,所述直角底角对称五边形关于所述第一边的中垂线对称,且所述直角底角对称五边形的底边平行于所述第一边,且在垂直于所述第一边的方向上相对于所述直角底角对称五边形的顶点更远离所述第一边。
  7. 根据权利要求1-5任一所述的像素排列结构,其中,所述第二颜色子像素块和/或所述第三颜色子像素块的形状为直角底角对称五边形,所述直角底角对称五边形的底边平行于所述第一边或者位于所述第一边上,且在垂直于所述第一边的方向上相对于所述直角底角对称五边形的顶点更靠近所述第一边。
  8. 根据权利要求1-5任一所述的像素排列结构,其中,所述第二颜色子像素块和所述第三颜色子像素块的形状均为直角底角五边形,所述直角底角五边形的底边平行于所述第一边或者位于所述第一边上,且在垂直于所述第一边的方向上相对于所述直角底角五边形的顶点更靠近所述第一边,所述直角底角五边形包括经过所述直角底角五边形顶点的第一斜边和第二斜边,所述第一斜边与位于同一个虚拟矩形内的所述第一颜色子像素块相对设置,所述第一斜边的长度大于所述第二斜边的长度。
  9. 根据权利要求8所述的像素排列结构,其中,所述第一颜色子像素块的形状为直角底角对称五边形,所述直角底角对称五边形关于所述第一边的中垂线对称,且所述直角底角对称五边形的底边平行于所述第一边,且在垂直于所述第一边的方向上相对于所述直角底角对称五边形的顶点更远离所述第一边,所述直角底角对称五边形包括经过所述直角底角对称五边形顶点的第三斜边和第四斜边,所述第三斜边和第四斜边长度相同,所述第一颜色子像素块的第三斜边与位于同一个虚拟矩形内的所述第二颜色子像素块的第一 斜边平行且间距为第一距离,所述第一颜色子像素块的第四斜边与位于同一个虚拟矩形内的所述第三颜色子像素块的第一斜边平行且间距为第二距离。
  10. 根据权利要求9所述的像素排列结构,其中,在所述第一虚拟矩形和所述第二虚拟矩形中,所述第二颜色子像素块相对于所述第三颜色子像素块更远离所述最小重复区域的中心,在所述第三虚拟矩形和所述第四虚拟矩形中,所述第三颜色子像素块相对于所述第二颜色子像素块更远离所述最小重复区域的中心,其中,所述第一虚拟矩形中的第三颜色子像素块与第四虚拟矩形中的第二颜色子像素块相邻,所述第二虚拟矩形中第三颜色子像素块与第三虚拟矩形中的第二颜色子像素块相邻,所述第一虚拟矩形中的第三颜色子像素块的第二斜边与第四虚拟矩形中的第二颜色子像素块的第二斜边平行且间距为第三距离,所述第二虚拟矩形中第三颜色子像素块的第二斜边与第三虚拟矩形中的第二颜色子像素块的第二斜边平行且间距为第四距离。
  11. 根据权利要求10所述的像素排列结构,其中,所述第一距离、所述第二距离、所述第三距离和所述第四距离均相等。
  12. 根据权利要求1-5任一所述的像素排列结构,其中,所述第二颜色子像素块和所述第三颜色子像素块的形状均为直角梯形,所述直角梯形的底边垂直于所述第一边,所述直角梯形的直角边与所述第一边的距离小于所述直角梯形的斜边与所述第一边的距离。
  13. 根据权利要求12所述的像素排列结构,其中,所述第一颜色子像素块的形状为直角底角对称五边形,所述直角底角对称五边形关于所述第一边的中垂线对称,且所述直角底角对称五边形的底边平行于所述第一边,且在垂直于所述第一边的方向上相对于所述直角底角对称五边形的顶点更远离所述第一边,所述直角底角对称五边形包括经过所述直角底角对称五边形顶点的第三斜边和第四斜边,所述第三斜边和第四斜边长度相同,所述第一颜色子像素块的第三斜边与位于同一个虚拟矩形内的所述第二颜色子像素块的斜边平行且间距为第五距离,所述第一颜色子像素块的第四斜边与位于同一个虚拟矩形内的所述第三颜色子像素块的斜边平行且间距为第六距离。
  14. 根据权利要求13所述的像素排列结构,其中,在所述第一虚拟矩形和所述第二虚拟矩形中,所述第三颜色子像素块相对于所述第二颜色子像素块更靠近所述最小重复区域的中心,在所述第三虚拟矩形和所述第四虚拟矩 形中,所述第二颜色子像素块相对于所述第三颜色子像素块更靠近所述最小重复区域的中心,所述第一虚拟矩形中的所述第三颜色子像素块与所述第四虚拟矩形中的所述第二颜色子像素块相邻,所述第二虚拟矩形中所述第三颜色子像素块与所述第三虚拟矩形中的所述第二颜色子像素块相邻,
    所述第一虚拟矩形中的所述第三颜色子像素块的锐角部与所述第四虚拟矩形中的所述第二颜色子像素块的锐角部间距为第七距离,所述第二虚拟矩形中所述第三颜色子像素块的锐角部与所述第三虚拟矩形中的所述第二颜色子像素块的锐角部间距为第八距离。
  15. 根据权利要求14所述的像素排列结构,其中,所述第五距离、所述第六距离、所述第七距离和所述第八距离均相等。
  16. 根据权利要求1-5任一所述的像素排列结构,其中,所述第一颜色子像素块的中心与所述第一边的距离大于或等于所述第二边的长度的一半且小于或等于所述第二边的长度的四分之三。
  17. 根据权利要求4或5所述的像素排列结构,其中,在同一所述最小重复区域中,所述第三虚拟矩形中的第一颜色子像素块与所述第四虚拟矩形中的第一颜色子像素块的中心距离大于或等于所述第二边的长度的一半且小于或等于所述第二边的长度。
  18. 根据权利要求4或5所述的像素排列结构,其中,在同一所述最小重复区域中,所述第一虚拟矩形的第二颜色子像素块和所述第二虚拟矩形的第二颜色子像素块集成为同一个子像素并作为整体共同显示,
    在与所述第一边垂直的方向上相邻的两个所述最小重复区域中,所述相邻的两个最小重复区域包括第一最小重复区域和第二最小重复区域,所述第一最小重复区域的第四虚拟矩形和所述第二最小重复区域的第三虚拟矩形相邻,所述第一最小重复区域的第四虚拟矩形的第二颜色子像素块和所述第二最小重复区域的第三虚拟矩形的第二颜色子像素块集成为同一个子像素并作为整体共同显示。
  19. 根据权利要求18所述的像素排列结构,其中,在同一所述最小重复区域中,所述第一虚拟矩形的第三颜色子像素块和所述第二虚拟矩形的第三颜色子像素块集成为同一个子像素并作为整体共同显示,
    在与所述第一边垂直的方向上相邻的两个所述最小重复区域中,所述相 邻的两个最小重复区域包括第一最小重复区域和第二最小重复区域,所述第一最小重复区域的第四虚拟矩形和所述第二最小重复区域的第三虚拟矩形相邻,所述第一最小重复区域的第四虚拟矩形的第三颜色子像素块和所述第二最小重复区域的第三虚拟矩形的第三颜色子像素块集成为同一个子像素并作为整体共同显示。
  20. 根据权利要求1-5任一所述的像素排列结构,其中,所述像素排列结构构成一个矩形排列区域,所述矩形排列区域的任意一边与所述第一虚拟矩形的任意一边的夹角为45度。
  21. 根据权利要求1-5任一所述的像素排列结构,其中,所述第一方向与驱动所述像素排列结构的驱动线的延伸方向平行或相互垂直。
  22. 一种像素排列结构,包括:
    分布在多个最小重复区域中多个第一颜色子像素块、多个第二颜色子像素块以及多个第三颜色子像素块,
    其中,各所述最小重复区域为矩形形状且包括四个虚拟矩形,所述四个虚拟矩形包括第一虚拟矩形,一个所述第一虚拟矩形包括一个第一颜色子像素块、一个第二颜色子像素块以及一个第三颜色子像素块,
    所述像素排列结构构成一个矩形排列区域,所述第一虚拟矩形的任意一边与所述矩形排列区域的任意一边具有不为零的夹角,
    所述第一虚拟矩形包括相互垂直的第一边和第二边,所述第一颜色子像素块位于所述第一边的中垂线上,所述第二颜色子像素块和所述第三颜色子像素块分布在所述第一边的中垂线的两侧,所述第二颜色子像素块和所述第三颜色子像素块与所述第一边的距离均小于所述第一颜色子像素块与所述第一边的距离。
  23. 一种显示基板,包括:
    衬底基板;
    设置在所述衬底基板上的多个像素;
    其中,所述多个像素采用权利要求1-22中任一所述的像素排列结构。
  24. 根据权利要求23所述的显示基板,其中,所述四个虚拟矩形还包括第二虚拟矩形、第三虚拟矩形以及第四虚拟矩形,所述第一虚拟矩形、第二虚拟矩形、第三虚拟矩形以及第四虚拟矩形以共边的方式形成2*2矩阵以构 成所述最小重复区域,
    所述第二虚拟矩形与所述第一虚拟矩形共用所述第一边,且所述第二虚拟矩形与所述第一虚拟矩形关于所述第一边呈镜像对称,
    所述第一虚拟矩形沿其对角线平移所述对角线的长度与所述第三虚拟矩形重合,所述第三虚拟矩形与所述第二虚拟矩形相邻,
    所述第三虚拟矩形包括第三边,所述第四虚拟矩形与所述第三虚拟矩形共用所述第三边,且所述第四虚拟矩形与所述第三虚拟矩形关于所述第三边呈镜像对称,所述第三边与所述第一边在同一条直线上,
    所述第一颜色子像素块包括第一颜色像素电极以及设置在所述第一颜色像素电极上的第一颜色发光层,所述第二颜色子像素块包括第二颜色像素电极以及设置在所述第二颜色像素电极上的第二颜色发光层,所述第三颜色子像素块包括第三颜色像素电极以及设置在所述第三颜色像素电极上的第三颜色发光层,
    所述第一颜色像素电极被配置为驱动所述第一颜色发光层发光,
    所述第二颜色像素电极被配置为驱动所述第二颜色发光层发光,
    所述第三颜色像素电极被配置为驱动所述第三颜色发光层发光。
  25. 根据权利要求24所述的显示基板,其中,在同一所述最小重复区域中,所述第三虚拟矩形的第一颜色子像素块的第一颜色发光层和所述第四虚拟矩形的第一颜色子像素块的第一颜色发光层通过分享同一单一色彩图形区域形成,
    在与所述第一边垂直的方向上相邻的两个所述最小重复区域中,所述相邻的两个最小重复区域包括第一最小重复区域和第二最小重复区域,所述第一最小重复区域的第一虚拟矩形的第一颜色子像素块的第一颜色发光层和所述第二最小重复区域的所述第二虚拟矩形的第一颜色子像素块的第一颜色发光层通过分享同一单一色彩图形区域形成。
  26. 根据权利要求25所述的显示基板,其中,在同一所述最小重复区域中,通过分享同一单一色彩图形区域形成的所述第三虚拟矩形的所述第一颜色子像素块的所述第一颜色发光层和所述第四虚拟矩形的所述第一颜色子像素块的所述第一颜色发光层的面积大于所述第三虚拟矩形的所述第一颜色子像素块的所述第一颜色像素电极的面积和所述第四虚拟矩形的所述第一颜色 子像素块的所述第一颜色像素电极的面积之和,
    在与所述第一边垂直的方向上相邻的两个所述最小重复区域中,所述相邻的两个最小重复区域包括第一最小重复区域和第二最小重复区域,通过分享同一单一色彩图形区域形成的所述第一最小重复区域的所述第一虚拟矩形的所述第一颜色子像素块的所述第一颜色发光层和所述第二最小重复区域的所述第二虚拟矩形的所述第一颜色子像素块的所述第一颜色发光层的面积大于所述第一最小重复区域的所述第一虚拟矩形的所述第一颜色子像素块的所述第一颜色像素电极的面积和所述第二最小重复区域的所述第二虚拟矩形的所述第一颜色子像素块的所述第一颜色像素电极的面积之和。
  27. 根据权利要求24所述的显示基板,其中,在同一所述最小重复区域中,所述第一虚拟矩形的第二颜色子像素块的第二颜色像素电极和所述第二虚拟矩形的第二颜色子像素块的第二颜色像素电极合并为同一像素电极,
    在与所述第一边垂直的方向上相邻的两个所述最小重复区域中,所述相邻的两个最小重复区域包括第一最小重复区域和第二最小重复区域,所述第一最小重复区域的第四虚拟矩形的第二颜色子像素块的第二颜色像素电极和所述第二最小重复区域的所述第三虚拟矩形的第二颜色子像素块的第二颜色像素电极合并为同一像素电极。
  28. 根据权利要求24所述的显示基板,其中,在同一所述最小重复区域中,所述第一虚拟矩形的第三颜色子像素块的第三颜色像素电极和所述第二虚拟矩形的第三颜色子像素块的第三颜色像素电极合并为同一像素电极,
    在与所述第一边垂直的方向上相邻的两个所述最小重复区域中,所述相邻的两个最小重复区域包括第一最小重复区域和第二最小重复区域,所述第一最小重复区域的第四虚拟矩形的第三颜色子像素块的第三颜色像素电极和所述第二最小重复区域的所述第三虚拟矩形的第三颜色子像素块的第三颜色像素电极合并为同一像素电极。
  29. 根据权利要求23所述的显示基板,其中,所述第一颜色子像素块包括第一颜色滤光片,所述第二颜色子像素块包括第二颜色滤光片,所述第三颜色子像素块包括第三颜色滤光片。
  30. 一种用于权利要求1-22任一所述的像素排列结构的显示方法,包括:
    将所述第一颜色子像素块分别沿所述第一方向和与所述第一方向垂直的 方向连接为多条彼此交叉的虚拟线,确定所述虚拟线的交叉点为虚拟像素点;
    为所述虚拟像素点分配显示数据;
    根据与每个所述虚拟矩形相邻的两个虚拟像素点的显示数据计算对应的虚拟矩形内的子像素块的显示数据。
  31. 根据权利要求30所述的显示方法,其中,在与所述第一边垂直的方向上相邻的两个所述虚拟矩形中,与其中一个所述虚拟矩形对应的两个虚拟像素点分布在所述第一方向上,与另一个所述虚拟矩形对应的两个虚拟像素点分布在与所述第一方向垂直的方向上。
  32. 根据权利要求30或31所述的显示方法,其中,根据与所述虚拟矩形相邻的两个虚拟像素点的显示数据计算对应的虚拟矩形内的子像素块的显示数据包括:
    利用插值法计算所述虚拟矩形内的子像素块的显示数据。
  33. 一种如权利要求1-22任一所述的像素排列结构的制备方法,包括:
    利用精细金属掩模板在阵列基板上蒸镀以形成所述像素排列结构;
    其中,所述精细金属掩模板的张网方向与所述第一方向具有不为零的夹角。
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Families Citing this family (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN112018147B (zh) * 2019-05-13 2022-06-10 京东方科技集团股份有限公司 阵列基板、显示装置和掩模板
CN113471263B (zh) * 2021-06-30 2024-05-28 上海天马微电子有限公司 一种显示面板及显示装置
CN112368840B (zh) * 2020-09-10 2021-12-10 京东方科技集团股份有限公司 像素阵列及显示装置
CN115274798B (zh) * 2022-07-25 2024-09-03 武汉华星光电半导体显示技术有限公司 显示面板及显示装置

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN102201430A (zh) * 2010-03-26 2011-09-28 乐金显示有限公司 有机电致发光显示设备及其制造方法
CN104282727A (zh) * 2014-09-30 2015-01-14 京东方科技集团股份有限公司 一种像素结构及其显示方法、显示装置
US20150015465A1 (en) * 2013-07-09 2015-01-15 Samsung Display Co., Ltd. Unit pixel and organic light emitting display device having the same
CN205355055U (zh) * 2016-02-18 2016-06-29 京东方科技集团股份有限公司 一种像素排列结构、显示面板及显示装置

Family Cites Families (184)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
AU544556B2 (en) 1979-12-04 1985-06-06 Mitsubishi Denki Kabushiki Kaisha Colour display panel
JPS60120398A (ja) 1983-12-02 1985-06-27 シチズン時計株式会社 マトリクス形カラー表示装置の駆動方法
JP2584490B2 (ja) 1988-06-13 1997-02-26 三菱電機株式会社 マトリクス型カラ−液晶表示装置
US5341153A (en) 1988-06-13 1994-08-23 International Business Machines Corporation Method of and apparatus for displaying a multicolor image
US6681053B1 (en) 1999-08-05 2004-01-20 Matsushita Electric Industrial Co., Ltd. Method and apparatus for improving the definition of black and white text and graphics on a color matrix digital display device
US6950115B2 (en) 2001-05-09 2005-09-27 Clairvoyante, Inc. Color flat panel display sub-pixel arrangements and layouts
JP3620490B2 (ja) 2000-11-22 2005-02-16 ソニー株式会社 アクティブマトリクス型表示装置
US7123277B2 (en) 2001-05-09 2006-10-17 Clairvoyante, Inc. Conversion of a sub-pixel format data to another sub-pixel data format
TWI227340B (en) 2002-02-25 2005-02-01 Himax Tech Inc Color filter and liquid crystal display
JP4003714B2 (ja) 2003-08-11 2007-11-07 セイコーエプソン株式会社 電気光学装置及び電子機器
JP2005091875A (ja) 2003-09-18 2005-04-07 Nippon Hoso Kyokai <Nhk> 表示装置及び表示方法
US7525526B2 (en) 2003-10-28 2009-04-28 Samsung Electronics Co., Ltd. System and method for performing image reconstruction and subpixel rendering to effect scaling for multi-mode display
JP5345286B2 (ja) 2003-12-15 2013-11-20 ジェノア・カラー・テクノロジーズ・リミテッド 多原色液晶表示装置および表示方法
TWI258721B (en) 2004-08-10 2006-07-21 Ind Tech Res Inst Full-color organic electroluminescence device
US7733359B1 (en) 2004-09-15 2010-06-08 Rockwell Collins, Inc. Pixel structure for electrical flat panel displays
WO2006115165A1 (ja) 2005-04-22 2006-11-02 Sharp Kabushiki Kaisha 表示装置
JP4302172B2 (ja) 2006-02-02 2009-07-22 シャープ株式会社 表示装置
US20070205423A1 (en) 2006-03-03 2007-09-06 Semiconductor Energy Laboratory Co., Ltd. Semiconductor device
JP2007242727A (ja) 2006-03-06 2007-09-20 Sharp Corp ヘテロ接合バイポーラトランジスタ及びこれを用いた電力増幅器
GB2437110B (en) * 2006-04-12 2009-01-28 Cambridge Display Tech Ltd Optoelectronic display and method of manufacturing the same
TWI346922B (en) 2006-06-14 2011-08-11 Au Optronics Corp Structure of pixel circuit for display and mothod of driving thereof
US20080001525A1 (en) 2006-06-30 2008-01-03 Au Optronics Corporation Arrangements of color pixels for full color OLED
CN101192382B (zh) 2006-11-29 2010-11-10 群康科技(深圳)有限公司 液晶显示器
JP2008225179A (ja) 2007-03-14 2008-09-25 Sony Corp 表示装置、表示装置の駆動方法、および電子機器
TWI359626B (en) 2007-03-22 2012-03-01 Au Optronics Corp Electro-luminescence display
CN101393924B (zh) 2007-09-21 2015-08-12 北京京东方光电科技有限公司 电致发光显示面板
US8330352B2 (en) 2007-11-13 2012-12-11 Samsung Display Co., Ltd. Organic light emitting diode display and method for manufacturing the same
KR101479994B1 (ko) 2007-11-13 2015-01-07 삼성디스플레이 주식회사 유기 발광 표시 장치 및 그 제조 방법
US8350468B2 (en) 2008-06-30 2013-01-08 Samsung Display Co., Ltd. Organic electroluminescence display including a spacer and method for fabricating the same
WO2010113357A1 (ja) 2009-04-03 2010-10-07 シャープ株式会社 ドナー基板、転写膜の製造方法、及び、有機電界発光素子の製造方法
CN101582241B (zh) 2009-06-11 2011-10-05 数能科技股份有限公司 大型发光二极管显示器的显示方法
KR20110013691A (ko) 2009-08-03 2011-02-10 삼성모바일디스플레이주식회사 화소구조 및 그를 이용한 유기전계발광표시장치
KR101571733B1 (ko) 2009-08-17 2015-11-25 엘지전자 주식회사 이동 단말기 및 그 제어방법
CA2686174A1 (en) 2009-12-01 2011-06-01 Ignis Innovation Inc High reslution pixel architecture
US8330152B2 (en) 2009-12-02 2012-12-11 Universal Display Corporation OLED display architecture with improved aperture ratio
US8754913B2 (en) 2010-04-21 2014-06-17 Lg Display Co., Ltd. Subpixel arrangement structure of display device
WO2012021767A2 (en) 2010-08-13 2012-02-16 Pixel Qi Corporation Transflective lcd with arcuate pixel portions
US9583034B2 (en) 2010-10-15 2017-02-28 Lg Display Co., Ltd. Subpixel arrangement structure for display device
KR101845332B1 (ko) 2011-06-13 2018-05-21 삼성디스플레이 주식회사 유기 발광 표시 장치 및 그 제조 방법
JP2014225329A (ja) 2011-09-12 2014-12-04 シャープ株式会社 発光デバイス、表示装置、及び照明装置
US9051797B2 (en) 2011-12-01 2015-06-09 Annular Cleaning Systems, Llc Apparatus and method for dispensing chemicals into a well
KR101615332B1 (ko) 2012-03-06 2016-04-26 삼성디스플레이 주식회사 유기 발광 표시 장치의 화소 배열 구조
US10832616B2 (en) 2012-03-06 2020-11-10 Samsung Display Co., Ltd. Pixel arrangement structure for organic light emitting diode display
KR101943995B1 (ko) 2012-06-27 2019-01-31 삼성디스플레이 주식회사 유기전계발광 표시장치
KR102063973B1 (ko) 2012-09-12 2020-01-09 삼성디스플레이 주식회사 유기전계발광 표시장치 및 그의 구동방법
EP3780113A1 (en) 2012-09-13 2021-02-17 Samsung Display Co., Ltd. Pixel arrangement structure for organic light emitting diode display
US9905604B2 (en) 2012-11-22 2018-02-27 Nikon Corporation Imaging device and imaging unit
KR101999560B1 (ko) 2012-11-28 2019-07-15 삼성디스플레이 주식회사 유기 발광 표시 장치
TWI559524B (zh) 2013-01-15 2016-11-21 友達光電股份有限公司 電激發光顯示面板之畫素結構
KR102124040B1 (ko) 2013-02-01 2020-06-29 삼성디스플레이 주식회사 박막 증착용 마스크, 이의 제조 방법, 및 이를 이용한 유기 발광 표시 장치의 제조 방법
TWI520323B (zh) 2013-02-08 2016-02-01 中華映管股份有限公司 有機發光顯示裝置之畫素結構
US20160013251A1 (en) 2013-03-04 2016-01-14 Joled Inc. El display device
KR102030799B1 (ko) 2013-03-11 2019-10-11 삼성디스플레이 주식회사 유기발광표시장치
JP5849981B2 (ja) 2013-03-25 2016-02-03 ソニー株式会社 表示装置および電子機器
KR102096051B1 (ko) 2013-03-27 2020-04-02 삼성디스플레이 주식회사 박막 트랜지스터 어레이 기판 및 이를 포함하는 유기 발광 표시 장치
TWI478128B (zh) 2013-05-23 2015-03-21 Au Optronics Corp 發光二極體顯示面板
KR20150005264A (ko) 2013-07-05 2015-01-14 삼성디스플레이 주식회사 유기 발광 표시 장치 및 그 제조 방법
CN103366683B (zh) 2013-07-12 2014-10-29 上海和辉光电有限公司 像素阵列、显示器以及将图像呈现于显示器上的方法
KR20150008712A (ko) 2013-07-15 2015-01-23 삼성디스플레이 주식회사 신호 처리 방법, 신호 처리 장치, 및 신호 처리 장치를 포함하는 표시 장치
KR102136275B1 (ko) 2013-07-22 2020-07-22 삼성디스플레이 주식회사 유기 발광 소자 및 이의 제조 방법
KR102103499B1 (ko) 2013-10-16 2020-04-23 삼성디스플레이 주식회사 유기 발광 표시 장치
CN104885141B (zh) * 2013-11-04 2018-03-16 深圳云英谷科技有限公司 显示器子像素排布及其渲染方法
CN103559866B (zh) 2013-11-08 2016-07-06 京东方科技集团股份有限公司 一种图像显示控制方法及装置
JP6207367B2 (ja) 2013-12-05 2017-10-04 株式会社ジャパンディスプレイ 有機エレクトロルミネッセンス表示装置
KR20150067624A (ko) 2013-12-10 2015-06-18 삼성디스플레이 주식회사 유기발광표시장치
CN103777393B (zh) 2013-12-16 2016-03-02 北京京东方光电科技有限公司 显示面板及其显示方法、显示装置
CN103714775B (zh) 2013-12-30 2016-06-01 北京京东方光电科技有限公司 像素阵列及其驱动方法、显示面板和显示装置
KR102205401B1 (ko) 2014-01-14 2021-01-21 삼성디스플레이 주식회사 유기발광표시장치
JP2015138955A (ja) 2014-01-24 2015-07-30 凸版印刷株式会社 薄膜トランジスタアレイ基板、el表示装置、および、薄膜トランジスタアレイ基板の製造方法
US20160351119A1 (en) 2014-02-06 2016-12-01 Joled Inc. Display apparatus
US9337241B2 (en) * 2014-03-19 2016-05-10 Apple Inc. Pixel patterns for organic light-emitting diode display
JP6369799B2 (ja) * 2014-04-23 2018-08-08 Tianma Japan株式会社 画素アレイ及び電気光学装置並びに電気機器
CN103985735A (zh) 2014-04-25 2014-08-13 友达光电股份有限公司 一种显示面板
CN103985738B (zh) 2014-05-08 2015-06-17 京东方科技集团股份有限公司 像素结构和显示装置
CN104166260B (zh) 2014-08-04 2016-09-07 京东方科技集团股份有限公司 显示基板及其驱动方法和显示装置
CN104269411B (zh) 2014-09-11 2018-07-27 京东方科技集团股份有限公司 显示面板、有机发光二极管显示器和显示装置
US11004905B2 (en) 2014-09-11 2021-05-11 Boe Technology Group Co., Ltd. Display panel and display device
CN104377229B (zh) 2014-09-30 2017-07-11 京东方科技集团股份有限公司 阵列基板、显示装置
JP2016075868A (ja) 2014-10-09 2016-05-12 Nltテクノロジー株式会社 画素アレイ及び電気光学装置並びに電気機器並びに画素レンダリング方法
CN105552099A (zh) 2014-10-29 2016-05-04 上海和辉光电有限公司 一种oled像素排列结构
CN104332486A (zh) 2014-10-29 2015-02-04 上海和辉光电有限公司 Oled像素排列结构
KR102296918B1 (ko) 2014-11-03 2021-09-02 삼성디스플레이 주식회사 표시 장치, 이의 표시 제어 방법 및 장치
JP6474232B2 (ja) 2014-11-05 2019-02-27 株式会社ジャパンディスプレイ 表示装置
JP6521610B2 (ja) 2014-11-10 2019-05-29 株式会社ジャパンディスプレイ 画像表示装置
CA2872563A1 (en) 2014-11-28 2016-05-28 Ignis Innovation Inc. High pixel density array architecture
CN104362170B (zh) 2014-11-28 2017-04-12 京东方科技集团股份有限公司 一种有机电致发光显示器件、其驱动方法及相关装置
KR102232694B1 (ko) 2014-12-03 2021-03-29 삼성디스플레이 주식회사 유기 발광 표시 패널 및 그 제조 방법
KR20160072370A (ko) 2014-12-12 2016-06-23 삼성디스플레이 주식회사 표시 장치
CN104576695B (zh) 2014-12-22 2017-08-25 信利(惠州)智能显示有限公司 Oled像素排列结构及显示装置
CN104466007B (zh) 2014-12-30 2017-05-03 京东方科技集团股份有限公司 一种像素结构及其显示方法、显示装置
CN104465714B (zh) 2014-12-30 2017-04-26 京东方科技集团股份有限公司 一种像素结构及其显示方法、显示装置
CN104537974B (zh) 2015-01-04 2017-04-05 京东方科技集团股份有限公司 数据获取子模块及方法、数据处理单元、系统和显示装置
CN105826349B (zh) 2015-01-09 2019-04-23 联咏科技股份有限公司 显示面板
JP6654280B2 (ja) * 2015-01-14 2020-02-26 天馬微電子有限公司 画素アレイ及び電気光学装置並びに電気機器並びに画素アレイの駆動方法
CN104536632B (zh) 2015-01-26 2017-07-21 京东方科技集团股份有限公司 一种内嵌式触摸屏及显示装置
CN104637987A (zh) 2015-02-06 2015-05-20 友达光电股份有限公司 一种主动矩阵有机发光显示器及其像素结构
CN104597655B (zh) 2015-02-13 2017-06-27 京东方科技集团股份有限公司 一种像素排列结构、显示面板及显示装置
KR20160104804A (ko) 2015-02-26 2016-09-06 삼성디스플레이 주식회사 유기 발광 표시 장치
TWI555195B (zh) 2015-03-27 2016-10-21 友達光電股份有限公司 顯示器的畫素排列結構
CN104835832A (zh) 2015-05-18 2015-08-12 京东方科技集团股份有限公司 像素排列结构、有机电致发光器件、显示装置、掩模板
CN104835468B (zh) 2015-05-21 2018-02-13 深圳市华星光电技术有限公司 液晶面板及其驱动方法
CN104835444B (zh) 2015-06-05 2017-07-14 京东方科技集团股份有限公司 一种显示方法及显示装置
CN204991023U (zh) 2015-08-28 2016-01-20 厦门天马微电子有限公司 显示基板的像素矩阵、显示装置
CN204991022U (zh) 2015-08-28 2016-01-20 厦门天马微电子有限公司 显示基板的像素矩阵、显示装置
CN106486514B (zh) 2015-08-31 2023-12-01 昆山国显光电有限公司 像素结构以及oled显示面板
CN105242436B (zh) 2015-11-06 2018-08-17 上海天马有机发光显示技术有限公司 一种阵列基板、显示面板及显示装置
CN105280139B (zh) 2015-11-11 2018-05-01 深圳市华星光电技术有限公司 Amoled亮度补偿方法及amoled驱动系统
KR102430444B1 (ko) 2015-12-18 2022-08-09 삼성디스플레이 주식회사 마스크 조립체, 이를 이용한 표시 장치의 제조 장치 및 표시 장치의 제조 방법
CN205231065U (zh) 2015-12-23 2016-05-11 昆山国显光电有限公司 像素结构及显示器
US9984624B2 (en) 2015-12-28 2018-05-29 Semiconductor Energy Laboratory Co., Ltd. Semiconductor device, driver IC, and electronic device
KR102515628B1 (ko) 2015-12-31 2023-03-29 엘지디스플레이 주식회사 유기 발광 표시 패널
KR102447506B1 (ko) 2016-01-05 2022-09-27 삼성디스플레이 주식회사 표시 장치의 표시 제어 방법 및 장치
CN105529008B (zh) 2016-02-01 2018-03-30 深圳市华星光电技术有限公司 液晶显示面板的驱动方法
US11233096B2 (en) 2016-02-18 2022-01-25 Boe Technology Group Co., Ltd. Pixel arrangement structure and driving method thereof, display substrate and display device
CN110137215A (zh) 2018-02-09 2019-08-16 京东方科技集团股份有限公司 像素排列结构、显示基板和显示装置
US11264430B2 (en) 2016-02-18 2022-03-01 Chengdu Boe Optoelectronics Technology Co., Ltd. Pixel arrangement structure with misaligned repeating units, display substrate, display apparatus and method of fabrication thereof
CN110134353B (zh) 2018-02-09 2021-04-27 京东方科技集团股份有限公司 颜色补偿方法、补偿装置以及显示装置
US10854684B2 (en) 2016-02-18 2020-12-01 Boe Technology Group Co., Ltd. Pixel arrangement structure and driving method thereof, display substrate and display device
CN110133899A (zh) 2018-02-09 2019-08-16 京东方科技集团股份有限公司 像素排列结构、显示基板、显示装置
CN111326121B (zh) 2018-12-13 2021-11-16 京东方科技集团股份有限公司 驱动方法、驱动芯片、显示装置和存储介质
CN107644888A (zh) * 2016-07-22 2018-01-30 京东方科技集团股份有限公司 像素排列结构、显示基板、显示装置、制作方法及掩膜版
KR102533412B1 (ko) 2016-03-21 2023-05-17 엘지전자 주식회사 유기 발광 다이오드 표시 장치 및 그의 동작 방법
TWI585968B (zh) 2016-03-22 2017-06-01 群創光電股份有限公司 顯示裝置
CN107275361B (zh) 2016-04-08 2020-10-02 乐金显示有限公司 有机发光显示装置
CN107275359B (zh) 2016-04-08 2021-08-13 乐金显示有限公司 有机发光显示装置
KR101826432B1 (ko) 2016-04-08 2018-02-07 엘지디스플레이 주식회사 유기 발광 표시 장치
KR101698718B1 (ko) 2016-04-29 2017-01-20 엘지디스플레이 주식회사 유기 발광 표시 장치
CN105911785B (zh) 2016-06-30 2019-08-23 上海中航光电子有限公司 一种显示面板和显示装置
CN205845956U (zh) 2016-07-22 2016-12-28 京东方科技集团股份有限公司 像素排列结构、显示基板、显示装置及掩膜版
CN105976757B (zh) 2016-07-26 2019-01-18 京东方科技集团股份有限公司 像素排列结构、像素电路、显示面板及驱动方法
CN106293244B (zh) 2016-08-30 2017-11-17 京东方科技集团股份有限公司 触控显示面板及其驱动方法以及触控显示装置
JP2018049774A (ja) 2016-09-23 2018-03-29 株式会社ジャパンディスプレイ 表示装置
KR20180038112A (ko) 2016-10-05 2018-04-16 삼성디스플레이 주식회사 헤드 마운티드 디스플레이 장치
CN106298865B (zh) 2016-11-16 2019-10-18 京东方科技集团股份有限公司 像素排列结构、有机电致发光器件、显示装置、掩模板
CN206163494U (zh) 2016-11-16 2017-05-10 京东方科技集团股份有限公司 像素排列结构、有机电致发光器件、显示装置、掩模板
CN106601167B (zh) 2016-12-20 2019-10-01 上海天马有机发光显示技术有限公司 一种显示面板的灰阶补偿方法、装置和系统
CN106782371B (zh) 2016-12-20 2018-01-19 惠科股份有限公司 液晶显示器件及其液晶显示面板的驱动方法
CN106531770A (zh) 2016-12-23 2017-03-22 京东方科技集团股份有限公司 一种有机电致发光显示面板、其制作方法及显示装置
EP3343544B1 (en) 2016-12-28 2022-06-15 Vestel Elektronik Sanayi ve Ticaret A.S. Method for a display device
CN106591776B (zh) * 2016-12-28 2019-12-03 武汉华星光电技术有限公司 精细掩膜板及其制作方法
CN106782307B (zh) 2017-01-25 2019-07-05 上海天马有机发光显示技术有限公司 一种oled显示面板的灰阶补偿方法以及灰阶补偿系统
CN106940978B (zh) 2017-05-15 2019-10-25 上海天马有机发光显示技术有限公司 有机发光显示面板及其驱动方法、有机发光显示装置
KR102391918B1 (ko) 2017-05-23 2022-04-29 삼성디스플레이 주식회사 유기발광표시장치
CN107293571B (zh) * 2017-06-09 2019-09-20 深圳市华星光电技术有限公司 Oled显示面板的像素排列结构及oled显示面板
CN110264898B (zh) 2017-06-12 2022-02-15 Oppo广东移动通信有限公司 像素阵列及显示器
KR102448031B1 (ko) 2017-07-28 2022-09-28 삼성디스플레이 주식회사 센서 일체형 표시장치
KR102340729B1 (ko) 2017-07-31 2021-12-16 엘지디스플레이 주식회사 유기 발광 표시 장치
CN107256695B (zh) 2017-07-31 2019-11-19 上海天马有机发光显示技术有限公司 像素电路、其驱动方法、显示面板及显示装置
CN107393468B (zh) 2017-08-24 2019-10-22 京东方科技集团股份有限公司 一种显示面板的色偏校正方法及色偏校正装置
WO2019042013A1 (zh) 2017-08-31 2019-03-07 昆山国显光电有限公司 像素结构及显示装置
CN107342037B (zh) 2017-09-01 2020-12-08 京东方科技集团股份有限公司 数据转化方法、装置和计算机可读存储介质
CN109559679B (zh) 2017-09-26 2024-07-09 京东方科技集团股份有限公司 触控显示面板及其驱动方法、像素电路、电子装置
CN107731870B (zh) * 2017-09-28 2020-12-22 上海天马有机发光显示技术有限公司 有机发光二极管像素结构及包含其的显示面板、显示装置
CN107481671B (zh) 2017-09-29 2019-11-01 京东方科技集团股份有限公司 像素电路及其驱动方法、阵列基板、显示装置
CN107665684B (zh) 2017-10-13 2020-01-14 深圳吉迪思电子科技有限公司 一种色彩Mura补偿方法
JP6978739B2 (ja) 2017-10-27 2021-12-08 Tianma Japan株式会社 Oled表示装置、マスク及びoled表示装置の製造方法
CN110720146A (zh) 2017-11-03 2020-01-21 深圳市柔宇科技有限公司 像素阵列、显示面板及电子装置
US20190139153A1 (en) 2017-11-06 2019-05-09 Alan William Howe Grant Method and system for analysing, improving, and monitoring the co-prosperity of networks
US10283086B1 (en) 2017-11-06 2019-05-07 Novatek Microelectronics Corp. Display device with novel sub-pixel configuration
KR20190072108A (ko) 2017-12-15 2019-06-25 조율호 피라미드 서브 픽셀 배열 구조를 갖는 표시 장치
CN107895568A (zh) 2017-12-28 2018-04-10 深圳市华星光电技术有限公司 液晶显示装置
WO2019134522A1 (zh) 2018-01-02 2019-07-11 京东方科技集团股份有限公司 像素排布结构、其制作方法、显示面板、显示装置和掩模板
CN109994505A (zh) 2018-01-02 2019-07-09 京东方科技集团股份有限公司 一种像素排布结构及相关装置
US10909901B2 (en) 2018-01-02 2021-02-02 Boe Technology Group Co., Ltd. Pixel arrangement, manufacturing method thereof, display panel, display device and mask
CN108364983A (zh) 2018-02-01 2018-08-03 武汉华星光电半导体显示技术有限公司 像素排列结构
CN208172439U (zh) 2018-02-09 2018-11-30 京东方科技集团股份有限公司 像素排列结构、显示基板、显示装置
CN208172438U (zh) * 2018-02-09 2018-11-30 京东方科技集团股份有限公司 像素排列结构及显示基板
CN207781607U (zh) 2018-02-09 2018-08-28 京东方科技集团股份有限公司 像素排列结构、显示基板和显示装置
CN115542617A (zh) 2018-02-09 2022-12-30 京东方科技集团股份有限公司 显示基板和显示装置
CN207781608U (zh) 2018-02-09 2018-08-28 京东方科技集团股份有限公司 显示基板和显示装置
CN207883217U (zh) 2018-02-09 2018-09-18 京东方科技集团股份有限公司 显示基板和显示装置
JP7117158B2 (ja) 2018-06-01 2022-08-12 Tianma Japan株式会社 表示装置及びその制御方法
KR102493488B1 (ko) 2018-06-15 2023-02-01 삼성디스플레이 주식회사 표시 장치
CN109037287A (zh) 2018-07-27 2018-12-18 京东方科技集团股份有限公司 子像素排列结构、掩膜装置、显示面板及显示装置
CN109638035B (zh) * 2018-11-13 2021-02-26 武汉华星光电半导体显示技术有限公司 像素排列结构及有机发光二极管显示装置
CN109491158B (zh) 2018-11-16 2021-08-17 昆山龙腾光电股份有限公司 一种显示面板及显示装置
CN109671759A (zh) 2018-12-18 2019-04-23 武汉华星光电半导体显示技术有限公司 Oled像素结构
CN109891487B (zh) 2019-01-29 2022-02-01 京东方科技集团股份有限公司 显示基板、显示面板、显示基板的制备方法及驱动方法
US11581385B2 (en) 2019-03-28 2023-02-14 Chengdu Boe Optoelectronics Technology Co., Ltd. Display substrate having additional pad layer
CN110010021A (zh) 2019-04-26 2019-07-12 京东方科技集团股份有限公司 无机发光二极管显示基板、显示装置及驱动方法
KR102656408B1 (ko) 2019-05-13 2024-04-15 삼성디스플레이 주식회사 표시 장치 및 이의 구동 방법
US11107409B2 (en) 2019-05-14 2021-08-31 Samsung Display Co., Ltd. Display device and method of driving the same
KR20210012089A (ko) 2019-07-23 2021-02-03 삼성디스플레이 주식회사 표시 장치의 오버드라이빙 데이터 획득 방법, 표시 장치의 구동 방법, 및 표시 장치
US11367377B2 (en) 2019-08-02 2022-06-21 Tianma Japan, Ltd. Display device

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN102201430A (zh) * 2010-03-26 2011-09-28 乐金显示有限公司 有机电致发光显示设备及其制造方法
US20150015465A1 (en) * 2013-07-09 2015-01-15 Samsung Display Co., Ltd. Unit pixel and organic light emitting display device having the same
CN104282727A (zh) * 2014-09-30 2015-01-14 京东方科技集团股份有限公司 一种像素结构及其显示方法、显示装置
CN205355055U (zh) * 2016-02-18 2016-06-29 京东方科技集团股份有限公司 一种像素排列结构、显示面板及显示装置

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