WO2017201772A1 - 阵列基板、液晶显示面板及阵列基板的制造方法 - Google Patents

阵列基板、液晶显示面板及阵列基板的制造方法 Download PDF

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Publication number
WO2017201772A1
WO2017201772A1 PCT/CN2016/085459 CN2016085459W WO2017201772A1 WO 2017201772 A1 WO2017201772 A1 WO 2017201772A1 CN 2016085459 W CN2016085459 W CN 2016085459W WO 2017201772 A1 WO2017201772 A1 WO 2017201772A1
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Prior art keywords
light
layer
functional
functional layer
shielding
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PCT/CN2016/085459
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English (en)
French (fr)
Inventor
张蒙蒙
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深圳市华星光电技术有限公司
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Priority to US15/110,940 priority Critical patent/US10295877B2/en
Publication of WO2017201772A1 publication Critical patent/WO2017201772A1/zh

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    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
    • G02F1/1362—Active matrix addressed cells
    • G02F1/1368—Active matrix addressed cells in which the switching element is a three-electrode device
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
    • G02F1/1362—Active matrix addressed cells
    • G02F1/136209—Light shielding layers, e.g. black matrix, incorporated in the active matrix substrate, e.g. structurally associated with the switching element
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/1333—Constructional arrangements; Manufacturing methods
    • G02F1/133345—Insulating layers
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
    • G02F1/1362—Active matrix addressed cells
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/552—Protection against radiation, e.g. light or electromagnetic waves
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
    • H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
    • H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
    • H01L27/124—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs with a particular composition, shape or layout of the wiring layers specially adapted to the circuit arrangement, e.g. scanning lines in LCD pixel circuits
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
    • H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
    • H01L27/1255—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs integrated with passive devices, e.g. auxiliary capacitors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
    • H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
    • H01L27/1259—Multistep manufacturing methods
    • H01L27/1288—Multistep manufacturing methods employing particular masking sequences or specially adapted masks, e.g. half-tone mask
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76—Unipolar devices, e.g. field effect transistors
    • H01L29/772—Field effect transistors
    • H01L29/78—Field effect transistors with field effect produced by an insulated gate
    • H01L29/786—Thin film transistors, i.e. transistors with a channel being at least partly a thin film
    • H01L29/78606—Thin film transistors, i.e. transistors with a channel being at least partly a thin film with supplementary region or layer in the thin film or in the insulated bulk substrate supporting it for controlling or increasing the safety of the device
    • H01L29/78633—Thin film transistors, i.e. transistors with a channel being at least partly a thin film with supplementary region or layer in the thin film or in the insulated bulk substrate supporting it for controlling or increasing the safety of the device with a light shield
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
    • G02F1/1362—Active matrix addressed cells
    • G02F1/136231—Active matrix addressed cells for reducing the number of lithographic steps
    • G02F1/136236—Active matrix addressed cells for reducing the number of lithographic steps using a grey or half tone lithographic process
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
    • G02F1/1362—Active matrix addressed cells
    • G02F1/13625—Patterning using multi-mask exposure
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
    • G02F1/1362—Active matrix addressed cells
    • G02F1/136286—Wiring, e.g. gate line, drain line
    • G02F1/136295—Materials; Compositions; Manufacture processes
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F2202/00—Materials and properties
    • G02F2202/10—Materials and properties semiconductor
    • G02F2202/103—Materials and properties semiconductor a-Si
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body

Definitions

  • the present invention relates to the field of liquid crystal display technology, and in particular, to an array substrate, a liquid crystal display panel, and a method of fabricating an array substrate.
  • TFT-LCD panel production the current mainstream technology is to use 5 masks, that is, 5mask process. In order to increase production capacity and reduce costs, it is currently developing in the direction of reducing the number of masks.
  • Electrode shorthand SE
  • GTM Gray Tone Mask
  • HTM Half-gray mask technology
  • the backlight When the panel is lit, the backlight is irradiated from the lower side of the panel, and the a-Si under the data line is illuminated by the backlight, so that a light leakage current is generated, so that the performance of the TFT is deteriorated to some extent, the crosstalk of the panel occurs, and the light may be caused by light. Image residue caused by leakage (Image Sticking, shorthand IS) and other issues.
  • a layer of light shielding can be made under the data line and a-Si.
  • one solution is to fabricate a gate electrode (Gate When the mask used by Electrode, abbreviated GE), the part that needs to be shaded is made in GE. Above the mask, the gate metal is used to make a light shielding layer while the scanning line is being formed. This solution does not increase mask cost and exposure cost.
  • the light shielding layer is metal, a capacitance is formed with the data line, which has a certain influence on the data transmission of the data line. If a non-metallic light-shielding layer is used, a mask is required to increase the cost of the product and the cost of production time.
  • the technical problem to be solved by the present invention is to provide a method for manufacturing an array substrate, a liquid crystal display panel and an array substrate, which can prevent a-Si under the data line from being illuminated, thereby avoiding the problem of light leakage, and not increasing the number of masks. Does not affect production capacity.
  • an array substrate including:
  • a first functional layer formed on the second region of the first light-shielding insulating layer for performing a first function, and avoiding light shielding of the second region of the first light-shielding insulating layer Affected by light;
  • a second functional layer formed on the first region of the first light-shielding insulating layer and the first functional layer for performing a second function, and under the shielding effect of the first light-shielding insulating layer, Avoid being affected by light;
  • a third functional layer is formed on the second functional layer for implementing the third function, and is protected from light under the shielding effect of the first light-shielding insulating layer;
  • the first functional layer, the second functional layer and the third functional layer are conductors or semiconductor materials.
  • the first functional layer is a gate electrode of a gate layer
  • the second functional layer is a-Si of a silicon island layer
  • the third functional layer is a source drain and a drain of a source drain layer, respectively And the data lines of the data line layer.
  • a liquid crystal display panel including:
  • a first light-shielding insulating layer formed on the substrate for shielding light entering the substrate comprising: first and second regions disposed at intervals, which are insulating materials;
  • a first functional layer formed on the second region of the first light-shielding insulating layer for performing a first function, and avoiding light shielding of the second region of the first light-shielding insulating layer Affected by light;
  • a second functional layer formed on the first region of the first light-shielding insulating layer and the first functional layer for performing a second function, and under the shielding effect of the first light-shielding insulating layer, Avoid being affected by light;
  • a third functional layer is formed on the second functional layer for implementing the third function, and is protected from light under the shielding effect of the first light-shielding insulating layer;
  • first functional layer, the second functional layer and the third functional layer are conductors or semiconductor materials
  • the liquid crystal layer is interposed between the first substrate and the second substrate.
  • the first functional layer is a gate electrode of a gate layer
  • the second functional layer is a-Si of a silicon island layer
  • the third functional layer is a source drain and a drain of a source drain layer, respectively And the data lines of the data line layer.
  • another technical solution adopted by the present invention is to provide a method for manufacturing an array substrate, the method comprising:
  • the first light-shielding insulating pattern includes a hollow region and a light-shielding region
  • the light shielding area includes a first area and a second area
  • the first functional pattern includes a hollowed out area and a functional area, the hollowed out area of the first functional pattern and the hollowed out area of the first light-shielding insulating pattern and the first
  • the functional region of the first functional pattern corresponds to the second region of the first light-shielding insulating pattern
  • the functional area of the second functional pattern corresponds to the functional area of the third functional pattern and the first area of the first light-shielding insulating pattern.
  • the step of performing the exposure and development of the first light-shielding insulating layer and the first functional layer by using the first mask to obtain the first light-shielding insulating pattern and the first functional pattern, respectively, includes:
  • the first reticle comprises: a fully transparent region, a partially transparent region, and an opaque
  • the area of the first light-shielding insulating pattern corresponds to the hollow area of the first light-shielding insulating pattern, and the partial light-transmitting area corresponds to the first area of the first light-shielding insulating pattern, and the opaque area corresponds to the first area a second region of the light-shielding insulating pattern;
  • the substrate after the first exposure process is processed by a development technique and an etching technique, respectively, to obtain the first light-shielding insulating pattern and the first functional pattern, respectively.
  • the material of the first light-shielding insulating layer is a black matrix.
  • the step of processing the substrate after the first exposure process by using a development technique and an etching technique, respectively, includes:
  • the substrate after the second exposure process is subjected to a second development process to completely dissolve a portion of the photoresist covered on the first functional layer.
  • the first etching process is a wet etching process
  • the second etching process is a dry etching process
  • the third etching process is a wet etching process.
  • the step of performing a first exposure process on the substrate after applying the photoresist by using the first mask includes: adopting a gray dimmer technique or a semi-gray dimmer technique, using the The first photomask performs a first exposure process on the substrate after the photoresist is applied.
  • the material of the first functional layer is an insulating material, and the materials of the first functional layer, the second functional layer and the third functional layer are conductors or semiconductor materials.
  • the first functional layer is fabricated as a gate electrode of a gate layer
  • the second functional layer is fabricated as a-Si of a silicon island layer
  • the third functional layer is respectively fabricated as a source drain source And the drain, and the data line of the data line layer.
  • the invention has the beneficial effects that the first light-shielding insulating layer of the present invention is formed on the substrate for covering part of the light entering the substrate, and includes: the first region and the second region which are spaced apart from each other.
  • the first functional layer is formed on the second region of the first light-shielding insulating layer, and is protected from light under the shielding effect of the second region of the first light-shielding insulating layer;
  • the second functional layer is formed On the first region of the first light-shielding insulating layer and the first functional layer, and under the shielding effect of the first light-shielding insulating layer, avoiding the influence of light;
  • the third functional layer is formed on the second functional layer, and The light shielding effect of the first light-shielding insulating layer is protected from light;
  • the first functional layer, the second functional layer and the third functional layer are conductors or semiconductor materials.
  • the first functional layer, the second functional layer, and the third functional layer are all protected from light under the shielding effect of the first light-shielding insulating layer, and the first light-shielding insulating layer is an insulating material, in this way, each can be made
  • the functional layer is not illuminated, thereby avoiding the problem of light leakage.
  • FIG. 1 is a schematic structural view of an embodiment of an array substrate of the present invention
  • FIG. 2 is a schematic structural view of an embodiment of a liquid crystal display panel of the present invention.
  • FIG. 3 is a flow chart showing an embodiment of a method for fabricating an array substrate of the present invention.
  • FIG. 4 is a flow chart showing another embodiment of a method of manufacturing an array substrate of the present invention.
  • FIG. 5 is a schematic structural view of an embodiment of a first photomask in a method of fabricating an array substrate of the present invention
  • FIG. 6 is a flow chart showing still another embodiment of a method of manufacturing an array substrate of the present invention.
  • FIG. 7 is a first schematic view showing a practical application of a method for fabricating an array substrate of the present invention.
  • FIG. 8 is a second schematic view showing the practical application of the method for fabricating the array substrate of the present invention.
  • FIG. 9 is a third schematic view showing the practical application of the method for fabricating the array substrate of the present invention.
  • FIG. 10 is a fourth schematic view showing the practical application of the method for fabricating the array substrate of the present invention.
  • FIG. 11 is a fifth schematic view showing the practical application of the method for fabricating the array substrate of the present invention.
  • FIG. 12 is a sixth schematic diagram showing the practical application of the method for fabricating the array substrate of the present invention.
  • FIG. 13 is a seventh schematic view showing the practical application of the method for fabricating the array substrate of the present invention.
  • Figure 14 is an eighth schematic view showing the practical application of the method for fabricating the array substrate of the present invention.
  • the array substrate 10 includes a substrate 11, a first light-shielding insulating layer 12, a first functional layer 13, a second functional layer 14, and a third functional layer. 15.
  • the first light-shielding insulating layer 12 is formed on the substrate 11 for shielding a part of the light entering the substrate 11, and includes: a first region 121 and a second region 122 which are disposed at intervals, and are both insulating materials, for example, may be plastic , black matrix materials, etc.
  • the first functional layer 13 is formed on the second region 122 of the first light-shielding insulating layer 12 for implementing the first function, the first function needs to be determined according to an actual application, and the second region 122 of the first light-shielding insulating layer 12 Avoid the effects of light under the shading effect.
  • the second functional layer 14 is formed on the first region 121 of the first light-shielding insulating layer 12 and the first functional layer 13, that is, a portion of the second functional layer is formed on the first region 121 of the first light-shielding insulating layer 12. Another portion is formed on the first functional layer 13 , and the other portion is also located on the second region 122 of the first light-shielding insulating layer 12 . Therefore, the second functional layer 14 can be under the light shielding effect of the first light-shielding insulating layer 12 . To avoid being affected by light.
  • the second functional layer 14 is used to implement the second function, and the second function needs to be determined according to the actual application.
  • the third functional layer 15 is formed on the second functional layer 14 for implementing the third function.
  • the third function is also determined according to the actual application.
  • the second functional layer 14 can be under the shading effect of the first light-shielding insulating layer 12.
  • the third functional layer 15 is formed on the second functional layer 14 so as to be protected from light under the shielding effect of the first light-shielding insulating layer.
  • the first functional layer 13, the second functional layer 14, and the third functional layer 15 are conductors or semiconductor materials.
  • the first functional layer 13 is a gate electrode of the gate layer
  • the second functional layer 14 is a-Si of the silicon island layer
  • the third functional layer 15 is a source drain and a drain of the source drain layer, and data.
  • a first light-shielding insulating layer is formed on the substrate for shielding a part of the light entering the substrate, and includes: a first region and a second region which are disposed at intervals, both of which are insulating materials; and the first functional layer is formed in the first a second region of the light-shielding insulating layer, and under the shielding effect of the second region of the first light-shielding insulating layer, is protected from light; the second functional layer is formed in the first region of the first light-shielding insulating layer and the first region On the functional layer, under the shielding effect of the first light-shielding insulating layer, the light is prevented from being affected; the third functional layer is formed on the second functional layer, and is protected from light under the shielding effect of the first light-shielding insulating layer.
  • the effect; the first functional layer, the second functional layer, and the third functional layer are conductor or semiconductor materials. Since the first functional layer, the second functional layer, and the third functional layer are all protected from light under the shielding effect of the first light-shielding insulating layer, and the first light-shielding insulating layer is an insulating material, in this way, each can be made The functional layer is not illuminated, thereby avoiding the problem of light leakage.
  • FIG. 2 is a schematic structural diagram of an embodiment of a liquid crystal display panel according to the present invention.
  • the liquid crystal display panel 20 includes a first substrate 21, a second substrate 22, and a liquid crystal layer 23.
  • the second substrate 22 is disposed opposite to the first substrate 21, and the liquid crystal layer 23 is interposed between the first substrate 21 and the second substrate 22.
  • the specific structure of the second substrate 22 is substantially the same as that of the array substrate described above. For the same portion of the second substrate 22 as that of FIG. 1, please refer to FIG. 1 and related text descriptions, which are not described herein.
  • the second substrate includes a substrate, a first light-shielding insulating layer, a first functional layer, a second functional layer, and a third functional layer.
  • the first light-shielding insulating layer is formed on the substrate for shielding light entering the substrate, and includes: a first region and a second region which are spaced apart, which are insulating materials; and the first functional layer is formed on the first light-shielding insulating layer
  • the second region is configured to achieve the first function, and is protected from light under the shielding effect of the second region of the first light-shielding insulating layer
  • the second functional layer is formed in the first region of the first light-shielding insulating layer and
  • the first functional layer is configured to implement the second function, and is protected from light under the shielding effect of the first light-shielding insulating layer
  • the third functional layer is formed on the second functional layer for implementing the third function, And under the shielding effect of the first light-shielding insulating layer, the light is affected by the light; wherein the first functional layer, the second functional layer and the third functional layer are conductors or semiconductor materials.
  • the first functional layer is a gate electrode of the gate layer
  • the second functional layer is a-Si of the silicon island layer
  • the third functional layer is a source drain and a drain of the source drain layer, and a data line layer Data line.
  • a first light-shielding insulating layer is formed on the substrate for shielding a part of the light entering the substrate, and includes: a first region and a second region which are disposed at intervals, both of which are insulating materials; and the first functional layer is formed in the first a second region of the light-shielding insulating layer, and under the shielding effect of the second region of the first light-shielding insulating layer, is protected from light; the second functional layer is formed in the first region of the first light-shielding insulating layer and the first region On the functional layer, under the shielding effect of the first light-shielding insulating layer, the light is prevented from being affected; the third functional layer is formed on the second functional layer, and is protected from light under the shielding effect of the first light-shielding insulating layer.
  • the effect; the first functional layer, the second functional layer, and the third functional layer are conductor or semiconductor materials. Since the first functional layer, the second functional layer, and the third functional layer are all protected from light under the shielding effect of the first light-shielding insulating layer, and the first light-shielding insulating layer is an insulating material, in this way, each can be made The functional layer is not illuminated, thereby avoiding the problem of light leakage.
  • FIG. 3 is a flowchart of an embodiment of a method for fabricating an array substrate of the present invention, the method comprising:
  • Step S101 sequentially forming a first light-shielding insulating layer and a first functional layer on the substrate.
  • the material of the first light-shielding insulating layer is an insulating material, and may be, for example, a plastic, a black matrix material or the like.
  • the material of the first functional layer is a conductor or a semiconductor material.
  • Step S102 performing exposure and development on the first light-shielding insulating layer and the first functional layer by using the first reticle to obtain a first light-shielding insulating pattern and a first functional pattern, respectively, wherein the first light-shielding insulating pattern includes a hollow area and a light-shielding area.
  • the light shielding area includes a first area and a second area
  • the first functional pattern includes a hollowed out area and a functional area
  • the hollowed out area of the first functional pattern corresponds to the hollowed out area of the first light-shielding insulating pattern and the first area
  • the function of the first functional pattern The region corresponds to the second region of the first light-shielding insulating pattern.
  • Designing the structure of the first reticle, selecting the material of each structure of the first reticle, and by first exposing the first opaque insulating layer and the first functional layer, and then developing, respectively, the first opaque insulating pattern and the first function can be respectively obtained. pattern.
  • the structure of the first reticle and the selection of the material of each structure are not limited herein.
  • the first light-shielding insulating pattern includes a hollow region and a light-shielding region, and the hollow region is a region where the material of the first light-shielding insulating layer is peeled off after development, and the light-shielding region is a region where the material of the first light-shielding insulating layer remains after development.
  • the light shielding area includes a first area and a second area.
  • the first functional pattern includes a hollowed out area and a functional area, and the hollowed out area is a region where the material of the first functional layer is peeled off after development, and the functional area is an area where the material of the first functional layer remains after development, and the functional area is for realizing A functional, first function is specifically determined by the actual application.
  • the first functional pattern has a corresponding relationship with the first light-shielding insulating pattern.
  • the hollow region of the first functional pattern corresponds to the hollow region of the first light-shielding insulating pattern and the first region, and the functional region of the first functional pattern Corresponding to the second region of the first light-shielding insulating pattern.
  • Step S103 sequentially forming a second functional layer and a third functional layer on the first light-shielding insulating pattern and the first functional pattern.
  • the material of the second functional layer and the third functional layer is a conductor or a semiconductor.
  • Step S104 performing exposure and development on the second functional layer and the third functional layer at a time by using the second reticle to obtain a second functional pattern and a third functional pattern, respectively, and the second and third functional patterns each include a hollowed out area and a functional area.
  • the functional area of the second functional pattern corresponds to the functional area of the third functional pattern and the first area of the first light-shielding insulating pattern.
  • the structure of the second reticle is designed, the materials of the respective structures of the second reticle are selected, and the second functional layer and the third functional layer are exposed and then developed, so that the second functional pattern and the third functional pattern can be respectively obtained.
  • the structure of the second reticle and the selection of the materials of the respective structures are not limited herein.
  • the second functional pattern includes a hollowed out area and a functional area.
  • the hollowed out area is the area where the material of the second functional layer is peeled off after development
  • the functional area is the area where the material of the second functional layer remains after development, and the functional area is for realizing
  • the second function is determined by the actual application.
  • the third functional pattern includes a hollowed out area and a functional area, and the hollowed out area is the area where the material of the third functional layer is peeled off after development, and the functional area is the area where the material of the third functional layer remains after development, and the functional area is for realizing
  • the first function is specifically determined by the actual application.
  • the second functional pattern, the third functional pattern, and the first light-shielding insulating pattern have a corresponding relationship, specifically, the functional area of the second functional pattern and the functional area of the third functional pattern, and the first of the first light-shielding insulating patterns.
  • the area corresponds.
  • the first light-shielding insulating layer and the first functional layer are sequentially formed on the substrate; and the first light-shielding insulating layer and the first functional layer are exposed and developed by using the first photomask to obtain the first light-shielding insulating pattern, a first functional pattern, the first light-shielding insulating pattern includes a hollowed out area and a light-shielding area, the light-shielding area includes a first area and a second area, the first functional pattern includes a hollowed out area and a functional area, the hollowed out area of the first functional pattern and the first light-shielding
  • the hollow region of the insulating pattern corresponds to the first region
  • the functional region of the first functional pattern corresponds to the second region of the first light-shielding insulating pattern;
  • the second functional layer is sequentially formed on the first light-shielding insulating pattern and the first functional pattern, a third functional layer; the second functional layer and the
  • the first light-shielding insulating layer, the first functional pattern, and the second functional pattern and the third functional pattern obtained are obtained by performing exposure development on the first light-shielding insulating layer and the first functional layer at a time by using the first mask.
  • the functional area of the first functional pattern, the functional area of the second functional pattern, and the functional area of the third functional pattern respectively correspond to the second area and the first area of the first light-shielding insulating pattern. In this way, light can be added without The number of covers does not affect the productivity, so that the functional layers of the manufactured array substrate are not illuminated, thereby avoiding the problem of light leakage.
  • step S102 may include: sub-step S1021, sub-step S1022, and sub-step S1023.
  • Sub-step S1021 coating a layer of photoresist on the first functional layer.
  • Sub-step S1022 performing a first exposure process on the substrate after coating the photoresist by using the first mask, wherein, referring to FIG. 5, the first mask 30 includes: a fully transparent region 31, a partially transparent region 32, and The opaque region 33, the material of the fully transparent region 31 is theoretically completely transparent to light, the material of the partially transparent region 32 can transmit part of the light, and the material of the opaque region 33 completely blocks the light, and does not allow the light to be blocked. Light passes through.
  • the all-light-transmissive region 31 corresponds to the hollow region of the first light-shielding insulating pattern
  • the partial light-transmitting region 32 corresponds to the first region of the first light-shielding insulating pattern
  • the opaque region 33 corresponds to the second region of the first light-shielding insulating pattern.
  • Sub-step S1023 The substrate after the first exposure process is processed by a development technique and an etching technique, respectively, to obtain a first light-shielding insulating pattern and a first functional pattern, respectively.
  • the material of the first light-shielding insulating layer is a black matrix.
  • sub-step S1023 includes: sub-step S10231, sub-step S10232, sub-step S10233, sub-step S10234, sub-step S10235, and sub-step S10236.
  • Sub-step S10231 performing a first development process on the substrate after the first exposure process to completely dissolve all the photoresist corresponding to the all-transmissive region, and partially dissolve a portion of the photoresist corresponding to the partially transparent region.
  • Sub-step S10232 performing a first etching process on the substrate after the first development process to remove the first functional layer not covered by the photoresist.
  • Sub-step S10233 performing a second etching process on the substrate after the first etching process to remove a part of the photoresist covering the first functional layer, and covering part of the light on the first functional layer The engraved glue is completely removed.
  • Sub-step S10234 performing a third etching process on the substrate after the second etching process to completely remove the first functional layer not covered by the photoresist.
  • Sub-step S10235 performing a second exposure process on the substrate after the third etching process.
  • Sub-step S10236 performing a second development process on the substrate after the second exposure process to completely dissolve a portion of the photoresist covered on the first functional layer.
  • the first etching process is a wet etching process
  • the second etching process is a dry etching process
  • the third etching process is a wet etching process.
  • the step of performing a first exposure process on the substrate after applying the photoresist by using the first mask includes: using a gray dimmer technique or a semi-gray dimmer technique, using the first mask pair to coat the light
  • the glued substrate is subjected to a first exposure treatment.
  • the substrate is a glass substrate
  • the material of the first light-shielding insulating layer is a black matrix (Black) Matrix, abbreviated BM)
  • the first functional layer is finally fabricated as a gate electrode of the gate layer
  • the second functional layer is finally formed as a silicon island layer a-Si
  • the third functional layer is finally fabricated as a source drain layer
  • a film is sequentially formed in the order of coating the BM material layer 2 ⁇ the GE material layer 3, and a layer of photoresist is coated on the GE material layer 3.
  • Layer 4 Photoresist, abbreviated PR).
  • the first photomask 30 includes a fully transparent region 31, a partially transparent region 32, and an opaque region 33; the first time is performed by GTM or HTM technology. Exposure, the area where the GE material is not needed, is completely transparent, and after full light transmission, it becomes the photoresist 41 after illumination, and the area where the GE material and the BM material are to be retained is completely opaque, and the original light is still Engraving 4, no need for GE material, only the area of the BM material is partially transparent, after partial light transmission, part of the light is turned into the photoresist 41 after illumination, and the other part without the mask is still original. Photoresist 4.
  • PR development was carried out to obtain a pattern as shown in Fig. 9, followed by wet etching of the GE material to obtain a pattern as shown in Fig. 10. Then dry etching the remaining PR material and BM material to obtain Figure 11
  • the GE material has been fabricated, and the residual PR is removed by light development, and the BM material is cured by light, as shown in FIG.
  • the final pattern obtained after PR development and BM curing is as shown in Fig. 14, thereby completing the preparation of the BM layer and the GE layer.
  • the dielectric layer film formation, the silicon island layer, the data line layer, the passivation layer, the via hole, and the ITO layer are formed according to the usual 4mask process flow.
  • a color filter (Color) is prepared according to a conventional process. Filter, abbreviated CF) substrate, for box and module production, complete the production of the complete display panel.

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Abstract

一种阵列基板（10）、液晶显示面板（20）及阵列基板（10）的制造方法，该阵列基板（10）包括：第一遮光绝缘层（12）形成在基板（11）上，用于遮住进入基板（11）的部分光线，其包括第一区域（121）和第二区域（122），均为绝缘材料；第一功能层（13）形成在第一遮光绝缘层（12）的第二区域（122）上，在第一遮光绝缘层（12）的第二区域（122）的遮光作用下避免受到光线的影响；第二功能层（14）形成在第一遮光绝缘层（12）的第一区域（121）和第一功能层（13）上，在第一遮光绝缘层（12）的遮光作用下避免受到光线的影响；第三功能层（15）形成在第二功能层（14）上，在第一遮光绝缘层（12）的遮光作用下避免受到光线的影响；第一功能层（13）、第二功能层（14）以及第三功能层（15）为导体或半导体材料。通过上述方式，能够使各个功能层不被照光，进而避免产生光漏电的问题。

Description

阵列基板、液晶显示面板及阵列基板的制造方法
【技术领域】
本发明涉及液晶显示技术领域，特别是涉及一种阵列基板、液晶显示面板及阵列基板的制造方法。
【背景技术】
薄膜晶体管-液晶显示器（Thin Film Transistor-Liquid Crystal Display，简写TFT-LCD）面板的生产，目前主流的技术是使用5道光罩，即5mask制程。为了提高产能，降低成本，目前正向着降低光罩数目方向发展。
现在，有很多产品使用4道光罩，即4mask制程。4mask制程普遍的做法是将5mask中的硅岛层（a-Si，简写AS）和数据电极层（Source Electrode，简写SE）合为一道光罩，该光罩采用灰阶掩膜技术（Gray Tone Mask，简写GTM）或者半灰阶掩膜技术（Half Tone Mask，简写HTM）进行制作。5mask制程时，仅在沟道处有a-Si，对于4mask制程，由于AS层和SE层为同一道光罩制作，于是SE层所有金属线下面全部都有半导体a-Si，包括贯穿整个面板的数据线（data line）。在面板点亮时，背光从面板下方照射，数据线下方的a-Si被背光照射到，于是产生光漏电流，使得TFT的性能受到一定程度的恶化，面板出现串扰（crosstalk）以及可能因光漏电引起的影象残留（Image Sticking，简写IS）等其他问题。
为了解决数据线下方a-Si被光照到的问题，可以在数据线和a-Si下方做一层遮光层。现有技术中，一种方案是在制作栅极电极（Gate Electrode，简写GE）所使用的mask时，将需要遮光的部分制作在GE mask上面，这样在制作扫描线同时，采用栅极金属制作一层遮光层。该方案不增加光罩成本和曝光成本。
但是，由于遮光层为金属，与数据线会形成电容，对数据线的数据传输有一定的影响。若使用非金属制作遮光层，则需要增加一道光罩，使价格成本和生产时间成本上升。
【发明内容】
本发明主要解决的技术问题是提供一种阵列基板、液晶显示面板及阵列基板的制造方法，能够使数据线下方a-Si不被照光，进而避免产生光漏电的问题，同时不增加光罩数目，不影响产能。
为解决上述技术问题，本发明采用的一个技术方案是：提供一种阵列基板，包括：
基板；
第一遮光绝缘层，形成在所述基板上，用于遮住进入所述基板的部分光线，其包括：间隔设置的第一区域和第二区域，均为绝缘材料；
第一功能层，形成在所述第一遮光绝缘层的所述第二区域上，用于实现第一功能，且在所述第一遮光绝缘层的所述第二区域的遮光作用下，避免受到光线的影响；
第二功能层，形成在所述第一遮光绝缘层的所述第一区域和所述第一功能层上，用于实现第二功能，且在所述第一遮光绝缘层的遮光作用下，避免受到光线的影响；
第三功能层，形成在所述第二功能层上，用于实现第三功能，且在所述第一遮光绝缘层的遮光作用下，避免受到光线的影响；
其中，所述第一功能层、第二功能层以及第三功能层为导体或半导体材料。
其中，所述第一功能层为栅极层的栅极电极，所述第二功能层为硅岛层的a-Si，所述第三功能层分别为源极漏极层源极和漏极，以及数据线层的数据线。
为解决上述技术问题，本发明采用的另一个技术方案是：提供一种液晶显示面板，包括：
第一基板，
第二基板，与所述第一基板相对设置，其包括：
基板；
第一遮光绝缘层，形成在所述基板上，用于遮住进入所述基板的光线，其包括：间隔设置的第一区域和第二区域，其为绝缘材料；
第一功能层，形成在所述第一遮光绝缘层的所述第二区域上，用于实现第一功能，且在所述第一遮光绝缘层的所述第二区域的遮光作用下，避免受到光线的影响；
第二功能层，形成在所述第一遮光绝缘层的所述第一区域和所述第一功能层上，用于实现第二功能，且在所述第一遮光绝缘层的遮光作用下，避免受到光线的影响；
第三功能层，形成在所述第二功能层上，用于实现第三功能，且在所述第一遮光绝缘层的遮光作用下，避免受到光线的影响；
其中，所述第一功能层、第二功能层以及第三功能层为导体或半导体材料；
液晶层，夹设在所述第一基板和所述第二基板之间。
其中，所述第一功能层为栅极层的栅极电极，所述第二功能层为硅岛层的a-Si，所述第三功能层分别为源极漏极层源极和漏极，以及数据线层的数据线。
为解决上述技术问题，本发明采用的又一个技术方案是：提供一种阵列基板的制造方法，所述方法包括：
在基板上依次形成第一遮光绝缘层、第一功能层；
利用第一光罩一次性对所述第一遮光绝缘层、第一功能层进行曝光显影，分别得到第一遮光绝缘图案、第一功能图案，所述第一遮光绝缘图案包括镂空区和遮光区，所述遮光区包括第一区域和第二区域，所述第一功能图案包括镂空区与功能区，所述第一功能图案的镂空区与所述第一遮光绝缘图案的镂空区和第一区域对应，所述第一功能图案的功能区与所述第一遮光绝缘图案的第二区域对应；
在所述第一遮光绝缘图案、第一功能图案之上依次形成第二功能层、第三功能层；
利用第二光罩一次性对所述第二功能层、第三功能层进行曝光显影，分别得到第二功能图案、第三功能图案，所述第二、三功能图案均包括镂空区与功能区，所述第二功能图案的功能区与所述第三功能图案的功能区、第一遮光绝缘图案的第一区域对应。
其中，所述利用第一光罩一次性对所述第一遮光绝缘层、第一功能层进行曝光显影，分别得到第一遮光绝缘图案、第一功能图案的步骤，包括：
在所述第一功能层上涂布一层光刻胶；
利用所述第一光罩对涂布所述光刻胶后的所述基板进行第一次曝光处理，其中，所述第一光罩包括：全透光区域、部分透光区域以及不透光区域，所述全透光区域对应所述第一遮光绝缘图案的镂空区，所述部分透光区域对应所述第一遮光绝缘图案的第一区域，所述不透光区域对应所述第一遮光绝缘图案的第二区域；
分别采用显影技术和刻蚀技术对第一次曝光处理后的所述基板进行处理，从而分别得到所述第一遮光绝缘图案、第一功能图案。
其中，所述第一遮光绝缘层的材料为黑矩阵。
其中，所述分别采用显影技术和蚀刻技术对第一次曝光处理后的所述基板进行处理的步骤，包括：
对第一次曝光处理后的所述基板进行第一次显影处理，以全部溶解掉所述全透光区域对应的所有光刻胶，部分溶解掉所述部分透光区域对应的部分光刻胶；
对第一次显影处理后的所述基板进行第一次刻蚀处理，以去掉没有被所述光刻胶覆盖的第一功能层；
对第一次刻蚀处理后的所述基板进行第二次刻蚀处理，以将覆盖在所述第一功能层上的全部光刻胶去掉一部分，将覆盖在所述第一功能层上的部分光刻胶全部去掉；
对第二次刻蚀处理后的所述基板进行第三次刻蚀处理，以将没有被光刻胶覆盖的所述第一功能层全部去掉；
对第三次刻蚀处理后的所述基板进行第二次曝光处理；
对第二次曝光处理后的所述基板进行第二次显影处理，以全部溶解掉所述第一功能层上覆盖的部分光刻胶。
其中，所述第一次刻蚀处理为湿刻蚀处理，所述第二次刻蚀处理为干刻蚀处理，所述第三次刻蚀处理为湿刻蚀处理。
其中，所述利用第一光罩对涂布所述光刻胶后的所述基板进行第一次曝光处理的步骤，包括：采用灰色调光罩技术或半灰色调光罩技术，利用所述第一光罩对涂布所述光刻胶后的所述基板进行第一次曝光处理。
其中，所述第一功能层的材料为绝缘材料，所述第一功能层、第二功能层以及第三功能层的材料为导体或半导体材料。
其中，所述第一功能层制造为栅极层的栅极电极，所述第二功能层制造为硅岛层的a-Si，所述第三功能层分别制造为源极漏极层源极和漏极，以及数据线层的数据线。
本发明的有益效果是：区别于现有技术的情况，本发明第一遮光绝缘层形成在基板上，用于遮住进入基板的部分光线，其包括：间隔设置的第一区域和第二区域，均为绝缘材料；第一功能层形成在第一遮光绝缘层的第二区域上，且在第一遮光绝缘层的第二区域的遮光作用下，避免受到光线的影响；第二功能层形成在第一遮光绝缘层的第一区域和第一功能层上，且在第一遮光绝缘层的遮光作用下，避免受到光线的影响；第三功能层，形成在第二功能层上，且在第一遮光绝缘层的遮光作用下，避免受到光线的影响；第一功能层、第二功能层以及第三功能层为导体或半导体材料。由于第一功能层、第二功能层以及第三功能层均在第一遮光绝缘层的遮光作用下避免受到光线的影响，且第一遮光绝缘层为绝缘材料，通过这种方式，能够使各个功能层不被照光，进而避免产生光漏电的问题。
【附图说明】
图1是本发明本发明阵列基板一实施方式的结构示意图；
图2是本发明液晶显示面板一实施方式的结构示意图；
图3是本发明阵列基板的制造方法一实施方式的流程图；
图4是本发明阵列基板的制造方法另一实施方式的流程图；
图5是本发明阵列基板的制造方法中第一光罩一实施方式的结构示意图；
图6是本发明阵列基板的制造方法又一实施方式的流程图；
图7是本发明阵列基板的制造方法实际应用的第一示意图；
图8是本发明阵列基板的制造方法实际应用的第二示意图；
图9是本发明阵列基板的制造方法实际应用的第三示意图；
图10是本发明阵列基板的制造方法实际应用的第四示意图；
图11是本发明阵列基板的制造方法实际应用的第五示意图；
图12是本发明阵列基板的制造方法实际应用的第六示意图；
图13是本发明阵列基板的制造方法实际应用的第七示意图；
图14是本发明阵列基板的制造方法实际应用的第八示意图。
【具体实施方式】
下面结合附图和实施方式对本发明进行详细说明。
参阅图1，图1是本发明阵列基板一实施方式的结构示意图，该阵列基板10包括：基板11、第一遮光绝缘层12、第一功能层13、第二功能层14以及第三功能层15。
第一遮光绝缘层12形成在基板11上，用于遮住进入基板11的部分光线，其包括：间隔设置的第一区域121和第二区域122，且均为绝缘材料，例如，可以是塑料、黑矩阵材料等。
第一功能层13形成在第一遮光绝缘层12的第二区域122上，用于实现第一功能，第一功能需要根据实际应用来确定，且在第一遮光绝缘层12的第二区域122的遮光作用下，避免受到光线的影响。
第二功能层14形成在第一遮光绝缘层12的第一区域121和第一功能层13上，也即是说，第二功能层一部分形成在第一遮光绝缘层12的第一区域121上，另一部分形成在第一功能层13上，该另一部分也是位于第一遮光绝缘层12的第二区域122上，因此，第二功能层14均可以在第一遮光绝缘层12的遮光作用下，避免受到光线的影响。第二功能层14用于实现第二功能，第二功能需要根据实际应用来确定。
第三功能层15形成在第二功能层14上，用于实现第三功能，第三功能也是需要根据实际应用来确定，第二功能层14均可以在第一遮光绝缘层12的遮光作用下，避免受到光线的影响，而第三功能层15形成在第二功能层14上，因而也可以在第一遮光绝缘层的遮光作用下，避免受到光线的影响。
其中，第一功能层13、第二功能层14以及第三功能层15为导体或半导体材料。
其中，第一功能层13为栅极层的栅极电极，第二功能层14为硅岛层的a-Si，第三功能层15分别为源极漏极层源极和漏极，以及数据线层的数据线。
本发明实施方式第一遮光绝缘层形成在基板上，用于遮住进入基板的部分光线，其包括：间隔设置的第一区域和第二区域，均为绝缘材料；第一功能层形成在第一遮光绝缘层的第二区域上，且在第一遮光绝缘层的第二区域的遮光作用下，避免受到光线的影响；第二功能层形成在第一遮光绝缘层的第一区域和第一功能层上，且在第一遮光绝缘层的遮光作用下，避免受到光线的影响；第三功能层，形成在第二功能层上，且在第一遮光绝缘层的遮光作用下，避免受到光线的影响；第一功能层、第二功能层以及第三功能层为导体或半导体材料。由于第一功能层、第二功能层以及第三功能层均在第一遮光绝缘层的遮光作用下避免受到光线的影响，且第一遮光绝缘层为绝缘材料，通过这种方式，能够使各个功能层不被照光，进而避免产生光漏电的问题。
参见图2，图2是本发明液晶显示面板一实施方式的结构示意图，该液晶显示面板20包括：第一基板21、第二基板22以及液晶层23。第二基板22与第一基板21相对设置，液晶层23夹设在第一基板21和第二基板22之间。第二基板22的具体结构与上述的阵列基板基本相同，第二基板22与图1相同的部分请参见图1以及相关的文字说明，在此不再赘叙。
第二基板包括：基板、第一遮光绝缘层、第一功能层、第二功能层以及第三功能层。
第一遮光绝缘层形成在基板上，用于遮住进入基板的光线，其包括：间隔设置的第一区域和第二区域，其为绝缘材料；第一功能层形成在第一遮光绝缘层的第二区域上，用于实现第一功能，且在第一遮光绝缘层的第二区域的遮光作用下，避免受到光线的影响；第二功能层形成在第一遮光绝缘层的第一区域和第一功能层上，用于实现第二功能，且在第一遮光绝缘层的遮光作用下，避免受到光线的影响；第三功能层形成在第二功能层上，用于实现第三功能，且在第一遮光绝缘层的遮光作用下，避免受到光线的影响；其中，第一功能层、第二功能层以及第三功能层为导体或半导体材料。
其中，第一功能层为栅极层的栅极电极，第二功能层为硅岛层的a-Si，第三功能层分别为源极漏极层源极和漏极，以及数据线层的数据线。
本发明实施方式第一遮光绝缘层形成在基板上，用于遮住进入基板的部分光线，其包括：间隔设置的第一区域和第二区域，均为绝缘材料；第一功能层形成在第一遮光绝缘层的第二区域上，且在第一遮光绝缘层的第二区域的遮光作用下，避免受到光线的影响；第二功能层形成在第一遮光绝缘层的第一区域和第一功能层上，且在第一遮光绝缘层的遮光作用下，避免受到光线的影响；第三功能层，形成在第二功能层上，且在第一遮光绝缘层的遮光作用下，避免受到光线的影响；第一功能层、第二功能层以及第三功能层为导体或半导体材料。由于第一功能层、第二功能层以及第三功能层均在第一遮光绝缘层的遮光作用下避免受到光线的影响，且第一遮光绝缘层为绝缘材料，通过这种方式，能够使各个功能层不被照光，进而避免产生光漏电的问题。
参见图3，图3是本发明阵列基板的制造方法一实施方式的流程图，该方法包括：
步骤S101：在基板上依次形成第一遮光绝缘层、第一功能层。
第一遮光绝缘层的材料为绝缘材料，例如，可以是塑料、黑矩阵材料等。第一功能层的材料为导体或半导体材料。
步骤S102：利用第一光罩一次性对第一遮光绝缘层、第一功能层进行曝光显影，分别得到第一遮光绝缘图案、第一功能图案，第一遮光绝缘图案包括镂空区和遮光区，遮光区包括第一区域和第二区域，第一功能图案包括镂空区与功能区，第一功能图案的镂空区与第一遮光绝缘图案的镂空区和第一区域对应，第一功能图案的功能区与第一遮光绝缘图案的第二区域对应。
设计第一光罩的结构，选择第一光罩各个结构的材料，通过对第一遮光绝缘层、第一功能层一次性曝光，然后显影，即可以分别得到第一遮光绝缘图案、第一功能图案。第一光罩的结构以及各个结构的材料的选择在此不做限定。
第一遮光绝缘层经过曝光显影后，有的区域的第一遮光绝缘层材料被剥离，有的区域的第一遮光绝缘层材料依然保留，从而形成第一遮光绝缘图案。第一遮光绝缘图案包括镂空区和遮光区，镂空区即为显影后第一遮光绝缘层的材料剥离的区域，遮光区即为显影后第一遮光绝缘层的材料依然保留的区域。遮光区包括第一区域和第二区域。
第一功能层经过曝光显影后，有的区域的第一功能层材料被剥离，有的区域的第一功能层材料依然保留，从而形成第一功能图案。第一功能图案包括镂空区和功能区，镂空区即为显影后第一功能层的材料剥离的区域，功能区即为显影后第一功能层的材料依然保留的区域，功能区是为了实现第一功能的，第一功能具体由实际应用确定。
其中，第一功能图案与第一遮光绝缘图案之间有对应关系，具体是：第一功能图案的镂空区与第一遮光绝缘图案的镂空区和第一区域对应，第一功能图案的功能区与第一遮光绝缘图案的第二区域对应。
步骤S103：在第一遮光绝缘图案、第一功能图案之上依次形成第二功能层、第三功能层。
其中，第二功能层和第三功能层的材料为导体或半导体。
步骤S104：利用第二光罩一次性对第二功能层、第三功能层进行曝光显影，分别得到第二功能图案、第三功能图案，第二、三功能图案均包括镂空区与功能区，第二功能图案的功能区与第三功能图案的功能区、第一遮光绝缘图案的第一区域对应。
设计第二光罩的结构，选择第二光罩各个结构的材料，通过对第二功能层、第三功能层进行曝光，然后显影，即可以分别得到第二功能图案、第三功能图案。第二光罩的结构以及各个结构的材料的选择在此不做限定。
第二功能层经过曝光显影后，有的区域的第二功能层材料被剥离，有的区域的第二功能层材料依然保留，从而形成第二功能图案。第二功能图案包括镂空区和功能区，镂空区即为显影后第二功能层的材料剥离的区域，功能区即为显影后第二功能层的材料依然保留的区域，功能区是为了实现第二功能的，第二功能具体由实际应用确定。
第三功能层经过曝光显影后，有的区域的第三功能层材料被剥离，有的区域的第三功能层材料依然保留，从而形成第三功能图案。第三功能图案包括镂空区和功能区，镂空区即为显影后第三功能层的材料剥离的区域，功能区即为显影后第三功能层的材料依然保留的区域，功能区是为了实现第三功能的，第一功能具体由实际应用确定。
其中，第二功能图案、第三功能图案与第一遮光绝缘图案之间有对应关系，具体是：第二功能图案的功能区与第三功能图案的功能区、第一遮光绝缘图案的第一区域对应。
本发明实施方式在基板上依次形成第一遮光绝缘层、第一功能层；利用第一光罩一次性对第一遮光绝缘层、第一功能层进行曝光显影，分别得到第一遮光绝缘图案、第一功能图案，第一遮光绝缘图案包括镂空区和遮光区，遮光区包括第一区域和第二区域，第一功能图案包括镂空区与功能区，第一功能图案的镂空区与第一遮光绝缘图案的镂空区和第一区域对应，第一功能图案的功能区与第一遮光绝缘图案的第二区域对应；在第一遮光绝缘图案、第一功能图案之上依次形成第二功能层、第三功能层；利用第二光罩一次性对第二功能层、第三功能层进行曝光显影，分别得到第二功能图案、第三功能图案，第二、三功能图案均包括镂空区与功能区，第二功能图案的功能区与第三功能图案的功能区、第一遮光绝缘图案的第一区域对应。由于利用第一光罩一次性对第一遮光绝缘层、第一功能层进行曝光显影，得到第一遮光绝缘图案、第一功能图案，以及后续得到的第二功能图案、第三功能图案，且第一功能图案的功能区、第二功能图案的功能区与第三功能图案的功能区分别与第一遮光绝缘图案的第二区域、第一区域对应，通过这种方式，能够在不增加光罩数目，不影响产能的情况下，使制造出来的阵列基板的各个功能层不被照光，进而避免产生光漏电的问题。
其中，参见图4，步骤S102可以包括：子步骤S1021、子步骤S1022以及子步骤S1023。
子步骤S1021：在第一功能层上涂布一层光刻胶。
子步骤S1022：利用第一光罩对涂布光刻胶后的基板进行第一次曝光处理，其中，参见图5，第一光罩30包括：全透光区域31、部分透光区域32以及不透光区域33，全透光区域31的材料理论上是可以完全透过光线的，部分透光区域32的材料可以透过部分光线，不透光区域33的材料完全遮住光线，不让光线透过。全透光区域31对应第一遮光绝缘图案的镂空区，部分透光区域32对应第一遮光绝缘图案的第一区域，不透光区域33对应第一遮光绝缘图案的第二区域。
子步骤S1023：分别采用显影技术和刻蚀技术对第一次曝光处理后的基板进行处理，从而分别得到第一遮光绝缘图案、第一功能图案。
其中，第一遮光绝缘层的材料为黑矩阵。
其中，参见图6，子步骤S1023包括：子步骤S10231、子步骤S10232、子步骤S10233、子步骤S10234、子步骤S10235以及子步骤S10236。
子步骤S10231：对第一次曝光处理后的基板进行第一次显影处理，以全部溶解掉全透光区域对应的所有光刻胶，部分溶解掉部分透光区域对应的部分光刻胶。
子步骤S10232：对第一次显影处理后的基板进行第一次刻蚀处理，以去掉没有被光刻胶覆盖的第一功能层。
子步骤S10233：对第一次刻蚀处理后的基板进行第二次刻蚀处理，以将覆盖在第一功能层上的全部光刻胶去掉一部分，将覆盖在第一功能层上的部分光刻胶全部去掉。
子步骤S10234：对第二次刻蚀处理后的基板进行第三次刻蚀处理，以将没有被光刻胶覆盖的第一功能层全部去掉。
子步骤S10235：对第三次刻蚀处理后的基板进行第二次曝光处理。
子步骤S10236：对第二次曝光处理后的基板进行第二次显影处理，以全部溶解掉第一功能层上覆盖的部分光刻胶。
其中，第一次刻蚀处理为湿刻蚀处理，第二次刻蚀处理为干刻蚀处理，第三次刻蚀处理为湿刻蚀处理。
其中，利用第一光罩对涂布光刻胶后的基板进行第一次曝光处理的步骤，包括：采用灰色调光罩技术或半灰色调光罩技术，利用第一光罩对涂布光刻胶后的基板进行第一次曝光处理。
下面以基板为玻璃基板、第一遮光绝缘层的材料为黑矩阵（Black Matrix，简写BM）、第一功能层最后制作为栅极层的栅极电极、第二功能层最后制作为为硅岛层的a-Si、第三功能层最后制作分别为源极漏极层源极和漏极以及数据线层的数据线、图5所示的第一光罩为例，来说明上述的方法。
参见图7至图14，在图7中，将玻璃基板1清洗后，按照涂布BM材料层2→GE材料层3的顺序依次成膜，在GE材料层3上涂布一层光刻胶层4（Photoresist，简写PR）。
参见图8，利用图5所示的第一光罩30，该第一光罩30包括全透光区域31、部分透光区域32以及不透光区域33；通过GTM或HTM技术进行第一次曝光，不需要GE材料的区域，为全透光，经过全透光光照，变为光照后的光刻胶41，需保留GE材料和BM材料的区域为完全不透光，依然是原来的光刻胶4，不需要GE材料仅需要BM材料的区域为部分透光，经过部分透光光照，一部分经过光照的，变为光照后的光刻胶41，没有受到光罩的另一部分依然是原来的光刻胶4。
曝光后进行PR显影，得到如图9所示的图案，之后进行GE材料的湿刻蚀，得到如图10所示的图案。之后对剩余PR材料和BM材料进行干刻蚀，得到如图11 所示的图案，此时仅BM区域上的GE材料已没有PR保护，对裸露GE材料湿刻蚀得到如图12所示的图案。此时GE材料已制作完毕，需对残余PR进行光照显影去除，同时对BM材料进行光照固化，如图13所示。PR显影和BM固化后得到的最终图案如图14所示，从而完成BM层和GE层的制备。
之后按照通常的4mask工艺流程进行介质层成膜、硅岛层、数据线层、钝化层、过孔和ITO层制作。阵列（Array）基板制备完成后，按照常规流程制作彩色滤光片（Color Filter，简写CF）基板，进行成盒和模组制作，完成完整的显示面板的制作。
通过上述方式，能够解决4mask技术中的数据线下方a-Si被光照产生光漏电的问题，同时不增加光罩数目，且不影响产能。
以上所述仅为本发明的实施方式，并非因此限制本发明的专利范围，凡是利用本发明说明书及附图内容所作的等效结构或等效流程变换，或直接或间接运用在其他相关的技术领域，均同理包括在本发明的专利保护范围内。

Claims (12)

  1. 一种阵列基板，其中，包括：
    基板；
    第一遮光绝缘层，形成在所述基板上，用于遮住进入所述基板的部分光线，其包括：间隔设置的第一区域和第二区域，均为绝缘材料；
    第一功能层，形成在所述第一遮光绝缘层的所述第二区域上，用于实现第一功能，且在所述第一遮光绝缘层的所述第二区域的遮光作用下，避免受到光线的影响；
    第二功能层，形成在所述第一遮光绝缘层的所述第一区域和所述第一功能层上，用于实现第二功能，且在所述第一遮光绝缘层的遮光作用下，避免受到光线的影响；
    第三功能层，形成在所述第二功能层上，用于实现第三功能，且在所述第一遮光绝缘层的遮光作用下，避免受到光线的影响；
    其中，所述第一功能层、第二功能层以及第三功能层为导体或半导体材料。
  2. 根据权利要求1所述的阵列基板，其中，所述第一功能层为栅极层的栅极电极，所述第二功能层为硅岛层的a-Si，所述第三功能层分别为源极漏极层源极和漏极，以及数据线层的数据线。
  3. 一种液晶显示面板，其中，包括：
    第一基板，
    第二基板，与所述第一基板相对设置，其包括：
    基板；
    第一遮光绝缘层，形成在所述基板上，用于遮住进入所述基板的光线，其包括：间隔设置的第一区域和第二区域，其为绝缘材料；
    第一功能层，形成在所述第一遮光绝缘层的所述第二区域上，用于实现第一功能，且在所述第一遮光绝缘层的所述第二区域的遮光作用下，避免受到光线的影响；
    第二功能层，形成在所述第一遮光绝缘层的所述第一区域和所述第一功能层上，用于实现第二功能，且在所述第一遮光绝缘层的遮光作用下，避免受到光线的影响；
    第三功能层，形成在所述第二功能层上，用于实现第三功能，且在所述第一遮光绝缘层的遮光作用下，避免受到光线的影响；
    其中，所述第一功能层、第二功能层以及第三功能层为导体或半导体材料；
    液晶层，夹设在所述第一基板和所述第二基板之间。
  4. 根据权利要求3所述的液晶显示面板，其中，所述第一功能层为栅极层的栅极电极，所述第二功能层为硅岛层的a-Si，所述第三功能层分别为源极漏极层源极和漏极，以及数据线层的数据线。
  5. 一种阵列基板的制造方法，其中，所述方法包括：
    在基板上依次形成第一遮光绝缘层、第一功能层；
    利用第一光罩一次性对所述第一遮光绝缘层、第一功能层进行曝光显影，分别得到第一遮光绝缘图案、第一功能图案，所述第一遮光绝缘图案包括镂空区和遮光区，所述遮光区包括第一区域和第二区域，所述第一功能图案包括镂空区与功能区，所述第一功能图案的镂空区与所述第一遮光绝缘图案的镂空区和第一区域对应，所述第一功能图案的功能区与所述第一遮光绝缘图案的第二区域对应；
    在所述第一遮光绝缘图案、第一功能图案之上依次形成第二功能层、第三功能层；
    利用第二光罩一次性对所述第二功能层、第三功能层进行曝光显影，分别得到第二功能图案、第三功能图案，所述第二、三功能图案均包括镂空区与功能区，所述第二功能图案的功能区与所述第三功能图案的功能区、第一遮光绝缘图案的第一区域对应。
  6. 根据权利要求5所述的方法，其中，所述利用第一光罩一次性对所述第一遮光绝缘层、第一功能层进行曝光显影，分别得到第一遮光绝缘图案、第一功能图案的步骤，包括：
    在所述第一功能层上涂布一层光刻胶；
    利用所述第一光罩对涂布所述光刻胶后的所述基板进行第一次曝光处理，其中，所述第一光罩包括：全透光区域、部分透光区域以及不透光区域，所述全透光区域对应所述第一遮光绝缘图案的镂空区，所述部分透光区域对应所述第一遮光绝缘图案的第一区域，所述不透光区域对应所述第一遮光绝缘图案的第二区域；
    分别采用显影技术和刻蚀技术对第一次曝光处理后的所述基板进行处理，从而分别得到所述第一遮光绝缘图案、第一功能图案。
  7. 根据权利要求6所述的方法，其中，所述第一遮光绝缘层的材料为黑矩阵。
  8. 根据权利要求6所述的方法，其中，所述分别采用显影技术和蚀刻技术对第一次曝光处理后的所述基板进行处理的步骤，包括：
    对第一次曝光处理后的所述基板进行第一次显影处理，以全部溶解掉所述全透光区域对应的所有光刻胶，部分溶解掉所述部分透光区域对应的部分光刻胶；
    对第一次显影处理后的所述基板进行第一次刻蚀处理，以去掉没有被所述光刻胶覆盖的第一功能层；
    对第一次刻蚀处理后的所述基板进行第二次刻蚀处理，以将覆盖在所述第一功能层上的全部光刻胶去掉一部分，将覆盖在所述第一功能层上的部分光刻胶全部去掉；
    对第二次刻蚀处理后的所述基板进行第三次刻蚀处理，以将没有被光刻胶覆盖的所述第一功能层全部去掉；
    对第三次刻蚀处理后的所述基板进行第二次曝光处理；
    对第二次曝光处理后的所述基板进行第二次显影处理，以全部溶解掉所述第一功能层上覆盖的部分光刻胶。
  9. 根据权利要求8所述的方法，其中，所述第一次刻蚀处理为湿刻蚀处理，所述第二次刻蚀处理为干刻蚀处理，所述第三次刻蚀处理为湿刻蚀处理。
  10. 根据权利要求6所述的方法，其中，所述利用第一光罩对涂布所述光刻胶后的所述基板进行第一次曝光处理的步骤，包括：采用灰色调光罩技术或半灰色调光罩技术，利用所述第一光罩对涂布所述光刻胶后的所述基板进行第一次曝光处理。
  11. 根据权利要求5所述的方法，其中，所述第一功能层的材料为绝缘材料，所述第一功能层、第二功能层以及第三功能层的材料为导体或半导体材料。
  12. 根据权利要求5所述的方法，其中，所述第一功能层制造为栅极层的栅极电极，所述第二功能层制造为硅岛层的a-Si，所述第三功能层分别制造为源极漏极层源极和漏极，以及数据线层的数据线。
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