WO2009125777A1 - 抵抗変化素子及びその製造方法 - Google Patents
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- WO2009125777A1 WO2009125777A1 PCT/JP2009/057149 JP2009057149W WO2009125777A1 WO 2009125777 A1 WO2009125777 A1 WO 2009125777A1 JP 2009057149 W JP2009057149 W JP 2009057149W WO 2009125777 A1 WO2009125777 A1 WO 2009125777A1
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10B—ELECTRONIC MEMORY DEVICES
- H10B63/00—Resistance change memory devices, e.g. resistive RAM [ReRAM] devices
- H10B63/30—Resistance change memory devices, e.g. resistive RAM [ReRAM] devices comprising selection components having three or more electrodes, e.g. transistors
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10N70/00—Solid-state devices having no potential barriers, and specially adapted for rectifying, amplifying, oscillating or switching
- H10N70/011—Manufacture or treatment of multistable switching devices
- H10N70/021—Formation of switching materials, e.g. deposition of layers
- H10N70/023—Formation of switching materials, e.g. deposition of layers by chemical vapor deposition, e.g. MOCVD, ALD
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10N70/00—Solid-state devices having no potential barriers, and specially adapted for rectifying, amplifying, oscillating or switching
- H10N70/011—Manufacture or treatment of multistable switching devices
- H10N70/021—Formation of switching materials, e.g. deposition of layers
- H10N70/026—Formation of switching materials, e.g. deposition of layers by physical vapor deposition, e.g. sputtering
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10N70/00—Solid-state devices having no potential barriers, and specially adapted for rectifying, amplifying, oscillating or switching
- H10N70/011—Manufacture or treatment of multistable switching devices
- H10N70/021—Formation of switching materials, e.g. deposition of layers
- H10N70/028—Formation of switching materials, e.g. deposition of layers by conversion of electrode material, e.g. oxidation
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10N70/00—Solid-state devices having no potential barriers, and specially adapted for rectifying, amplifying, oscillating or switching
- H10N70/011—Manufacture or treatment of multistable switching devices
- H10N70/061—Shaping switching materials
- H10N70/063—Shaping switching materials by etching of pre-deposited switching material layers, e.g. lithography
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10N70/00—Solid-state devices having no potential barriers, and specially adapted for rectifying, amplifying, oscillating or switching
- H10N70/011—Manufacture or treatment of multistable switching devices
- H10N70/061—Shaping switching materials
- H10N70/066—Shaping switching materials by filling of openings, e.g. damascene method
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10N70/00—Solid-state devices having no potential barriers, and specially adapted for rectifying, amplifying, oscillating or switching
- H10N70/20—Multistable switching devices, e.g. memristors
- H10N70/24—Multistable switching devices, e.g. memristors based on migration or redistribution of ionic species, e.g. anions, vacancies
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10N70/00—Solid-state devices having no potential barriers, and specially adapted for rectifying, amplifying, oscillating or switching
- H10N70/801—Constructional details of multistable switching devices
- H10N70/821—Device geometry
- H10N70/826—Device geometry adapted for essentially vertical current flow, e.g. sandwich or pillar type devices
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10N70/00—Solid-state devices having no potential barriers, and specially adapted for rectifying, amplifying, oscillating or switching
- H10N70/801—Constructional details of multistable switching devices
- H10N70/881—Switching materials
- H10N70/883—Oxides or nitrides
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10N70/00—Solid-state devices having no potential barriers, and specially adapted for rectifying, amplifying, oscillating or switching
- H10N70/801—Constructional details of multistable switching devices
- H10N70/881—Switching materials
- H10N70/883—Oxides or nitrides
- H10N70/8833—Binary metal oxides, e.g. TaOx
Definitions
- the present invention relates to a resistance change element and a manufacturing method thereof.
- This application claims priority based on Japanese Patent Application No. 2008-099565 filed in Japan on April 7, 2008, the contents of which are incorporated herein by reference.
- non-volatile memories such as flash memory and SONOS memory are the mainstream in the market.
- a technique is used in which the threshold voltage of the semiconductor transistor is changed by charges stored in an insulating film disposed above the channel portion.
- miniaturization of transistors is indispensable.
- the charge holding ability is reduced due to an increase in leakage current. Therefore, it is difficult to increase the capacity of the charge storage transistor type nonvolatile memory.
- a transistor has only a switching function for selecting a memory cell to be read and written, and a memory element is separated in the same manner as a DRAM, and each of the transistors is miniaturized to increase the capacity.
- a resistance change element using an electronic element in which an electric resistance value can be switched to two or more values by some electrical stimulation has been developed.
- a capacitance capacitance
- the electric resistance often has a finite value even if it is miniaturized.
- Such a resistance change element is used for a switch that switches between a set (on) state and a reset (off) state.
- the resistance change element is applied to a wiring configuration switching device (selector) in an LSI.
- the memory device utilizes the fact that the crystal phase (amorphous or crystal) is switched by passing a pulse current through the chalcogenide semiconductor, and the electric resistance of each crystal phase has a difference of 2 to 3 digits.
- This storage device is generally called a phase change memory.
- MIM type metal / metal oxide / metal
- Non-Patent Document 1 reports a resistance change element using nickel oxide (NiO).
- FIG. 1 is a schematic diagram showing a cross section of a conventional MIM variable resistance element.
- the variable resistance element includes a lower electrode 300, a variable resistance material layer 200 formed on the lower electrode 300, and an upper electrode 100 formed on the variable resistance material layer 200.
- the current-voltage characteristics of this MIM type resistance change element are shown in FIGS. 2A and 2B.
- This variable resistance element maintains the characteristics of a high resistance off state or a low resistance on state in a nonvolatile manner even when the power is turned off. And a resistance state is switched by applying a predetermined voltage and electric current stimulus as needed.
- FIGS. 2A and 2B show examples of current-voltage characteristics in the on state and the off state.
- a set voltage of Vt2 When a set voltage of Vt2 is applied to a high-resistance off-state element as indicated by a dotted line in FIGS. 2A and 2B, it changes to a low-resistance on-state as indicated by an arrow D1 in FIG. Electrical characteristics as shown by the solid lines in 2A and 2B are shown.
- a reset voltage of Vt1 is applied to the on-state element as indicated by the solid line in FIGS. 2A and 2B, the element changes to a high-resistance off-state as indicated by an arrow D2 in FIG. 2A.
- the dotted line electrical characteristics of 2A and 2B Returning to the dotted line electrical characteristics of 2A and 2B.
- the electrical characteristics of the dotted line and the solid line in FIGS. 2A and 2B can be repeatedly switched. This characteristic can be used as a nonvolatile memory cell for switching circuits or a nonvolatile switch. As indicated by the characteristics of the region R1 in FIG. 2B, a large current is required for resetting. Further, as indicated by the characteristics of the region R2 in FIG. 2B, when the reset current is lowered, the on-resistance is increased.
- the volume change accompanying the change of the crystal phase is generally large, and a heating of several hundreds of degrees Celsius is required locally for a short time of several tens of nsec for the crystal phase change. For this reason, when using it as a memory element or a switch element, there exists a subject that the temperature control of a phase change material is difficult.
- the MIM resistance change element does not need to be heated to a high temperature of several hundred degrees Celsius. Therefore, in recent years, attention has been paid again, and a resistance change type memory device using an oxide of a transition metal such as Cu, Ti, Ni, Cu, and Mo as a resistance change material has been proposed. In these transition metal oxides, a current path 400 called a filament is formed in the transition metal oxide as shown in FIG. It has been reported that the resistance change occurs when the current path 400 and the upper electrode 100 and the lower electrode 300 are joined or separated.
- Patent Document 1 and Non-Patent Document 2 propose resistance change type memory devices using nickel oxide as a metal oxide layer.
- a current path 400 called a filament as shown in FIG. 3 is formed in nickel oxide.
- the resistance of the variable resistance element is changed according to the joining state of the current path 400 and the upper electrode 100 and the lower electrode 300.
- the MIM type resistance change element needs to form in order to shift from the initial OFF state to the ON state.
- This forming voltage can be lowered if the thickness of the variable resistance material is reduced.
- the leakage current in the off state increases, and there arises a problem that a high current ratio between the on state and the off state that is necessary for the switch element cannot be secured.
- there is a trade-off relationship between lowering the forming voltage and securing a high current ratio between the on state and the off state and it has been difficult to realize both requirements.
- transition metal oxides tend to contain oxygen vacancies and metal vacancies. These cause a leakage current path. That is, if there are many oxygen vacancies or metal vacancies in the film, new defects are generated in the variable resistance material due to leakage current when the element is operated repeatedly. Furthermore, the leakage current increases and the resistance in the off state is reduced. As a result, the resistance ratio in the on / off state of the element decreases and the element characteristics vary, and the reliability of the element deteriorates.
- the MIM type resistance change element it is possible to further increase the current ratio between the on state and the off state by advancing fineness.
- the filament forming the on-state current path has a very small diameter. Therefore, the current value in the on state hardly depends on the element area.
- the resistance value in the off state depends on the area of the element. That is, as the device is further miniaturized, the on-state resistance value is substantially constant, but the off-state resistance value increases in inverse proportion to the element area. As a result, the resistance ratio between the on state and the off state increases.
- miniaturization of the MIM type resistance change element is advanced, there is a problem that the yield of the MIM type resistance change element having the switch operation characteristic is deteriorated. This is because the influence of variations in the crystal grain size, composition, etc. of the resistance change material becomes noticeable by miniaturization.
- Solid State Electronics Solid State Electronics Vol. 7, p. 785-797, 1964 Applied Physics Letters, Vol. 88, p. 202102, 2006
- the present invention has been made to solve the above-mentioned problems, and realizes long-term reliability while realizing low voltage forming, and a resistance change element capable of suppressing variation of elements in a fine element and its manufacture It aims to provide a method.
- variable resistance element is mainly composed of a lower electrode formed on a semiconductor or insulator substrate and a transition metal oxide formed on the lower electrode.
- a variable resistance material layer and an upper electrode formed on the variable resistance material layer, and the variable resistance material layer contains nickel vacancies so that the oxygen concentration is higher than the stoichiometric composition. It is an oxide and has a laminated structure with different composition ratios.
- variable resistance material layer includes a first layer in contact with the lower electrode, and a second layer formed on the first layer and in contact with the upper electrode.
- the oxygen concentration of the second layer may be higher than the oxygen concentration of the first layer.
- variable resistance material layer includes a second layer in contact with the lower electrode, and a first layer formed on the second layer and in contact with the upper electrode.
- the oxygen concentration of the second layer may be higher than the oxygen concentration of the first layer.
- the variable resistance material layer includes a first layer in contact with the lower electrode, a second layer formed in contact with the first layer, A third layer formed on the second layer and in contact with the upper electrode, wherein the first layer and the third layer have the same oxygen concentration, and the second layer has an oxygen concentration of the first layer and the first layer. It may be higher than the oxygen concentration of the three layers.
- the variable resistance material has a three-layer structure, and the oxygen concentration of the nickel oxide near the electrode is lowered, that is, the atomic density is made close to the stoichiometric composition.
- variable resistance element when the composition ratio of the variable resistance material layer is represented by Ni X O 1-X (0 ⁇ X ⁇ 1), The composition ratio may be in the range of 0.45 ⁇ X ⁇ 0.49, and the composition ratio of the second layer may be in the range of 0.40 ⁇ X ⁇ 0.47.
- variable resistance element when the composition ratio of the variable resistance material layer is represented by Ni X O 1-X (0 ⁇ X ⁇ 1), the composition ratio of the third layer may be in the range of 0.45 ⁇ X ⁇ 0.49, and the composition ratio of the second layer may be in the range of 0.40 ⁇ X ⁇ 0.47.
- a method of manufacturing a resistance change element includes a first step of forming a lower electrode on a semiconductor or insulator substrate, a transition metal oxide as a main component, and a nickel deficiency. Then, a second step of forming a variable resistance material layer of a nickel oxide having a higher oxygen concentration than the stoichiometric composition and having a laminated structure having a different composition ratio on the lower electrode, and the variable resistance material Forming a top electrode on the layer.
- the resistance change material layer made of nickel oxide is sufficiently turned off even if the forming voltage is reduced by reducing the thickness of the nickel oxide compared to the case where the composition is uniform in the depth direction.
- the leakage current in the state can be suppressed, and a high current ratio between the on state and the off state can be realized. Furthermore, variation in switch characteristics can be suppressed even if the element is miniaturized.
- Embodiments of the present invention relate to a variable resistance nonvolatile memory device having a metal / resistance variable material / metal structure in which a variable resistance material layer is sandwiched between metal electrodes.
- the phenomenon that the resistance value of the variable resistance material changes is based on oxygen deficiency or metal deficiency contained in the transition metal oxide that is the variable resistance material.
- oxygen or metal is diffused or deposited by an electric field applied to the transition metal oxide. As a result, a current path (filament) is formed in the transition oxide film.
- variable resistance material layer 2 which is a transition metal oxide thin film including oxygen vacancies and metal vacancies 5 uniformly is formed in the film.
- an electric field is applied to the resistance change material layer 2 via the upper electrode 1 and the lower electrode 3.
- oxygen and metal are diffused and deposited in the resistance change material layer 2 through the oxygen deficiency and the metal deficiency 5.
- a current path (filament) 4 capable of electron conduction and hole conduction is formed between the upper electrode 1 and the lower electrode 3.
- Patent Document 1 and Non-Patent Document 2 propose resistance change memory devices using nickel oxide as the metal oxide layer.
- Nickel oxides generally form NiO with a composition ratio of Ni and O of 1: 1 in stoichiometric composition. However, when Ni deficiency occurs, the composition ratio of O is slightly higher than Ni.
- the filament formed in the nickel oxide is a deposit of Ni deficiency, and a current path is formed by hole conduction.
- 5A and 5B are graphs showing the NiO film composition dependence of the on-state resistance and the off-state resistance of the switch element in which the NiO film is applied to the MIM resistance change element, and the forming voltage (set voltage). As shown in FIG. 5B, the more Ni vacancies, that is, the higher the oxygen composition ratio, the more the NiO film can be shifted to the on state at a lower set voltage.
- the resistance change of the NiO film does not occur.
- a voltage is continuously applied to such a NiO film for the setting operation, dielectric breakdown occurs.
- voltage a1 indicates a voltage at which dielectric breakdown occurs.
- the resistance ratio in the on / off state increases as the Ni deficiency decreases, that is, as the oxygen composition ratio decreases. If there are too many Ni vacancies in the NiO film, that is, if the oxygen composition ratio becomes too high, the off-state leakage current increases and the state becomes low resistance.
- the composition dependence of the NiO film on the switch characteristics can be explained by a model as shown in FIGS. 6A to 6C. That is, as shown in FIG. 6A, the more the metal deficiency 5 that is Ni deficiency, that is, the higher the oxygen composition ratio, the easier the filament is formed. Therefore, the NiO film can be shifted to the on state with a low set voltage. However, if there are many metal defects 5, the leakage current 6 increases through these defects, and the resistance value in the off state decreases. This makes it impossible to obtain a sufficient on / off resistance ratio.
- the element b1 is an element that has a large leakage current 6 and does not operate OFF.
- An element b2 is an element that does not perform the ON operation.
- An element b3 is an element that performs a switch operation.
- FIGS. 7A and 7B are schematic cross-sectional views showing the basic element structure of the semiconductor memory device according to this embodiment.
- the present embodiment relates to a MIM resistance variable nonvolatile semiconductor memory device having a metal / resistance variable material / metal structure with a metal oxide sandwiched between electrodes.
- This nonvolatile semiconductor memory device includes a lower electrode 3 formed on a semiconductor or insulator substrate, or an interlayer insulating film of LSI wiring, and a resistance change material mainly composed of nickel oxide formed on the lower electrode 3
- the upper electrode 1 formed on the layer 11 and the resistance change material layer 11 is included.
- the composition of nickel oxide used as the resistance change material layer 11 has a higher oxygen concentration than the stoichiometric composition.
- the variable resistance material layer 11 made of nickel oxide has a laminated structure with different composition ratios. As shown in FIG. 7A, the variable resistance material layer 11 made of nickel oxide has a two-layer structure, and is formed on the first layer 8 in contact with the lower electrode 3, and in contact with the upper electrode 1. It consists of a second layer 9.
- variable resistance material layer 11 made of nickel oxide has a two-layer structure, and includes a second layer 9 in contact with the lower electrode 3 and a first layer 8 formed on the second layer 9 and in contact with the upper electrode 1.
- the oxygen concentration of the second layer 9 is higher than the oxygen concentration of the first layer 8.
- the composition of the nickel oxide is such that when the composition ratio is represented by Ni X O 1-X (0 ⁇ X ⁇ 1), the resistance change material layer 11 made of nickel oxide has a two-layer structure.
- composition ratio of the first layer 8 is set in the range of 0.45 ⁇ X ⁇ 0.49
- composition ratio of the second layer 9 is set in the range of 0.40 ⁇ X ⁇ 0.47. More preferably, the composition ratio of the first layer 8 is set in a range of 0.48 ⁇ X ⁇ 0.49, and the composition ratio of the second layer 9 is set in a range of 0.450 ⁇ X ⁇ 0.475.
- variable resistance material layer 11 made of nickel oxide has a three-layer structure, the first layer 8 in contact with the lower electrode 3, the second layer 9 formed in contact with the first layer 8, and the second layer 9.
- the third layer 10 may be formed on the upper electrode 1 and in contact with the upper electrode 1.
- the oxygen concentration of the first layer 8 and the third layer 10 is equal.
- variable resistance material layer 11 made of a NiO film has a three-layer structure, and the third layer 10 and the first layer 8 near the upper electrode 1 and the lower electrode 3 are close to the stoichiometric composition.
- the atomic density can be increased, and damage during electrode formation and reliability deterioration of the MIM resistance change element due to diffusion of electrode metal into the NiO film can be suppressed.
- the composition ratio of the resistance change material layer 11 made of nickel oxide is expressed by Ni X O 1-X (0 ⁇ X ⁇ 1)
- the composition ratio of the first layer 8 and the third layer 10 is 0.45. ⁇ X ⁇ 0.49
- the composition ratio of the second layer 9 is set to 0.40 ⁇ X ⁇ 0.47. More preferably, the composition ratio of the first layer 8 and the third layer 10 is in the range of 0.48 ⁇ X ⁇ 0.49, and the composition ratio of the second layer 9 is in the range of 0.450 ⁇ X ⁇ 0.475.
- the relationship between the composition ratio of nickel oxide and the atomic density is uniquely determined regardless of a film formation method such as CVD or PVD or an annealing process after film formation (PDA).
- a film formation method such as CVD or PVD or an annealing process after film formation (PDA).
- the atomic density of the nickel oxide decreases as the oxygen concentration increases. This is because Ni deficiency occurs in the nickel oxide having the stoichiometric composition. Therefore, when the resistance change material layer 11 made of nickel oxide has a two-layer structure and the composition ratio is expressed by Ni X O 1-X (0 ⁇ X ⁇ 1), the atomic density is expressed as follows: It is preferable to set.
- the composition ratio of the first layer 8 is in the range of 0.45 ⁇ X ⁇ 0.49 and the composition ratio of the second layer 9 is set in the range of 0.40 ⁇ X ⁇ 0.47
- the atomic density of the first layer 8 is preferably set in the range of 5.2 to 6.9 g / cm 3
- the atomic density of the second layer 9 is preferably set in the range of 4.2 to 6.3 g / cm 3 .
- the composition ratio of the first layer 8 is set in a range of 0.48 ⁇ X ⁇ 0.49 and the composition ratio of the second layer 9 is set in a range of 0.450 ⁇ X ⁇ 0.475
- the atomic density of the first layer 8 is preferably in the range of 6.1 to 6.9 g / cm 3
- the atomic density of the second layer 9 is preferably set in the range of 5.2 to 6.5 g / cm 3 .
- the variable resistance material layer 11 made of nickel oxide has a three-layer structure, and includes a first layer 8 in contact with the lower electrode 3, a second layer 9 formed in contact with the first layer 8, and a second layer 9.
- the composition ratio of the variable resistance material layer 11 formed of the third layer 10 formed on the layer 9 and in contact with the upper electrode 1 and made of nickel oxide is represented by Ni X O 1-X (0 ⁇ X ⁇ 1).
- the atomic density of the first layer 8 and the third layer 10 is set in the range of 5.2 to 6.9 g / cm 3
- the atomic density of the second layer 9 is 4.2 to 6.3 g / cm 3. It is preferable to set a range of 3 . More preferably, the composition ratio of the first layer 8 and the third layer 10 is in the range of 0.48 ⁇ X ⁇ 0.49, and the composition ratio of the second layer 9 is in the range of 0.450 ⁇ X ⁇ 0.475.
- the atomic density of the first layer 8 and the third layer 10 is in the range of 6.1 to 6.9 g / cm 3
- the atomic density of the second layer 9 is 5.2 to 6.5 g / cm 3. The range is 3 .
- FIG. 9A metal defects 5 are distributed in the central portion of the NiO film.
- the variable resistance material layer 2 has a three-layer structure, the oxygen concentration of the central layer is high, and the region in contact with the upper electrode 1 and the lower electrode 3 has a structure close to the stoichiometric composition, the following effects can be obtained. . That is, the NiO layer close to the stoichiometric composition in the vicinity of the upper electrode 1 and the lower electrode 3 is sufficient compared to the case where the metal defects 5 are uniformly distributed in the variable resistance material layer 2 as shown in FIG. 6A. In addition, the leakage current in the ON state can be suppressed, and the resistance value in the OFF state can be increased.
- an on / off state resistance ratio can be obtained.
- a filament for the switch operation can be formed by the metal defect 5 locally distributed in the central portion of the variable resistance material layer 2. Therefore, it is possible to shift the MIM variable resistance element to the on state even with a low forming voltage.
- FIG. 9C since the metal defects 5 are locally distributed in the depth direction of the resistance change material layer 2, even if the element is miniaturized, the Ni defect concentration of the resistance change material layer 2 It is difficult for the variation to occur. For this reason, variation in switch characteristics can be suppressed. Further, the NiO layer near the upper electrode 1 and the lower electrode 3 is close to the stoichiometric composition, and the atomic density is high. Therefore, it is possible to suppress damage during electrode formation and deterioration in reliability of the MIM resistance change element due to diffusion of electrode metal into the NiO film.
- each layer of nickel oxide constituting the variable resistance material layer 2 is optimized to the forming voltage set according to the use of the switch element and the resistance ratio between the on state and the off state. It adjusts by the combination with the composition ratio.
- the film thickness of the entire resistance change material layer 2 is preferably set in the range of 200 nm to 5 nm. More preferably, the thickness is set to 100 nm or less from the viewpoint of processing of the element shape and 5 nm or more from the viewpoint of film uniformity. More preferably, it is set to 60 nm or less from the viewpoint of uniform embedding in a fine hole, and 10 nm or more from the viewpoint of reliability.
- the upper electrode 1 and the lower electrode 3 may be formed of different electrode materials, but preferably the upper electrode 1 and the lower electrode 3 are formed of the same material.
- the upper electrode 1 and the lower electrode 3 are preferably made of a metal selected from the group consisting of Pt, Ir, Ru, Ti, TaW, and Cu, an oxide thereof, or a nitride thereof. More preferably, the upper electrode 1 and the lower electrode 3 are formed using a metal selected from the group consisting of Ru, RuO 2 , Ti, TiN, Ta, TaN, W, WN, and Cu, a metal oxide, and a nitride. .
- the upper electrode 1 and the lower electrode 3 are formed of a material selected from the group consisting of Ta, TaN, and Cu. These materials are materials used in the wiring process in the LSI manufacturing process. By using these materials, it is possible to significantly reduce the manufacturing cost for adding the semiconductor memory element according to the present embodiment to an LSI.
- Cu is used as a material for the upper electrode 1, the lower electrode 3, and the resetting electrode.
- Cu for the upper electrode 2 and the lower electrode 3 it is possible to make the LSI wiring function as an electrode of the MIM resistance change element. Further, it is possible to simultaneously improve the performance of the MIM variable resistance element and reduce the manufacturing cost by reducing the resistivity of the electrode.
- Example 1 As Example 1 of the present invention, the structure of a basic MIM variable resistance element is shown in FIG. 12F.
- 12A to 12F are cross-sectional views showing the manufacturing process of the MIM resistance change element according to this example.
- 12A to 12F show a manufacturing process for forming an MIM resistance change element in a wiring layer of an LSI composed of CMOS transistors.
- a lower wiring 16 and a lower via wiring 14 connected to the lower wiring 16 are formed by using a CMP (Chemical Mechanical Polishing) technique and an electrolytic plating technique.
- the lower wiring 16 and the lower via wiring 14 are made of Cu.
- the interlayer insulating film 12 is a silicon oxide film formed by a CVD technique.
- a wiring protective film 13 and a wiring interlayer protective film 15 are formed at these interfaces.
- Silicon carbon nitride (SiCN) is used for the wiring protective film 13.
- a laminated film of tantalum (Ta) and tantalum nitride (TaN) is used for the wiring interlayer protective film 15.
- the upper electrode 1 and the lower electrode 3 may be formed of different electrode materials, but preferably the upper electrode 1 and the lower electrode 3 are formed of the same material.
- the electrodes of the upper electrode 1 and the lower electrode 3 are preferably a metal selected from the group consisting of Pt, Ir, Ru, Ti, TaW and Cu, or an oxide thereof, or a nitride thereof.
- Ru is used for both the upper electrode 1 and the lower electrode 3 for ease of processing.
- Ru for forming the upper electrode 1 and the lower electrode 3 can be formed by sputtering.
- a NiO film having a laminated structure with a controlled composition is used as the variable resistance material layer 11.
- the Ni oxide can be switched even if it is polycrystalline or non-crystalline.
- the Ni oxide is preferably amorphous.
- the stacked structure of the NiO film may be a two-layer structure, but is preferably a three-layer structure.
- the oxygen concentration of the first layer 8 and the third layer 10 is set to be equal, and the oxygen concentration of the second layer 9 is set to be higher than the oxygen concentration of the first layer 8 and the third layer 10.
- the composition ratio of the resistance change material layer 11 made of nickel oxide is represented by Ni X O 1-X (0 ⁇ X ⁇ 1)
- the composition ratio of the first layer 8 and the third layer 10 is preferably The range is 0.45 ⁇ X ⁇ 0.49, and the composition ratio of the second layer 9 is set in the range of 0.40 ⁇ X ⁇ 0.47. More preferably, the composition ratio of the first layer 8 and the third layer 10 is in the range of 0.48 ⁇ X ⁇ 0.49, and the composition ratio of the second layer 9 is in the range of 0.450 ⁇ X ⁇ 0.475.
- the relationship between the composition ratio of nickel oxide and the atomic density is uniquely determined regardless of a film formation method such as CVD or PVD or an annealing process after film formation (PDA).
- the atomic density of the nickel oxide decreases as the oxygen concentration increases. This is because Ni deficiency occurs in the nickel oxide having the stoichiometric composition. Therefore, the variable resistance material layer 11 made of nickel oxide has a three-layer structure, and includes a first layer 8 in contact with the lower electrode 3, a second layer 9 formed in contact with the first layer 8, and a second layer
- the atomic density is set as follows.
- the composition ratio of the resistance change material layer 11 made of nickel oxide is expressed by Ni X O 1-X (0 ⁇ X ⁇ 1)
- the composition ratio of the first layer 8 and the third layer 10 is 0. .45 ⁇ X ⁇ 0.49 and the composition ratio of the second layer 9 is set in the range of 0.40 ⁇ X ⁇ 0.47
- the atomic density of the first layer 8 and the third layer 10 Is set in the range of 5.2 to 6.9 g / cm 3
- the atomic density of the second layer 9 is set in the range of 4.2 to 6.3 g / cm 3 .
- the composition ratio of the first layer 8 and the third layer 10 is in the range of 0.48 ⁇ X ⁇ 0.49, and the composition ratio of the second layer 9 is 0.450 ⁇ X ⁇ 0.475.
- the atomic density of the first layer 8 is set in the range of 6.1 to 6.9 g / cm 3
- the atomic density of the second layer is set to 5.2 to 6.5 g / cm 3 . Range.
- each layer of nickel oxide constituting the variable resistance material layer 11 is optimized so as to be optimal for the forming voltage set according to the application of the switch element and the resistance ratio between the on state and the off state. It adjusts by the combination with the composition ratio.
- the film thickness of the entire variable resistance material layer 11 is set in the range of 200 nm to 5 nm.
- the thickness is set to 100 nm or less from the viewpoint of processing of the element shape and 5 nm or more from the viewpoint of film uniformity. More preferably, it is set to 60 nm or less from the viewpoint of uniform embedding in a fine hole, and 10 nm or more from the viewpoint of reliability.
- Nickel oxide can be formed by PVD or CVD. As shown in FIG. 11, the composition can be controlled by the film formation temperature and the annealing process (PDA) after film formation. In addition, it is preferable to form by a CVD (Chemical Vapor Deposition) method from a viewpoint of the uniform filling property to a fine hole.
- a NiO film can be formed by adjusting the flow rate of a raw material gas containing Ni metal by a mass flow controller and supplying the raw material gas together with an oxidizing gas onto a silicon substrate heated to a predetermined temperature via a shower head.
- the source gas containing Ni metal it is preferable to use bismethyl, cyclopentadienyl, nickel ((Ni (CH 3 C 5 H 4 ) 2 : (MeCp) 2 Ni)), which is an organometallic gas (MeCp). 2 ) Ni source gas is easily decomposed at a relatively low temperature with respect to molecular oxidizing gas, and the amount of carbon contained in the deposited NiO film is extremely small.
- the carrier gas is N 2
- the oxidizing gas is O 2
- the silicon substrate is heated by a heater through a susceptor, and the substrate temperature is 200 ° C. to 500 ° C. When the substrate temperature is 200 ° C.
- the decomposition of the source gas does not proceed, the film formation rate becomes slow, and the uniformity of the NiO film in the wafer surface is poor. To. Therefore, a problem in terms of throughput and yield may occur in mass production.
- the substrate temperature during film formation it is necessary to set the substrate temperature during film formation to 500 ° C. or lower. Furthermore, the NiO film by the (MeCp) 2 Ni source gas can be controlled in film density and composition by the substrate temperature.
- FIG. 11 is a graph showing the relationship between the film formation temperature and the composition ratio.
- the higher the film formation temperature the higher the density of the NiO film, which approaches the theoretical value of NiO crystals.
- a NiO film having a desired composition can be formed by changing the film formation temperature.
- the film forming pressure is set in the range of 0.001 Torr to 100 Torr.
- the film forming pressure is set in the range of 0.1 Torr to 10 Torr. More preferably, the film forming pressure is set in the range of 1.5 Torr to 2.5 Torr.
- the upper electrode 1 made of Ru, the variable resistance material layer 11 made of NiO film, and the lower electrode 3 made of Ru are processed into a predetermined shape by using a dry etching technique.
- a part of the upper electrode 1 is removed by selective etching with the NiO film to expose a part of the NiO film surface.
- the selective etching can be either dry etching or wet etching, but wet etching is preferable from the viewpoint of avoiding damage to the NiO film.
- a protective film 17 for protecting the side surface of the MIM variable resistance element is formed.
- the protective film 17 also functions as an adhesion layer for preventing the upper electrode 1 and the interlayer insulating film 12 from peeling off.
- the protective film 17 is an insulating film, and is made of a material that is excellent in adhesion with the upper electrode 1, the lower electrode 3, the variable resistance material layer 11, and the interlayer insulating film 12 of the MIM resistance change element and is stable.
- a silicon nitride film (SiN) can be used as the protective film 17.
- a contact hole is opened in the upper electrode 1, and an upper via wiring 18 is formed by using a CMP (Chemical Mechanical Polishing) technique and an electrolytic plating technique.
- CMP Chemical Mechanical Polishing
- FIG. 13G shows a structure in which a contact hole is opened in the interlayer insulating film of the LSI wiring and the MIM resistance change element is embedded in the contact hole.
- 13A to 13G are cross-sectional views showing the manufacturing process of the MIM resistance change element according to this example.
- 13A to 13G show a manufacturing process for forming an MIM resistance change element in an LSI wiring layer made of CMOS transistors.
- a lower wiring 16 and a lower via wiring 14 connected to the lower wiring 16 are formed by using a CMP (Chemical Mechanical Polishing) technique and an electrolytic plating technique.
- the lower electrode 3 of the MIM resistance change element is formed on the lower via wiring 14. Since these previous manufacturing steps are the same as those in the first embodiment, description thereof is omitted.
- the lower electrode 3 is processed into a predetermined shape by a dry etching technique.
- the lower electrode 3 may be made of a material different from that of the upper electrode 1 formed in a later step, but preferably, the upper electrode 1 and the lower electrode 3 are made of the same material.
- the upper electrode 1 and the lower electrode 2 are preferably made of a metal selected from the group consisting of Pt, Ir, Ru, Ti, TaW, and Cu, an oxide thereof, or a nitride thereof.
- the lower electrode 3 and the upper electrode 1 formed in a later process are both formed of Ru for ease of processing. Ru for forming the upper electrode 1 and the lower electrode 3 can be formed by sputtering.
- a protective film 17 for protecting the surface of the lower electrode 3 is formed. Thereafter, an interlayer insulating film 12 is formed.
- the protective film 17 also functions as an adhesion layer for preventing peeling between the lower Ru electrode 3 and the interlayer insulating film 12.
- the protective film 17 is an insulating film.
- a material having excellent and stable adhesion to the lower electrode 3 of the MIM type resistance change element and the resistance change material formed in a later process is used.
- a silicon nitride film (SiN) can be used as the material of the protective film 17.
- the interlayer insulating film 12 and the protective film 17 in a predetermined region are removed by using a dry etching technique, and a contact hole is formed on the lower electrode 3. This contact hole is formed so as to contact only the surface of the lower electrode 3 and not to contact other wiring portions.
- the resistance change material layer 11 and the upper electrode 1 are formed.
- the resistance change material layer 11 is made of a NiO film having a laminated structure with a controlled composition.
- the Ni oxide can be switched even if it is polycrystalline or non-crystalline. However, from the viewpoint of film uniformity, the Ni oxide is preferably amorphous.
- the stacked structure of the NiO film may be a two-layer structure, but is preferably a three-layer structure.
- the oxygen concentration of the first layer 8 and the third layer 10 is set equal, and the oxygen concentration of the second layer 9 is set higher than the oxygen concentration of the first layer 8 and the third layer 10.
- the composition ratio of the resistance change material made of nickel oxide is represented by Ni X O 1-X (0 ⁇ X ⁇ 1)
- the composition ratio of the first layer 8 and the third layer 10 is preferably 0 .45 ⁇ X ⁇ 0.49 and the composition ratio of the second layer 9 is set in the range of 0.40 ⁇ X ⁇ 0.47.
- the composition ratio of the first layer 8 and the third layer 10 is in the range of 0.48 ⁇ X ⁇ 0.49, and the composition ratio of the second layer 9 is in the range of 0.450 ⁇ X ⁇ 0.475.
- the upper electrode 1 and the variable resistance material layer 11 made of a NiO film are processed into a predetermined shape by using a dry etching technique.
- a protective film 17 that protects the side surfaces of the MIM variable resistance element is formed.
- the interlayer insulating film 12 is formed on the protective film 17.
- the protective film 17 also functions as an adhesion layer for preventing peeling between the upper electrode 1 and the interlayer insulating film 12.
- the protective film 17 is an insulating film.
- a material having excellent and stable adhesion with the upper electrode 1, the lower electrode 3, the resistance change material layer 11, and the interlayer insulating film 12 of the MIM type resistance change element is used.
- a silicon nitride film (SiN) can be used as the material of the protective film 17.
- a contact hole is opened in the upper electrode 1, and an upper via wiring 18 is formed by using a CMP (Chemical Mechanical Polishing) technique and an electrolytic plating technique.
- CMP Chemical Mechanical Polishing
- electrolytic plating technique an electrolytic plating technique.
- Example 3 As Example 3 of the present invention, a contact hole is opened in an interlayer insulating film of an LSI wiring, an MIM resistance change element is embedded in the contact hole, and an upper electrode and a lower electrode of the MIM resistance change element are shared with the LSI wiring.
- the structure is shown in FIG. 14A to 14I are cross-sectional views showing the manufacturing process of the MIM resistance change element according to this example.
- FIG. 14A to FIG. 14I show a manufacturing process for forming an MIM resistance change element in a wiring layer of an LSI composed of CMOS transistors.
- the lower wiring 19 is formed using a CMP (Chemical Mechanical Polishing) technique and an electrolytic plating technique. Since this manufacturing process is common to the first embodiment, the description thereof is omitted.
- the lower wiring 19 is a lower electrode wiring that also functions as the lower electrode of the MIM resistance change element.
- the material of the lower electrode 19 in the MIM type resistance change element of the present embodiment is Cu.
- the interlayer insulating film 12 and the protective film 13 in a predetermined region are removed by using a dry etching technique. Then, a contact hole is formed on the lower electrode 19. This contact hole is formed so as to contact only the surface of the lower electrode 19 and not to contact other wiring portions.
- an interface layer 20 is formed in order to protect the interlayer insulating film 12 and improve the adhesion to the resistance change material layer 11.
- the interface layer 20 is an insulating film.
- a material having excellent and stable adhesion between the interlayer insulating film 12 and the variable resistance material layer 11 is used.
- a metal oxide film, metal nitride, or silicon nitride film (SiN) that does not have resistance change characteristics can be used.
- the interface layer 20 is left only on the side wall of the contact hole by using a dry etching technique.
- the resistance change material layer 11 and the upper electrode 21 are formed.
- the resistance change material layer 11 is made of a NiO film having a laminated structure with a controlled composition.
- the Ni oxide can be switched even if it is polycrystalline or amorphous, but is preferably amorphous from the viewpoint of film uniformity.
- the stacked structure of the NiO film may be a two-layer structure, but is preferably a three-layer structure.
- the first layer 8 in contact with the lower electrode 19, the second layer 9 formed in contact with the first layer 8, and the second layer 9 formed on the second layer 9 and in contact with the upper electrode 21. It consists of three layers 10.
- the oxygen concentration of the first layer 8 and the third layer 10 is set equal, and the oxygen concentration of the second layer 9 is set higher than the oxygen concentration of the first layer 8 and the third layer 10.
- the composition ratio of the resistance change material layer 11 made of nickel oxide is represented by Ni X O 1-X (0 ⁇ X ⁇ 1)
- the composition ratio of the first layer 8 and the third layer 10 is preferably 0.45 ⁇ X ⁇ 0.49
- the composition ratio of the second layer 9 is set in a range of 0.40 ⁇ X ⁇ 0.47.
- the composition ratio of the first layer 8 and the third layer 10 is in the range of 0.48 ⁇ X ⁇ 0.49, and the composition ratio of the second layer 9 is 0.450 ⁇ X ⁇ 0.475. Set to the range. Since the manufacturing process of the NiO film is the same as that in the first embodiment, the description thereof is omitted.
- the upper electrode 21 is common to the via wiring.
- the upper electrode 21 is Cu and is formed using an electrolytic plating technique.
- CMP the phosphorus-added NiO film, which is an excessive variable resistance material, and the upper electrode 21 are polished and planarized.
- the wiring protective film 13 and the interlayer insulating film 12 are formed on the upper electrode 21.
- a groove of the wiring pattern is formed by an etching process.
- an upper wiring is formed using a CMP technique and an electrolytic plating technique.
- FIG. 15 shows a schematic diagram in which the MIM resistance change element of this embodiment and a MOS transistor are combined.
- a via wiring 28 is formed on the source diffusion layer region 22 of the MOS transistor.
- a wiring 27 is formed on the via wiring 28.
- a via wiring 28 is further formed on the wiring 27.
- a wiring 27 is further formed on the via wiring 28.
- a lower via wiring 14 is formed on the drain diffusion layer region 23 of the MOS transistor.
- the lower electrode 19, the interface layer 20, the first layer 8, the second layer 9, the third layer 10, and the upper electrode 21 are formed on the lower via wiring 14.
- an upper wiring 25 of the MIM type resistance change element is formed on the upper electrode 21, an upper wiring 25 of the MIM type resistance change element is formed.
- a gate insulating film 26 of a MOS transistor is formed on the region between the source diffusion layer region 22 and the drain diffusion layer region 23. On the gate insulating film 26, the gate electrode 24 of the MOS transistor is formed.
- the MIM resistance change element according to the present example is connected to the drain diffusion layer region of the MOS transistor via a Cu wiring.
- the present invention can be applied to a resistance change element capable of realizing long-term reliability while suppressing the voltage reduction of forming and suppressing variation of elements in a fine element, a manufacturing method thereof, and the like.
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Abstract
Description
本願は、2008年4月7日に、日本に出願された特願2008-099565号に基づき優先権を主張し、その内容をここに援用する。
図1は、従来技術であるMIM型抵抗変化素子の断面を示す模式図である。この抵抗変化素子は、下部電極300と、その下部電極300の上に形成された抵抗変化材料層200と、その抵抗変化材料層200の上に形成された上部電極100とを備えている。
このMIM型の抵抗変化素子の電流電圧特性を、図2A及び図2Bに示す。この抵抗変化素子は、電源を切っても高抵抗なオフ状態または低抵抗なオン状態の特性を不揮発的に維持する。そして、必要に応じて所定の電圧・電流刺激を印加することにより、抵抗状態を切り替える。
図2A及び図2Bに、オン状態およびオフ状態の電流電圧特性の一例を示す。図2A及び図2Bの点線で示すような高抵抗なオフ状態の素子に対して、Vt2のセット電圧を印加すると、図2Aの矢印D1で示すように、低抵抗なオン状態に変化し、図2A及び図2Bの実線で示すような電気特性を示す。次に、図2A及び図2Bの実線で示すようなオン状態の素子に対して、Vt1のリセット電圧を印加すると、図2Aの矢印D2で示すように、高抵抗なオフ状態に変化し、図2A及び図2Bの点線の電気特性に戻る。
図2A及び図2Bの点線と実線の電気特性を、繰り返し切り替えることが可能である。この特性を回路切り替え用の不揮発性メモリセルあるいは不揮発性スイッチとして利用することができる。
図2Bの領域R1の部分の特性が示すように、リセットには大電流が必要となる。また、図2Bの領域R2の部分の特性が示すように、リセット電流を下げると、オン抵抗が高くなってしまう。
本態様では、抵抗変化材料を3層構造とし、電極付近のニッケル酸化物の酸素濃度を低くし、すなわち、化学量論組成に近く原子密度化する。これにより、電極形成時のダメージや、電極金属のニッケル酸化物への拡散によるMIM型抵抗変化素子の信頼性劣化を抑えることができる。
電界を印加し、電流が流れることで、金属の析出によって形成された電流経路4の再酸化や、金属欠損5によって形成された電流経路4が、再度金属で埋まることにより電流経路4が切断される。このような現象の繰り返しで遷移金属酸化物の抵抗変化が生じる。例えば、特許文献1および非特許文献2では、金属酸化物層として、ニッケル酸化物を用いた、抵抗変化型の記憶装置が提案されている。ニッケル酸化物は、一般にNiとOの組成比が、化学量論組成で1:1のNiOを形成する。しかし、Ni欠損が生じると、僅かにOの組成比がNiよりも高くなる。ニッケル酸化物中に形成されるフィラメントは、Ni欠損が析出したものであり、ホール伝導による電流経路が形成される。
また、図5Aに示すように、オン/オフ状態の抵抗比は、Ni欠損が少ないほど、すなわち、酸素の組成比が低いほど高くなる。NiO膜中のNi欠損が多すぎると、すなわち、酸素の組成比が高くなりすぎると、オフ状態のリーク電流が増加し、低抵抗な状態になる。そして、十分なオン/オフ状態の抵抗比が得られず、スイッチとして動作しなくなってしまう。このように、フォーミングの低電圧化と、オン状態とオフ状態の高い電流比の確保はトレードオフの関係にあり、両方の要求を実現することは困難であった。
ニッケル酸化物の組成は、その組成比がNiXO1-X(0<X<1)で表されるとき、ニッケル酸化物からなる抵抗変化材料層11が2層構造の場合、第1層8の組成比が0.45<X<0.49の範囲であり、第2層9の組成比が0.40<X<0.47の範囲に設定される。
さらに好ましくは、第1層8の組成比が0.48<X<0.49の範囲であり、第2層9の組成比が0.450<X<0.475の範囲に設定される。
第1層8と第3層10の酸素濃度は等しい。第2層9の酸素濃度は、第1層8と第3層10の酸素濃度より高い。つまり、図8の右図に示すように、第2層9のNi/(Ni+O)の組成比は、第1層8と第3層10の組成比(=0.5)より低い。
ニッケル酸化物からなる抵抗変化材料層11の組成比が、NiXO1-X(0<X<1)で表されるとき、第1層8および第3層10の組成比が0.45<X<0.49の範囲であり、第2層9の組成比が0.40<X<0.47の範囲に設定される。さらに好ましくは、第1層8および第3層10の組成比が0.48<X<0.49の範囲であり、第2層9の組成比が0.450<X<0.475の範囲に設定される。
より好ましくは、第1層8の組成比が0.48<X<0.49の範囲で、第2層9の組成比が0.450<X<0.475の範囲に設定される場合、第1層8の原子密度が6.1~6.9g/cm3の範囲で、第2層9の原子密度は5.2~6.5g/cm3の範囲に設定することが好ましい。
より好ましくは、第1層8および第3層10の組成比が0.48<X<0.49の範囲であり、第2層9の組成比が0.450<X<0.475の範囲に設定される場合、第1層8および第3層10の原子密度が6.1~6.9g/cm3の範囲で、第2層9の原子密度は5.2~6.5g/cm3の範囲とする。
さらに、図9Cに示すように、抵抗変化材料層2の深さ方向に対して、局所的に金属欠損5が分布しているので、素子を微細化しても抵抗変化材料層2のNi欠損濃度のバラツキが生じにくい。このため、スイッチ特性のバラツキを抑制できる。また、上部電極1および下部電極3付近のNiO層が化学量論組成に近く、原子密度が高い。そのため、電極形成時のダメージや、電極金属のNiO膜中への拡散によるMIM型抵抗変化素子の信頼性劣化を抑えることができる。
本発明の実施例1として、基本的なMIM型抵抗変化素子の構造を図12Fに示す。図12A~図12Fは、本実施例に関わるMIM型抵抗変化素子の製造工程を示す断面図である。図12A~図12Fは、CMOSトランジスタからなるLSIの配線層に、MIM型抵抗変化素子を形成する製造工程を示している。
ニッケル酸化物からなる抵抗変化材料層11の組成比が、NiXO1-X(0<X<1)で表されるとき、好ましくは、第1層8および第3層10の組成比が0.45<X<0.49の範囲であり、第2層9の組成比が0.40<X<0.47の範囲に設定する。
さらに好ましくは、第1層8および第3層10の組成比が0.48<X<0.49の範囲であり、第2層9の組成比が0.450<X<0.475の範囲に設定する。
より好ましくは、第1層8および第3層10の組成比が、0.48<X<0.49の範囲であり、第2層9の組成比が、0.450<X<0.475の範囲に設定される場合、第1層8の原子密度を、6.1~6.9g/cm3の範囲とし、第2層の原子密度を、5.2~6.5g/cm3の範囲とする。
一方、配線層の耐熱性の観点から、成膜時における基板温度は500℃以下に設定する必要がある。さらに、(MeCp)2Ni原料ガスによるNiO膜は基板温度によって膜密度と組成の制御が可能である。
次に、図12Cに示すように、上部電極1の一部を、NiO膜との選択エッチングにより除去し、NiO膜表面の一部を露出させる。選択エッチングは、ドライエッチングでもウェットエッチングでも可能であるが、NiO膜へのダメージ回避の観点からウェットエッチングが好ましい。
次に、図12Eに示すように、上部電極1にコンタクト穴を開口し、CMP(Chemical Mechanical Polishing)技術と電解メッキ技術を用いて、上部ビア配線18を形成する。
本発明の実施例2として、LSI配線の層間絶縁膜にコンタクトホールを開口し、MIM型抵抗変化素子をコンタクトホールに埋め込む構造を図13Gに示す。図13A~図13Gは、本実施例に関わるMIM型抵抗変化素子の製造工程を示した断面図である。図13A~図13Gは、CMOSトランジスタからなるLSIの配線層にMIM型抵抗変化素子を形成する製造工程を示す。
まず、図13Aに示すように、下部配線16と、それに接続される下部ビア配線14を、CMP(Chemical Mechanical Polishing)技術と電解メッキ技術を用いて形成する。そして、下部ビア配線14の上に、MIM型抵抗変化素子の下部電極3を形成する。これらの前段階の製造工程は、実施例1と共通であるので、その説明を省略する。
次に、図13Eに示すように、抵抗変化材料層11、上部電極1を形成する。
さらに好ましくは、第1層8および第3層10の組成比が0.48<X<0.49の範囲であり、第2層9の組成比が0.450<X<0.475の範囲に設定する。NiO膜の製造工程は実施例1と共通であるので、その説明を省略する。
次に、図13Gに示すように、MIM型抵抗変化素子の側面を保護する保護膜17を形成する。そして、保護膜17の上に層間絶縁膜12を形成する。この保護膜17は、上部電極1と層間絶縁膜12との剥がれ防止のための密着層としても機能する。保護膜17は絶縁膜である。保護膜17の材料としては、MIM型抵抗変化素子の上部電極1、下部電極3、抵抗変化材料層11、層間絶縁膜12との密着性に優れ、安定であるものを用いる。例えば、保護膜17の材料として、シリコン窒化膜(SiN)を用いることができる。
本発明の実施例3として、LSI配線の層間絶縁膜にコンタクトホールを開口し、MIM型抵抗変化素子をコンタクトホールに埋め込み、MIM型抵抗変化素子の上部電極及び下部電極をLSI配線と共通化する構造を、図14Iに示す。図14A~図14Iは、本実施例に関わるMIM型抵抗変化素子の製造工程を示した断面図である。図14A~図14Iは、CMOSトランジスタからなるLSIの配線層に、MIM型抵抗変化素子を形成する製造工程を示す。
本実施例では、下部配線19は、MIM型抵抗変化素子の下部電極としても機能する下部電極配線である。本実施例のMIM型抵抗変化素子における下部電極19の材料は、Cuである。
次に、図14Eに示すように、抵抗変化材料層11、上部電極21を形成する。
さらに好ましくは、第1層8および第3層10の組成比が、0.48<X<0.49の範囲であり、第2層9の組成比が、0.450<X<0.475の範囲に設定する。NiO膜の製造工程は、実施例1と共通であるので、その説明を省略する。
次に、CMPを用いることにより、余剰な抵抗変化材料であるリン添加したNiO膜と、上部電極21とを研磨し、平坦化する。
次に、上部電極21上に配線保護膜13、層間絶縁膜12を形成する。そして、配線パターンの溝をエッチング工程で形成する。そして、CMP技術と電解メッキ技術とを用いて、上部配線を形成する。本実施例のような工程を適用することで、MIM型抵抗変化素子を、配線層のビア配線へ組み込むことが可能である。MIM型抵抗変化素子の電極を配線と共通化することで、電極材料の抵抗低減によるスイッチ特性を向上させ、工程コストを低減させ、MIM型抵抗変化素子の高集積化を実現させることが可能である。
図15では、MOS型トランジスタのソース拡散層領域22上に、ビア配線28が形成されている。そして、ビア配線28上に、配線27が形成されている。そして、配線27上に、さらにビア配線28が形成されている。このビア配線28の上には、さらに配線27が形成されている。
また、ソース拡散層領域22とドレイン拡散層領域23の間の領域上には、MOS型トランジスタのゲート絶縁膜26が形成されている。そして、ゲート絶縁膜26上には、MOS型トランジスタのゲート電極24が形成されている。
図15では、本実施例によるMIM型抵抗変化素子をMOS型トランジスタのドレイン拡散層領域とCu配線を介して接続している。これにより、高集積化が容易であり、不揮発性を有するランダムアクセスメモリーセルを実現可能である。
2・・・抵抗変化材料層、
3・・・下部電極、
4・・・電流経路、
5・・・金属欠損、
6・・・リーク電流、
7・・・電流、
8・・・第1層、
9・・・第2層、
10・・・第3層、
11・・・抵抗変化材料層、
12・・・層間絶縁膜、
13・・・保護膜、
14・・・下部ビア配線、
15・・・保護膜、
16・・・下部配線、
17・・・保護膜、
18・・・上部ビア配線、
19・・・下部電極、
20・・・界面層、
21・・・上部電極、
22・・・ソース拡散層領域、
23・・・ドレイン拡散層領域、
24・・・ゲート電極、
25・・・上部配線、
26・・・ゲート絶縁膜、
27・・・配線、
28・・・ビア配線
Claims (7)
- 半導体あるいは絶縁体基板上に形成した下部電極と、
前記下部電極上に形成された遷移金属酸化物を主成分とする抵抗変化材料層と、
前記抵抗変化材料層の上に形成される上部電極とを備え、
前記抵抗変化材料層は、ニッケル欠損を含有することで、化学量論組成より酸素濃度が高いニッケル酸化物であり、組成比の異なる積層構造である抵抗変化素子。 - 前記抵抗変化材料層は、
前記下部電極と接する第1層と、
前記第1層上に形成され、前記上部電極と接する第2層とからなり、
前記第2層の酸素濃度が前記第1層の酸素濃度より高い請求項1に記載の抵抗変化素子。 - 前記抵抗変化材料層は、
前記下部電極と接する第2層と、
前記第2層上に形成され、前記上部電極と接する第1層とからなり、
前記第2層の酸素濃度が前記第1層の酸素濃度より高い請求項1に記載の抵抗変化素子。 - 前記抵抗変化材料層は、
前記下部電極と接する第1層と、
前記第1層上に接して形成された第2層と、
前記第2層上に形成され、前記上部電極に接する第3層とからなり、
前記第1層と前記第3層の酸素濃度が等しく、前記第2層の酸素濃度が前記第1層と前記第3層の酸素濃度より高い請求項1に記載の抵抗変化素子。 - 前記抵抗変化材料層の組成比が、NiXO1-X(0<X<1)で表されるとき、
前記第1層の組成比が0.45<X<0.49の範囲であり、
前記第2層の組成比が0.40<X<0.47の範囲である請求項2または請求項3に記載の抵抗変化素子。 - 前記抵抗変化材料層の組成比が、NiXO1-X(0<X<1)で表されるとき、
前記第1層および前記第3層の組成比が0.45<X<0.49の範囲であり、
前記第2層の組成比が0.40<X<0.47の範囲である請求項4に記載の抵抗変化素子。 - 半導体あるいは絶縁体基板上に下部電極を形成する第1のステップと、
遷移金属酸化物を主成分とし、ニッケル欠損を含有することで、化学量論組成より酸素濃度が高いニッケル酸化物であり、組成比の異なる積層構造である抵抗変化材料層を、前記下部電極上に形成する第2のステップと、
前記抵抗変化材料層の上に上部電極を形成する第3のステップと、
を有する抵抗変化素子の製造方法。
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Also Published As
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JP5488458B2 (ja) | 2014-05-14 |
US8373149B2 (en) | 2013-02-12 |
JPWO2009125777A1 (ja) | 2011-08-04 |
US20110001110A1 (en) | 2011-01-06 |
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