WO2008084681A1 - メモリ制御装置、メモリ装置およびメモリ制御方法 - Google Patents
メモリ制御装置、メモリ装置およびメモリ制御方法 Download PDFInfo
- Publication number
- WO2008084681A1 WO2008084681A1 PCT/JP2007/074878 JP2007074878W WO2008084681A1 WO 2008084681 A1 WO2008084681 A1 WO 2008084681A1 JP 2007074878 W JP2007074878 W JP 2007074878W WO 2008084681 A1 WO2008084681 A1 WO 2008084681A1
- Authority
- WO
- WIPO (PCT)
- Prior art keywords
- memory
- memory devices
- memory control
- physical addresses
- access commands
- Prior art date
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F12/00—Accessing, addressing or allocating within memory systems or architectures
- G06F12/02—Addressing or allocation; Relocation
- G06F12/06—Addressing a physical block of locations, e.g. base addressing, module addressing, memory dedication
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F13/14—Handling requests for interconnection or transfer
- G06F13/16—Handling requests for interconnection or transfer for access to memory bus
- G06F13/1668—Details of memory controller
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F12/00—Accessing, addressing or allocating within memory systems or architectures
- G06F12/02—Addressing or allocation; Relocation
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06T—IMAGE DATA PROCESSING OR GENERATION, IN GENERAL
- G06T1/00—General purpose image data processing
- G06T1/20—Processor architectures; Processor configuration, e.g. pipelining
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06T—IMAGE DATA PROCESSING OR GENERATION, IN GENERAL
- G06T1/00—General purpose image data processing
- G06T1/60—Memory management
Landscapes
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- Dram (AREA)
- Memory System (AREA)
- Image Input (AREA)
Abstract
Priority Applications (5)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2008553058A JP4996626B2 (ja) | 2006-12-25 | 2007-12-25 | メモリ制御装置、およびメモリ制御方法 |
EP07860107A EP2071468A4 (en) | 2006-12-25 | 2007-12-25 | MEMORY CONTROL DEVICE, MEMORY DEVICE, AND MEMORY CONTROL METHOD |
CN2007800283117A CN101495975B (zh) | 2006-12-25 | 2007-12-25 | 存储控制装置、存储装置及存储控制方法 |
US12/443,598 US8307190B2 (en) | 2006-12-25 | 2007-12-25 | Memory control device, memory device, and memory control method |
US13/615,983 US8738888B2 (en) | 2006-12-25 | 2012-09-14 | Memory control device, memory device, and memory control method |
Applications Claiming Priority (4)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2006-347132 | 2006-12-25 | ||
JP2006347132 | 2006-12-25 | ||
JP2007-123987 | 2007-05-08 | ||
JP2007123987 | 2007-05-08 |
Related Child Applications (2)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
US12/443,598 A-371-Of-International US8307190B2 (en) | 2006-12-25 | 2007-12-25 | Memory control device, memory device, and memory control method |
US13/615,983 Division US8738888B2 (en) | 2006-12-25 | 2012-09-14 | Memory control device, memory device, and memory control method |
Publications (1)
Publication Number | Publication Date |
---|---|
WO2008084681A1 true WO2008084681A1 (ja) | 2008-07-17 |
Family
ID=39608577
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
PCT/JP2007/074878 WO2008084681A1 (ja) | 2006-12-25 | 2007-12-25 | メモリ制御装置、メモリ装置およびメモリ制御方法 |
Country Status (6)
Country | Link |
---|---|
US (2) | US8307190B2 (ja) |
EP (1) | EP2071468A4 (ja) |
JP (1) | JP4996626B2 (ja) |
KR (1) | KR20090065504A (ja) |
CN (1) | CN101495975B (ja) |
WO (1) | WO2008084681A1 (ja) |
Cited By (10)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN101930413A (zh) * | 2009-06-22 | 2010-12-29 | 奥林巴斯映像株式会社 | 数据传输控制装置和数据传输控制方法 |
CN101930414A (zh) * | 2009-06-22 | 2010-12-29 | 奥林巴斯映像株式会社 | 数据存取控制装置及数据存取控制方法 |
JP2011013909A (ja) * | 2009-07-01 | 2011-01-20 | Canon Inc | メモリ制御回路 |
WO2012070247A1 (ja) * | 2010-11-26 | 2012-05-31 | パナソニック株式会社 | メモリ装置、メモリ制御回路およびメモリ制御システム |
JP2013503397A (ja) * | 2009-08-26 | 2013-01-31 | クアルコム,インコーポレイテッド | デュアルチャネル動作中にアドレス/コントロール信号をインターリーブすることによるシングルチャネルとデュアルチャネルのハイブリッドddrインターフェース方式 |
JP2013505616A (ja) * | 2009-09-17 | 2013-02-14 | インターナショナル・ビジネス・マシーンズ・コーポレーション | エラー検出に応答するためのシステム及び方法 |
JP2014160538A (ja) * | 2004-11-29 | 2014-09-04 | Rambus Inc | マイクロスレッドメモリ |
JP2018517205A (ja) * | 2015-04-23 | 2018-06-28 | 華為技術有限公司Huawei Technologies Co.,Ltd. | 拡張メモリにアクセスするための方法、デバイス及びシステム |
JP2020042558A (ja) * | 2018-09-11 | 2020-03-19 | 株式会社東芝 | 画像描画装置 |
WO2020223849A1 (en) * | 2019-05-05 | 2020-11-12 | Yangtze Memory Technologies Co., Ltd. | Memory control system with a sequence processing unit |
Families Citing this family (32)
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KR20100117554A (ko) * | 2007-11-20 | 2010-11-03 | 샌드브리지 테크놀로지스, 인코포레이티드 | 단일 기준을 이용하여 주기적 동작을 구현하는 방법 |
JPWO2009139109A1 (ja) * | 2008-05-13 | 2011-09-15 | パナソニック株式会社 | メモリ制御装置、およびこれを備えた情報処理装置 |
US8660193B2 (en) * | 2009-01-12 | 2014-02-25 | Maxim Integrated Products, Inc. | Parallel, pipelined, integrated-circuit implementation of a computational engine |
WO2010101754A2 (en) * | 2009-03-06 | 2010-09-10 | Rambus Inc. | Memory interface with interleaved control information |
KR101854251B1 (ko) * | 2010-11-30 | 2018-05-03 | 삼성전자주식회사 | 멀티 채널 반도체 메모리 장치 및 그를 구비하는 반도체 장치 |
CN102231141B (zh) * | 2011-06-21 | 2017-04-05 | 深圳市中兴微电子技术有限公司 | 一种数据读、写方法及系统 |
US9268719B2 (en) * | 2011-08-05 | 2016-02-23 | Rambus Inc. | Memory signal buffers and modules supporting variable access granularity |
JP2013089030A (ja) * | 2011-10-18 | 2013-05-13 | Elpida Memory Inc | 情報処理システム、制御システム及び半導体装置 |
US10216625B2 (en) * | 2012-09-24 | 2019-02-26 | Sk Hynix Memory Solutions Inc. | Hardware integrity verification |
JP6062714B2 (ja) * | 2012-10-31 | 2017-01-18 | キヤノン株式会社 | メモリ制御装置、メモリ制御方法およびプログラム |
US9448941B1 (en) | 2012-12-31 | 2016-09-20 | Emc Corporation | System and method for cache management |
US9053815B2 (en) * | 2013-05-28 | 2015-06-09 | Nanya Technology Corporation | Circuit in dynamic random access memory devices |
KR102079939B1 (ko) * | 2013-06-04 | 2020-02-21 | 삼성전자주식회사 | 데이터 저장 장치 및 그것의 명령어 스케줄링 방법 |
KR102220749B1 (ko) * | 2014-03-14 | 2021-03-02 | 에스케이하이닉스 주식회사 | 반도체 장치 |
US9335934B2 (en) * | 2014-04-29 | 2016-05-10 | Futurewei Technologies, Inc. | Shared memory controller and method of using same |
US11755255B2 (en) * | 2014-10-28 | 2023-09-12 | SK Hynix Inc. | Memory device comprising a plurality of memories sharing a resistance for impedance matching |
US10067903B2 (en) | 2015-07-30 | 2018-09-04 | SK Hynix Inc. | Semiconductor device |
KR102358177B1 (ko) | 2015-12-24 | 2022-02-07 | 에스케이하이닉스 주식회사 | 제어회로 및 제어회로를 포함하는 메모리 장치 |
US10353747B2 (en) | 2015-07-13 | 2019-07-16 | Futurewei Technologies, Inc. | Shared memory controller and method of using same |
US9940984B1 (en) * | 2016-09-28 | 2018-04-10 | Intel Corporation | Shared command address (C/A) bus for multiple memory channels |
JP6370953B1 (ja) * | 2017-03-23 | 2018-08-08 | ファナック株式会社 | マルチランクsdram制御方法及びsdramコントローラ |
KR101801901B1 (ko) * | 2017-04-27 | 2017-11-27 | 공재섭 | 데이터 구역성을 고려하여 액세스되는 메모리 장치 및 이를 포함하는 전자 시스템 |
CN107146245B (zh) * | 2017-05-05 | 2020-06-05 | 天津京东深拓机器人科技有限公司 | 图像匹配方法和装置 |
CN108984312B (zh) * | 2017-06-02 | 2022-03-25 | 伊姆西Ip控股有限责任公司 | 数据读写的方法和设备 |
CN109347957A (zh) * | 2018-10-22 | 2019-02-15 | 北京广利核系统工程有限公司 | 基于fpga的通信数据存储管理方法、装置及环网板卡 |
US10929949B2 (en) * | 2019-03-28 | 2021-02-23 | Infineon Technologies Ag | Accessing a memory configured to store an image data cube |
JP2021039447A (ja) | 2019-08-30 | 2021-03-11 | キヤノン株式会社 | メモリコントローラおよびメモリコントローラで実施される方法 |
TWI762852B (zh) * | 2020-01-03 | 2022-05-01 | 瑞昱半導體股份有限公司 | 記憶體裝置及其操作方法 |
CN112802518B (zh) * | 2021-03-25 | 2021-07-02 | 深圳市汇顶科技股份有限公司 | 数据写入方法、片上系统芯片及计算机可读存储介质 |
EP4273702A1 (en) * | 2022-05-06 | 2023-11-08 | Samsung Electronics Co., Ltd. | Operating method of memory device for managing map data of each of plurality of storage devices, computing system including memory device, and operating method of computing system |
CN114896182B (zh) * | 2022-05-11 | 2023-10-20 | 地平线(上海)人工智能技术有限公司 | 存储装置、方法、电子设备和存储介质 |
CN116594922B (zh) * | 2023-07-14 | 2023-10-31 | 深圳砺驰半导体科技有限公司 | 一种数据访问电路、方法及系统级芯片 |
Citations (10)
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JPH04167160A (ja) * | 1990-10-31 | 1992-06-15 | Matsushita Electric Ind Co Ltd | 情報処理装置 |
WO1997024727A1 (en) * | 1995-12-29 | 1997-07-10 | Micron Technology, Inc. | Memory device with multiple internal banks and staggered command execution |
JPH09190376A (ja) | 1996-01-12 | 1997-07-22 | Oki Electric Ind Co Ltd | メモリ制御装置 |
JPH10105367A (ja) * | 1996-09-30 | 1998-04-24 | Toshiba Corp | 画像処理装置 |
JPH1198462A (ja) * | 1997-09-19 | 1999-04-09 | Hitachi Ltd | データ再生装置 |
JPH11203197A (ja) * | 1998-01-07 | 1999-07-30 | Oki Data Corp | メモリシステム |
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-
2007
- 2007-12-25 JP JP2008553058A patent/JP4996626B2/ja not_active Expired - Fee Related
- 2007-12-25 US US12/443,598 patent/US8307190B2/en active Active
- 2007-12-25 EP EP07860107A patent/EP2071468A4/en not_active Withdrawn
- 2007-12-25 CN CN2007800283117A patent/CN101495975B/zh not_active Expired - Fee Related
- 2007-12-25 WO PCT/JP2007/074878 patent/WO2008084681A1/ja active Application Filing
- 2007-12-25 KR KR1020097000182A patent/KR20090065504A/ko not_active Application Discontinuation
-
2012
- 2012-09-14 US US13/615,983 patent/US8738888B2/en not_active Expired - Fee Related
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JPH04167160A (ja) * | 1990-10-31 | 1992-06-15 | Matsushita Electric Ind Co Ltd | 情報処理装置 |
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Cited By (13)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2014160538A (ja) * | 2004-11-29 | 2014-09-04 | Rambus Inc | マイクロスレッドメモリ |
CN101930414A (zh) * | 2009-06-22 | 2010-12-29 | 奥林巴斯映像株式会社 | 数据存取控制装置及数据存取控制方法 |
CN101930413A (zh) * | 2009-06-22 | 2010-12-29 | 奥林巴斯映像株式会社 | 数据传输控制装置和数据传输控制方法 |
JP2011013909A (ja) * | 2009-07-01 | 2011-01-20 | Canon Inc | メモリ制御回路 |
JP2013503397A (ja) * | 2009-08-26 | 2013-01-31 | クアルコム,インコーポレイテッド | デュアルチャネル動作中にアドレス/コントロール信号をインターリーブすることによるシングルチャネルとデュアルチャネルのハイブリッドddrインターフェース方式 |
JP2013505616A (ja) * | 2009-09-17 | 2013-02-14 | インターナショナル・ビジネス・マシーンズ・コーポレーション | エラー検出に応答するためのシステム及び方法 |
WO2012070247A1 (ja) * | 2010-11-26 | 2012-05-31 | パナソニック株式会社 | メモリ装置、メモリ制御回路およびメモリ制御システム |
JP2018517205A (ja) * | 2015-04-23 | 2018-06-28 | 華為技術有限公司Huawei Technologies Co.,Ltd. | 拡張メモリにアクセスするための方法、デバイス及びシステム |
US10545672B2 (en) | 2015-04-23 | 2020-01-28 | Huawei Technologies Co., Ltd. | Method for accessing extended memory, device, and system |
US11237728B2 (en) | 2015-04-23 | 2022-02-01 | Huawei Technologies Co., Ltd. | Method for accessing extended memory, device, and system |
JP2020042558A (ja) * | 2018-09-11 | 2020-03-19 | 株式会社東芝 | 画像描画装置 |
JP7074626B2 (ja) | 2018-09-11 | 2022-05-24 | 株式会社東芝 | 画像描画装置 |
WO2020223849A1 (en) * | 2019-05-05 | 2020-11-12 | Yangtze Memory Technologies Co., Ltd. | Memory control system with a sequence processing unit |
Also Published As
Publication number | Publication date |
---|---|
CN101495975A (zh) | 2009-07-29 |
US8307190B2 (en) | 2012-11-06 |
JPWO2008084681A1 (ja) | 2010-04-30 |
CN101495975B (zh) | 2011-10-05 |
KR20090065504A (ko) | 2009-06-22 |
EP2071468A4 (en) | 2010-11-03 |
JP4996626B2 (ja) | 2012-08-08 |
US8738888B2 (en) | 2014-05-27 |
US20130013879A1 (en) | 2013-01-10 |
EP2071468A1 (en) | 2009-06-17 |
US20100030980A1 (en) | 2010-02-04 |
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