EP2071468A4 - Memory control device, memory device, and memory control method - Google Patents
Memory control device, memory device, and memory control methodInfo
- Publication number
- EP2071468A4 EP2071468A4 EP07860107A EP07860107A EP2071468A4 EP 2071468 A4 EP2071468 A4 EP 2071468A4 EP 07860107 A EP07860107 A EP 07860107A EP 07860107 A EP07860107 A EP 07860107A EP 2071468 A4 EP2071468 A4 EP 2071468A4
- Authority
- EP
- European Patent Office
- Prior art keywords
- memory
- memory control
- control method
- control device
- memory device
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Withdrawn
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F12/00—Accessing, addressing or allocating within memory systems or architectures
- G06F12/02—Addressing or allocation; Relocation
- G06F12/06—Addressing a physical block of locations, e.g. base addressing, module addressing, memory dedication
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F13/14—Handling requests for interconnection or transfer
- G06F13/16—Handling requests for interconnection or transfer for access to memory bus
- G06F13/1668—Details of memory controller
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F12/00—Accessing, addressing or allocating within memory systems or architectures
- G06F12/02—Addressing or allocation; Relocation
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06T—IMAGE DATA PROCESSING OR GENERATION, IN GENERAL
- G06T1/00—General purpose image data processing
- G06T1/20—Processor architectures; Processor configuration, e.g. pipelining
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06T—IMAGE DATA PROCESSING OR GENERATION, IN GENERAL
- G06T1/00—General purpose image data processing
- G06T1/60—Memory management
Landscapes
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- Dram (AREA)
- Image Input (AREA)
- Memory System (AREA)
Applications Claiming Priority (3)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2006347132 | 2006-12-25 | ||
JP2007123987 | 2007-05-08 | ||
PCT/JP2007/074878 WO2008084681A1 (en) | 2006-12-25 | 2007-12-25 | Memory control device, memory device, and memory control method |
Publications (2)
Publication Number | Publication Date |
---|---|
EP2071468A1 EP2071468A1 (en) | 2009-06-17 |
EP2071468A4 true EP2071468A4 (en) | 2010-11-03 |
Family
ID=39608577
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
EP07860107A Withdrawn EP2071468A4 (en) | 2006-12-25 | 2007-12-25 | Memory control device, memory device, and memory control method |
Country Status (6)
Country | Link |
---|---|
US (2) | US8307190B2 (en) |
EP (1) | EP2071468A4 (en) |
JP (1) | JP4996626B2 (en) |
KR (1) | KR20090065504A (en) |
CN (1) | CN101495975B (en) |
WO (1) | WO2008084681A1 (en) |
Families Citing this family (43)
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US8595459B2 (en) * | 2004-11-29 | 2013-11-26 | Rambus Inc. | Micro-threaded memory |
EP2212785A2 (en) * | 2007-11-20 | 2010-08-04 | Sandbridge Technologies, Inc. | Method for implementing periodic behaviors using a single reference |
JPWO2009139109A1 (en) * | 2008-05-13 | 2011-09-15 | パナソニック株式会社 | MEMORY CONTROL DEVICE AND INFORMATION PROCESSING DEVICE HAVING THE SAME |
US8660193B2 (en) * | 2009-01-12 | 2014-02-25 | Maxim Integrated Products, Inc. | Parallel, pipelined, integrated-circuit implementation of a computational engine |
US20110307672A1 (en) * | 2009-03-06 | 2011-12-15 | Rambus Inc. | Memory interface with interleaved control information |
JP5396169B2 (en) * | 2009-06-22 | 2014-01-22 | オリンパス株式会社 | Data access control device |
JP2011003161A (en) * | 2009-06-22 | 2011-01-06 | Olympus Imaging Corp | Data transmission control device and data transmission control method |
JP2011013909A (en) * | 2009-07-01 | 2011-01-20 | Canon Inc | Memory control circuit |
US8098539B2 (en) * | 2009-08-26 | 2012-01-17 | Qualcomm Incorporated | Hybrid single and dual channel DDR interface scheme by interleaving address/control signals during dual channel operation |
US8539309B2 (en) * | 2009-09-17 | 2013-09-17 | International Business Machines Corporation | System and method for responding to error detection |
JP2012113597A (en) * | 2010-11-26 | 2012-06-14 | Panasonic Corp | Memory device, memory control circuit, and memory control system |
KR101854251B1 (en) * | 2010-11-30 | 2018-05-03 | 삼성전자주식회사 | multi channel semiconductor memory device and semiconductor device having such memory device |
CN102231141B (en) * | 2011-06-21 | 2017-04-05 | 深圳市中兴微电子技术有限公司 | A kind of data read-write method and system |
US9268719B2 (en) * | 2011-08-05 | 2016-02-23 | Rambus Inc. | Memory signal buffers and modules supporting variable access granularity |
JP2013089030A (en) * | 2011-10-18 | 2013-05-13 | Elpida Memory Inc | Information processing system, control system, and semiconductor device |
US10216625B2 (en) * | 2012-09-24 | 2019-02-26 | Sk Hynix Memory Solutions Inc. | Hardware integrity verification |
JP6062714B2 (en) * | 2012-10-31 | 2017-01-18 | キヤノン株式会社 | MEMORY CONTROL DEVICE, MEMORY CONTROL METHOD, AND PROGRAM |
US9448941B1 (en) | 2012-12-31 | 2016-09-20 | Emc Corporation | System and method for cache management |
US9053815B2 (en) * | 2013-05-28 | 2015-06-09 | Nanya Technology Corporation | Circuit in dynamic random access memory devices |
KR102079939B1 (en) * | 2013-06-04 | 2020-02-21 | 삼성전자주식회사 | Data storage device and method of scheduling command thereof |
KR102220749B1 (en) * | 2014-03-14 | 2021-03-02 | 에스케이하이닉스 주식회사 | Semiconductor device |
US9335934B2 (en) | 2014-04-29 | 2016-05-10 | Futurewei Technologies, Inc. | Shared memory controller and method of using same |
US10067903B2 (en) | 2015-07-30 | 2018-09-04 | SK Hynix Inc. | Semiconductor device |
US11755255B2 (en) * | 2014-10-28 | 2023-09-12 | SK Hynix Inc. | Memory device comprising a plurality of memories sharing a resistance for impedance matching |
KR102358177B1 (en) | 2015-12-24 | 2022-02-07 | 에스케이하이닉스 주식회사 | Control circuit and memory device including the control circuit |
CN106155577B (en) * | 2015-04-23 | 2019-03-26 | 华为技术有限公司 | Access method, equipment and the system of exented memory |
US10353747B2 (en) | 2015-07-13 | 2019-07-16 | Futurewei Technologies, Inc. | Shared memory controller and method of using same |
US9940984B1 (en) * | 2016-09-28 | 2018-04-10 | Intel Corporation | Shared command address (C/A) bus for multiple memory channels |
JP6370953B1 (en) * | 2017-03-23 | 2018-08-08 | ファナック株式会社 | Multi-rank SDRAM control method and SDRAM controller |
KR101801901B1 (en) * | 2017-04-27 | 2017-11-27 | 공재섭 | Memory device accessed in consideration of data locality and electronic system including the same |
CN107146245B (en) * | 2017-05-05 | 2020-06-05 | 天津京东深拓机器人科技有限公司 | Image matching method and device |
CN114020482A (en) * | 2017-06-02 | 2022-02-08 | 伊姆西Ip控股有限责任公司 | Method and apparatus for data writing |
JP7074626B2 (en) * | 2018-09-11 | 2022-05-24 | 株式会社東芝 | Image drawing device |
CN109347957A (en) * | 2018-10-22 | 2019-02-15 | 北京广利核系统工程有限公司 | Communication data memory management method, device and looped network board based on FPGA |
US10929949B2 (en) * | 2019-03-28 | 2021-02-23 | Infineon Technologies Ag | Accessing a memory configured to store an image data cube |
CN112925728A (en) * | 2019-05-05 | 2021-06-08 | 长江存储科技有限责任公司 | Memory control system with sequential processing units |
JP2021039447A (en) * | 2019-08-30 | 2021-03-11 | キヤノン株式会社 | Memory controller and method implemented by memory controller |
TWI762852B (en) * | 2020-01-03 | 2022-05-01 | 瑞昱半導體股份有限公司 | Memory device and operation method of the same |
CN112802518B (en) * | 2021-03-25 | 2021-07-02 | 深圳市汇顶科技股份有限公司 | Data writing method, system-on-chip and computer readable storage medium |
CN113704143A (en) * | 2021-08-27 | 2021-11-26 | 湖南国科微电子股份有限公司 | Data reading method and device and computer equipment |
EP4273702A1 (en) * | 2022-05-06 | 2023-11-08 | Samsung Electronics Co., Ltd. | Operating method of memory device for managing map data of each of plurality of storage devices, computing system including memory device, and operating method of computing system |
CN114896182B (en) * | 2022-05-11 | 2023-10-20 | 地平线(上海)人工智能技术有限公司 | Storage device, method, electronic apparatus, and storage medium |
CN116594922B (en) * | 2023-07-14 | 2023-10-31 | 深圳砺驰半导体科技有限公司 | Data access circuit, method and system-level chip |
Citations (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
WO1997024727A1 (en) * | 1995-12-29 | 1997-07-10 | Micron Technology, Inc. | Memory device with multiple internal banks and staggered command execution |
US6005592A (en) * | 1996-09-30 | 1999-12-21 | Kabushiki Kaishatoshiba | Image processing apparatus having improved memory access for high speed 3-dimensional image processing |
EP1026595A1 (en) * | 1999-01-11 | 2000-08-09 | STMicroelectronics Limited | Memory interface device and method for accessing memories |
US6295596B1 (en) * | 1997-09-19 | 2001-09-25 | Hitachi, Ltd. | Data reproducing apparatus |
US20050015539A1 (en) * | 2002-01-09 | 2005-01-20 | Takashi Horii | Memory system and memory card |
Family Cites Families (23)
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US486603A (en) * | 1892-11-22 | Time-lock | ||
JPS618785A (en) | 1984-06-21 | 1986-01-16 | Fujitsu Ltd | Access control system for storage device |
US5182192A (en) * | 1987-03-27 | 1993-01-26 | The Wistar Institute | Monoclonal antibodies against glycolipid antigens, methods of producing these antibodies, and use therefor |
JPH04167160A (en) | 1990-10-31 | 1992-06-15 | Matsushita Electric Ind Co Ltd | Information processor |
JP3057934B2 (en) * | 1992-10-30 | 2000-07-04 | 日本電気株式会社 | Shared bus arbitration mechanism |
JPH09190376A (en) | 1996-01-12 | 1997-07-22 | Oki Electric Ind Co Ltd | Memory controller |
US6104417A (en) * | 1996-09-13 | 2000-08-15 | Silicon Graphics, Inc. | Unified memory computer architecture with dynamic graphics memory allocation |
JPH11203197A (en) | 1998-01-07 | 1999-07-30 | Oki Data Corp | Memory system |
US7024518B2 (en) * | 1998-02-13 | 2006-04-04 | Intel Corporation | Dual-port buffer-to-memory interface |
US6681319B1 (en) * | 1998-10-06 | 2004-01-20 | Texas Instruments Incorporated | Dual access instruction and compound memory access instruction with compatible address fields |
EP1200896A2 (en) * | 1999-06-28 | 2002-05-02 | Sangate Systems Inc. | Intelligent splitter, system, and methods of use |
JP2001092771A (en) | 1999-09-24 | 2001-04-06 | Toshiba Corp | Storage device, controller for storage device and storage system using them |
JP4834362B2 (en) | 2005-09-16 | 2011-12-14 | パナソニック株式会社 | Memory controller. |
US6828977B2 (en) | 2001-02-15 | 2004-12-07 | Sony Corporation | Dynamic buffer pages |
US7313658B2 (en) * | 2001-10-23 | 2007-12-25 | Via Technologies, Inc. | Microprocessor and method for utilizing disparity between bus clock and core clock frequencies to prioritize cache line fill bus access requests |
JP2003178527A (en) * | 2001-12-12 | 2003-06-27 | Fujitsu Ltd | Information recording apparatus, buffer controller, and information storage method |
WO2003067445A1 (en) | 2002-02-06 | 2003-08-14 | Koninklijke Philips Electronics N.V. | Address space, bus system, memory controller and device system |
CN100454225C (en) * | 2003-03-17 | 2009-01-21 | 皇家飞利浦电子股份有限公司 | An apparatus for and a method of storing a real time stream of digital information signals |
US7203798B2 (en) * | 2003-03-20 | 2007-04-10 | Matsushita Electric Industrial Co., Ltd. | Data memory cache unit and data memory cache system |
JP4345445B2 (en) | 2003-11-12 | 2009-10-14 | セイコーエプソン株式会社 | Image processing apparatus, image display apparatus, and calculation parameter setting method in image processing apparatus |
WO2005109205A1 (en) | 2004-04-15 | 2005-11-17 | Matsushita Electric Industrial Co., Ltd. | Burst memory access method to rectangular area |
US7849382B2 (en) | 2004-05-19 | 2010-12-07 | Panasonic Corporation | Memory control circuit, nonvolatile storage apparatus, and memory control method |
JP2006293663A (en) * | 2005-04-11 | 2006-10-26 | Sanyo Electric Co Ltd | Device for generating memory address and processor with same, and method of generating memory address |
-
2007
- 2007-12-25 JP JP2008553058A patent/JP4996626B2/en not_active Expired - Fee Related
- 2007-12-25 CN CN2007800283117A patent/CN101495975B/en not_active Expired - Fee Related
- 2007-12-25 US US12/443,598 patent/US8307190B2/en active Active
- 2007-12-25 EP EP07860107A patent/EP2071468A4/en not_active Withdrawn
- 2007-12-25 WO PCT/JP2007/074878 patent/WO2008084681A1/en active Application Filing
- 2007-12-25 KR KR1020097000182A patent/KR20090065504A/en not_active Application Discontinuation
-
2012
- 2012-09-14 US US13/615,983 patent/US8738888B2/en not_active Expired - Fee Related
Patent Citations (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
WO1997024727A1 (en) * | 1995-12-29 | 1997-07-10 | Micron Technology, Inc. | Memory device with multiple internal banks and staggered command execution |
US6005592A (en) * | 1996-09-30 | 1999-12-21 | Kabushiki Kaishatoshiba | Image processing apparatus having improved memory access for high speed 3-dimensional image processing |
US6295596B1 (en) * | 1997-09-19 | 2001-09-25 | Hitachi, Ltd. | Data reproducing apparatus |
EP1026595A1 (en) * | 1999-01-11 | 2000-08-09 | STMicroelectronics Limited | Memory interface device and method for accessing memories |
US20050015539A1 (en) * | 2002-01-09 | 2005-01-20 | Takashi Horii | Memory system and memory card |
Non-Patent Citations (2)
Title |
---|
RAU, SCHLANSKER, YEN: "The Cydra-5 stride insensitive memory system", 30 October 2002 (2002-10-30), pages 1 - 25, XP002599648, Retrieved from the Internet <URL:http://citeseerx.ist.psu.edu/viewdoc/download;jsessionid=F86F43ED5792AEE2FEF50A2481D7C79F?doi=10.1.1.13.1535&rep=rep1&type=pdf> [retrieved on 20100907] * |
See also references of WO2008084681A1 * |
Also Published As
Publication number | Publication date |
---|---|
EP2071468A1 (en) | 2009-06-17 |
KR20090065504A (en) | 2009-06-22 |
CN101495975A (en) | 2009-07-29 |
US8738888B2 (en) | 2014-05-27 |
US20130013879A1 (en) | 2013-01-10 |
CN101495975B (en) | 2011-10-05 |
US8307190B2 (en) | 2012-11-06 |
US20100030980A1 (en) | 2010-02-04 |
WO2008084681A1 (en) | 2008-07-17 |
JPWO2008084681A1 (en) | 2010-04-30 |
JP4996626B2 (en) | 2012-08-08 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
PUAI | Public reference made under article 153(3) epc to a published international application that has entered the european phase |
Free format text: ORIGINAL CODE: 0009012 |
|
17P | Request for examination filed |
Effective date: 20090324 |
|
AK | Designated contracting states |
Kind code of ref document: A1 Designated state(s): AT BE BG CH CY CZ DE DK EE ES FI FR GB GR HU IE IS IT LI LT LU LV MC MT NL PL PT RO SE SI SK TR |
|
AX | Request for extension of the european patent |
Extension state: AL BA HR MK RS |
|
DAX | Request for extension of the european patent (deleted) | ||
RBV | Designated contracting states (corrected) |
Designated state(s): DE FR GB |
|
A4 | Supplementary search report drawn up and despatched |
Effective date: 20101001 |
|
STAA | Information on the status of an ep patent application or granted ep patent |
Free format text: STATUS: THE APPLICATION HAS BEEN WITHDRAWN |
|
18W | Application withdrawn |
Effective date: 20110912 |