WO2006126525A1 - Cu-Mo基板およびその製造方法 - Google Patents
Cu-Mo基板およびその製造方法 Download PDFInfo
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- WO2006126525A1 WO2006126525A1 PCT/JP2006/310223 JP2006310223W WO2006126525A1 WO 2006126525 A1 WO2006126525 A1 WO 2006126525A1 JP 2006310223 W JP2006310223 W JP 2006310223W WO 2006126525 A1 WO2006126525 A1 WO 2006126525A1
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- Prior art keywords
- substrate
- alloy layer
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- based alloy
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- 239000000758 substrate Substances 0.000 title claims abstract description 248
- 238000004519 manufacturing process Methods 0.000 title claims description 27
- 239000000956 alloy Substances 0.000 claims abstract description 221
- 229910045601 alloy Inorganic materials 0.000 claims abstract description 220
- 229910020888 Sn-Cu Inorganic materials 0.000 claims abstract description 210
- 229910019204 Sn—Cu Inorganic materials 0.000 claims abstract description 210
- 239000000463 material Substances 0.000 claims abstract description 164
- 238000007747 plating Methods 0.000 claims description 102
- 239000004065 semiconductor Substances 0.000 claims description 34
- 238000002844 melting Methods 0.000 claims description 24
- 230000008018 melting Effects 0.000 claims description 24
- 230000017525 heat dissipation Effects 0.000 claims description 17
- 238000005304 joining Methods 0.000 claims description 7
- 239000010949 copper Substances 0.000 description 97
- 238000000034 method Methods 0.000 description 78
- 238000005219 brazing Methods 0.000 description 75
- 238000010438 heat treatment Methods 0.000 description 24
- 239000000919 ceramic Substances 0.000 description 18
- 229910017318 Mo—Ni Inorganic materials 0.000 description 12
- 239000010408 film Substances 0.000 description 10
- 239000011888 foil Substances 0.000 description 10
- 229910052751 metal Inorganic materials 0.000 description 10
- 239000002184 metal Substances 0.000 description 10
- 238000007772 electroless plating Methods 0.000 description 9
- 230000008569 process Effects 0.000 description 7
- 229910000679 solder Inorganic materials 0.000 description 7
- 230000000052 comparative effect Effects 0.000 description 6
- 230000015572 biosynthetic process Effects 0.000 description 5
- 238000002474 experimental method Methods 0.000 description 5
- 229910017944 Ag—Cu Inorganic materials 0.000 description 4
- LFQSCWFLJHTTHZ-UHFFFAOYSA-N Ethanol Chemical compound CCO LFQSCWFLJHTTHZ-UHFFFAOYSA-N 0.000 description 4
- 229910020816 Sn Pb Inorganic materials 0.000 description 4
- 229910020922 Sn-Pb Inorganic materials 0.000 description 4
- 229910008783 Sn—Pb Inorganic materials 0.000 description 4
- QAOWNCQODCNURD-UHFFFAOYSA-N Sulfuric acid Chemical compound OS(O)(=O)=O QAOWNCQODCNURD-UHFFFAOYSA-N 0.000 description 4
- 230000003197 catalytic effect Effects 0.000 description 4
- 238000009713 electroplating Methods 0.000 description 4
- 238000005530 etching Methods 0.000 description 4
- 239000000203 mixture Substances 0.000 description 4
- 229910052750 molybdenum Inorganic materials 0.000 description 4
- 230000009471 action Effects 0.000 description 3
- 239000012298 atmosphere Substances 0.000 description 3
- 239000003054 catalyst Substances 0.000 description 3
- 238000005253 cladding Methods 0.000 description 3
- 229910052802 copper Inorganic materials 0.000 description 3
- 238000005238 degreasing Methods 0.000 description 3
- 238000009792 diffusion process Methods 0.000 description 3
- 238000009826 distribution Methods 0.000 description 3
- 230000000694 effects Effects 0.000 description 3
- 229910052739 hydrogen Inorganic materials 0.000 description 3
- 239000001257 hydrogen Substances 0.000 description 3
- 229910052718 tin Inorganic materials 0.000 description 3
- KWSLGOVYXMQPPX-UHFFFAOYSA-N 5-[3-(trifluoromethyl)phenyl]-2h-tetrazole Chemical compound FC(F)(F)C1=CC=CC(C2=NNN=N2)=C1 KWSLGOVYXMQPPX-UHFFFAOYSA-N 0.000 description 2
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 description 2
- 229910000881 Cu alloy Inorganic materials 0.000 description 2
- UFHFLCQGNIYNRP-UHFFFAOYSA-N Hydrogen Chemical compound [H][H] UFHFLCQGNIYNRP-UHFFFAOYSA-N 0.000 description 2
- MHAJPDPJQMAIIY-UHFFFAOYSA-N Hydrogen peroxide Chemical compound OO MHAJPDPJQMAIIY-UHFFFAOYSA-N 0.000 description 2
- 229910002677 Pd–Sn Inorganic materials 0.000 description 2
- ZLMJMSJWJFRBEC-UHFFFAOYSA-N Potassium Chemical compound [K] ZLMJMSJWJFRBEC-UHFFFAOYSA-N 0.000 description 2
- 238000004458 analytical method Methods 0.000 description 2
- 230000008901 benefit Effects 0.000 description 2
- 239000008280 blood Substances 0.000 description 2
- 210000004369 blood Anatomy 0.000 description 2
- 239000003638 chemical reducing agent Substances 0.000 description 2
- 239000002131 composite material Substances 0.000 description 2
- 239000011889 copper foil Substances 0.000 description 2
- 230000007797 corrosion Effects 0.000 description 2
- 238000005260 corrosion Methods 0.000 description 2
- 238000005336 cracking Methods 0.000 description 2
- 230000007547 defect Effects 0.000 description 2
- 238000004453 electron probe microanalysis Methods 0.000 description 2
- 238000010828 elution Methods 0.000 description 2
- 239000000945 filler Substances 0.000 description 2
- 238000005098 hot rolling Methods 0.000 description 2
- 230000001771 impaired effect Effects 0.000 description 2
- 150000002500 ions Chemical class 0.000 description 2
- 229910052742 iron Inorganic materials 0.000 description 2
- 229910052745 lead Inorganic materials 0.000 description 2
- 239000000155 melt Substances 0.000 description 2
- 230000003287 optical effect Effects 0.000 description 2
- 229910052698 phosphorus Inorganic materials 0.000 description 2
- 229910052700 potassium Inorganic materials 0.000 description 2
- 239000011591 potassium Substances 0.000 description 2
- 229910001379 sodium hypophosphite Inorganic materials 0.000 description 2
- 238000004544 sputter deposition Methods 0.000 description 2
- 239000010409 thin film Substances 0.000 description 2
- 229910052721 tungsten Inorganic materials 0.000 description 2
- XLYOFNOQVPJJNP-UHFFFAOYSA-N water Substances O XLYOFNOQVPJJNP-UHFFFAOYSA-N 0.000 description 2
- 229910052725 zinc Inorganic materials 0.000 description 2
- 229910017755 Cu-Sn Inorganic materials 0.000 description 1
- 229910017770 Cu—Ag Inorganic materials 0.000 description 1
- 229910017927 Cu—Sn Inorganic materials 0.000 description 1
- 229910017315 Mo—Cu Inorganic materials 0.000 description 1
- 229910052581 Si3N4 Inorganic materials 0.000 description 1
- VMHLLURERBWHNL-UHFFFAOYSA-M Sodium acetate Chemical compound [Na+].CC([O-])=O VMHLLURERBWHNL-UHFFFAOYSA-M 0.000 description 1
- QAOWNCQODCNURD-UHFFFAOYSA-L Sulfate Chemical compound [O-]S([O-])(=O)=O QAOWNCQODCNURD-UHFFFAOYSA-L 0.000 description 1
- 235000010724 Wisteria floribunda Nutrition 0.000 description 1
- 239000002253 acid Substances 0.000 description 1
- 239000000853 adhesive Substances 0.000 description 1
- 230000001070 adhesive effect Effects 0.000 description 1
- PNEYBMLMFCGWSK-UHFFFAOYSA-N aluminium oxide Inorganic materials [O-2].[O-2].[O-2].[Al+3].[Al+3] PNEYBMLMFCGWSK-UHFFFAOYSA-N 0.000 description 1
- 238000000137 annealing Methods 0.000 description 1
- KUNSUQLRTQLHQQ-UHFFFAOYSA-N copper tin Chemical compound [Cu].[Sn] KUNSUQLRTQLHQQ-UHFFFAOYSA-N 0.000 description 1
- PMHQVHHXPFUNSP-UHFFFAOYSA-M copper(1+);methylsulfanylmethane;bromide Chemical compound Br[Cu].CSC PMHQVHHXPFUNSP-UHFFFAOYSA-M 0.000 description 1
- 238000000151 deposition Methods 0.000 description 1
- 238000010894 electron beam technology Methods 0.000 description 1
- 238000011156 evaluation Methods 0.000 description 1
- QOSATHPSBFQAML-UHFFFAOYSA-N hydrogen peroxide;hydrate Chemical compound O.OO QOSATHPSBFQAML-UHFFFAOYSA-N 0.000 description 1
- 230000006872 improvement Effects 0.000 description 1
- 230000010354 integration Effects 0.000 description 1
- 229910052759 nickel Inorganic materials 0.000 description 1
- 239000003921 oil Substances 0.000 description 1
- 230000003647 oxidation Effects 0.000 description 1
- 238000007254 oxidation reaction Methods 0.000 description 1
- -1 potassium ferricyanide Chemical compound 0.000 description 1
- 230000009467 reduction Effects 0.000 description 1
- 238000005096 rolling process Methods 0.000 description 1
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 description 1
- 235000017281 sodium acetate Nutrition 0.000 description 1
- 239000001632 sodium acetate Substances 0.000 description 1
- 239000004071 soot Substances 0.000 description 1
- 239000011800 void material Substances 0.000 description 1
- 238000003466 welding Methods 0.000 description 1
Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/34—Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements
- H01L23/36—Selection of materials, or shaping, to facilitate cooling or heating, e.g. heatsinks
- H01L23/373—Cooling facilitated by selection of materials for the device or materials for thermal expansion adaptation, e.g. carbon
- H01L23/3735—Laminates or multilayers, e.g. direct bond copper ceramic substrates
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- H01L23/14—Mountings, e.g. non-detachable insulating substrates characterised by the material or its electrical properties
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- H01L23/36—Selection of materials, or shaping, to facilitate cooling or heating, e.g. heatsinks
- H01L23/373—Cooling facilitated by selection of materials for the device or materials for thermal expansion adaptation, e.g. carbon
- H01L23/3736—Metallic materials
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- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
- H01L2224/321—Disposition
- H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/32225—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
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- H01L2224/42—Wire connectors; Manufacturing methods related thereto
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- H01L2224/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
- H01L2224/45001—Core members of the connector
- H01L2224/45099—Material
- H01L2224/451—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
- H01L2224/45117—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 400°C and less than 950°C
- H01L2224/45124—Aluminium (Al) as principal constituent
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- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
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- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
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- H01L2224/481—Disposition
- H01L2224/48135—Connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip
- H01L2224/48137—Connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip the bodies being arranged next to each other, e.g. on a common substrate
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- H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
- H01L2224/732—Location after the connecting process
- H01L2224/73251—Location after the connecting process on different surfaces
- H01L2224/73265—Layer and wire connectors
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- H01L23/14—Mountings, e.g. non-detachable insulating substrates characterised by the material or its electrical properties
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- H01L24/42—Wire connectors; Manufacturing methods related thereto
- H01L24/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
- H01L24/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
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- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/42—Wire connectors; Manufacturing methods related thereto
- H01L24/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L24/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
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- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01019—Potassium [K]
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- H01L2924/11—Device type
- H01L2924/13—Discrete devices, e.g. 3 terminal devices
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- H01L2924/1305—Bipolar Junction Transistor [BJT]
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- H01L2924/1305—Bipolar Junction Transistor [BJT]
- H01L2924/13055—Insulated gate bipolar transistor [IGBT]
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
- Y10T156/00—Adhesive bonding and miscellaneous chemical manufacture
- Y10T156/10—Methods of surface bonding and/or assembly therefor
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
- Y10T428/00—Stock material or miscellaneous articles
- Y10T428/12—All metal or with adjacent metals
- Y10T428/12493—Composite; i.e., plural, adjacent, spatially distinct metal components [e.g., layers, joint, etc.]
- Y10T428/12771—Transition metal-base component
- Y10T428/12778—Alternative base metals from diverse categories
Definitions
- the present invention relates to a Cu—Mo substrate, and more particularly to a Cu—Mo substrate that is suitably used as a heat radiating member for a power module mounted on an automobile or the like.
- a power module used for driving a motor includes a semiconductor element (chip) such as a power transistor and a circuit board on which a heat radiating board (heat sink material) is mounted.
- semiconductor elements such as IGBT (Insulated Gate Bipolar Transistor) capable of high-speed operation are mainly used.
- the power module 300 includes a heat dissipation member 101, a circuit board 108 such as a ceramic substrate, and a semiconductor chip 109 such as an IGBT.
- the circuit board 108 is a Direct Copper Bonding board in which copper foil circuit boards 108b and 108c are directly bonded to both surfaces of a ceramic board 108a on which a force such as alumina, aluminum nitride, or silicon nitride is formed.
- the heat release member 101 and the circuit board 108 are joined by a solder layer 112 such as Sn—Pb.
- the circuit board 108 and the semiconductor chip 109 are joined by a solder layer 111 such as Ag—Cu.
- the material used for the heat dissipation substrate is required to have a high thermal conductivity and a thermal expansion coefficient substantially equal to the thermal expansion coefficient of the semiconductor chip.
- the difference between the thermal expansion coefficient of the heat dissipation substrate material and the thermal expansion coefficient of the semiconductor chip is large, and even if a material with excellent thermal conductivity is used, the semiconductor chip may peel off from the heat dissipation substrate It is a force that may cause breakage.
- composite materials having different metal forces such as Cu-Mo substrates and Cu-W substrates have been widely used as heat dissipation substrates.
- Cu-Mo substrates are widely used.
- a Cu-Mo substrate for example, a Cu-Mo clad material in which a Cu base and a Mo base are joined by rolling or the like is widely used.
- the heat dissipation substrate is joined to the circuit substrate or the semiconductor element by brazing. Since Cu and Mo have different wettability to the brazing material, the surface of the Cu-Mo substrate is usually coated with a Ni plating layer for the purpose of facilitating brazing and improving corrosion resistance.
- Cu and Mo are completely different in the ease of forming a Ni plating layer, so they have excellent adhesion to the surface of the Mo substrate at the same time as the surface of the Cu substrate in one plating bath. It is difficult to form a Ni plating layer.
- Cu is easy to form a Ni plating layer, but Mo is easily oxidized and a hard and brittle oxide film is formed on the surface, so it is difficult to form a Ni plating layer.
- Patent Document 1 discloses a technique for suppressing defect defects such as voids and cracks in a joint portion between a heat dissipation board and a metal part.
- Ni plating treatment is applied to all the surfaces separately, which improves the wettability with the brazing material. It has improved.
- the surface of the Mo substrate is etched with red blood potassium (potassium ferricyanide) to form an Au thin film or Ni
- red blood potassium potassium (potassium ferricyanide)
- Ni plating layer will be peeled off due to swell. Also, In this method, many processes must be performed before Ni plating, and productivity is lowered.
- Patent Document 2 describes a method of directly forming a Ni plating layer on the surface of a Cu—Mo substrate using an electroless plating method. Compared to electrolytic plating, the electroless plating is capable of uniformly plating workpieces with complex shapes, and has the advantage that a Ni plating film with high hardness and excellent wear resistance can be obtained. There is.
- Patent Document 1 JP-A-6-344131 (Sumitomo Electric Industries)
- Patent Document 2 JP-A 62-183132 (Fuji Electric)
- the present invention has been made in view of the above-mentioned points, and its main object is a Cu-Mo substrate that is suitably used as a heat dissipation substrate for a power module, and is a Cu-Mo substrate.
- a Cu-Mo substrate capable of forming a Ni plating layer having excellent adhesion on the surface of the Mo substrate and the surface of the Mo substrate, and It is in providing the manufacturing method.
- Another object of the present invention is to provide a power module using the heat dissipation substrate formed by such a Cu-Mo substrate cover.
- the Cu-Mo substrate of the present invention is a Cu base material containing Cu as a main component, and a Mo base material having first and second main surfaces facing each other and containing Mo as a main component.
- the second main surface of the Mo base material covers the Mo base material disposed on the main surface of the Cu base material, and the first main surface and side surfaces of the Mo base material 1 And a first Sn—Cu based alloy layer containing Sn of not less than 13% by mass and not more than 13% by mass.
- the second containing 1 to 13% by mass of Sn provided between the main surface of the Cu base and the second main surface of the Mo base.
- Sn—Cu series An alloy layer is further provided.
- a Ni plating layer is further provided to cover at least a part of the surface of the Cu base and the first Sn—Cu alloy layer covering the Mo base.
- the first Sn-Cu-based alloy layer includes a first surface in contact with the first main surface of the Mo base, and a second surface facing the first surface.
- the Sn concentration on the second surface is higher than the Sn concentration on the first surface.
- the power module of the present invention is a power module including a semiconductor element and a heat radiating substrate that performs a function of transferring heat of the semiconductor element to the outside.
- Mo substrate power is configured.
- the semiconductor element is an IGBT.
- a method for producing a Cu-Mo substrate according to the present invention is a method for producing the above-described Cu-Mo substrate, wherein the Cu substrate, the Mo substrate, and 1 mass% or more and 13 mass% or less.
- (b) a step of melting the Sn—Cu based alloy layer is a method for producing the above-described Cu-Mo substrate, wherein the Cu substrate, the Mo substrate, and 1 mass% or more and 13 mass% or less.
- the step (a) includes a step (al) of preparing a clad material in which the Cu base material and the Mo base material are joined.
- Step (a) a Sn—Cu based alloy layer containing 1% by mass or more and 13% by mass or less of Sn is bonded on the first main surface of the Mo base.
- Step (b) includes a step (b 1) of melting the Sn Cu based alloy layer and the further Sn Cu based alloy layer.
- the step (a) includes a step (a3) of further preparing a further Sn—Cu based alloy layer containing 1% by mass or more and 13% by mass or less of Sn, b) shows a state in which the further Sn—Cu alloy layer, the Mo substrate and the Sn Cu alloy layer are arranged in this order on the main surface of the Cu substrate. And (b2) a step of melting the alloy layer and the further Sn—Cu alloy layer.
- a method of manufacturing a Cu-Mo substrate according to the present invention is a method of manufacturing the above-described Cu-Mo substrate.
- a step (a) of preparing the Cu base material, the Mo base material, and a Sn—Cu based alloy layer containing 1 mass% or more and 13 mass% or less of Sn, and the Mo base material By melting the Sn—Cu based alloy layer in a state where the Sn—Cu based alloy layer is disposed on the first main surface, the first main surface and the side surface of the Mo base are melted.
- the surface of the Mo base is covered with a Sn-Cu-based alloy layer that is close to the Cu composition and excellent in adhesion to the Ni plating layer. Therefore, Ni plating can be performed directly on the Cu-Mo substrate without performing separate Ni plating, thereby forming a Ni plating layer with excellent adhesion. Furthermore, since the Cu—Mo substrate of the present invention has a high thermal conductivity and a thermal expansion coefficient substantially equal to the thermal expansion coefficient of the semiconductor chip, it functions to transfer the heat of the semiconductor element to the outside. It is suitably used as a heat dissipation substrate, and is particularly useful as a heat dissipation substrate for power modules.
- the power module provided with the Cu—Mo substrate of the present invention has excellent heat dissipation characteristics, and can avoid peeling and cracking of the semiconductor chip due to the difference in thermal expansion coefficient.
- FIG. 1 is a cross-sectional view schematically showing a configuration of a Cu—Mo substrate 10 of a first embodiment according to the present invention.
- FIG. 2 (a) Force and (d) are process cross-sectional views schematically showing the first method in the first embodiment.
- FIG. 3 is a cross-sectional view schematically showing a configuration of a Cu—Mo substrate 20 of a second embodiment according to the present invention.
- FIG. 4 (a) Force and (d) are process sectional views schematically showing a second method in the second embodiment.
- FIG. 5 (a) Force and (e) are process cross-sectional views schematically showing a third method in the second embodiment.
- 6] A sectional view schematically showing a configuration of a power module according to a third embodiment of the present invention.
- the present inventor can simultaneously form a Ni plating layer with excellent adhesion to a Cu-Mo substrate composed of a Cu base and a Mo base that are completely different in the ease of forming a Ni plating layer.
- various studies were conducted focusing on the brazing material that can bond the Cu substrate and the Mo substrate.
- a Sn-Cu alloy brazing material containing a predetermined amount of Sn It was found that the intended purpose was achieved when a Sn—Cu based alloy layer was provided so as to cover at least the surface exposed region of the Mo substrate, and the present invention was achieved.
- the Sn-Cu-based alloy brazing material used in the present invention is the same as the brazing material described in International Publication WO 2 006Z16479A1 according to the present invention, and contains Sn of 1 mass% or more and 13 mass% or less. Yes.
- the above Sn-Cu alloy brazing material is placed between the Cu base and the Mo base (joint surface) and heated and melted.
- a Cu—Mo substrate on which a layer is formed (hereinafter sometimes referred to as a Cu—Mo substrate of the prior invention) is disclosed. According to the prior invention, a Cu—Mo substrate having a small thermal expansion coefficient difference from the semiconductor element and having a high thermal conductivity can be obtained.
- the present inventor has shown that the above Sn-Cu alloy brazing material is extremely excellent in wettability between the Cu base and the Mo base, and has excellent strength and adhesion to the Ni plating layer. I found out. Therefore, if such a brazing material is used and an Sn-Cu alloy layer is formed so as to cover at least the exposed surface area of the Mo substrate, the Ni plating treatment for the Cu substrate can be applied to the Cu-Mo substrate as it is. We have found that we can do it and have reached the present invention.
- a Sn-Cu-based alloy layer is formed so as to cover at least the surface exposed region (the upper surface and side surfaces of Mo) of the Mo substrate.
- the structure is different from the Cu—Mo substrate of the prior invention in which the Sn—Cu alloy layer is formed only on the joint surface with the Mo substrate. According to the present invention, it is difficult to form a Ni plating layer. Since the surface exposed region of the Mo base is covered with a predetermined Sn—Cu alloy layer, the adhesion with the Ni plating layer is improved. be able to.
- the Sn—Cu based alloy layer contains Sn in the range of 1% by mass to 13% by mass, similar to the Sn—Cu based alloy layer in the prior invention,
- This Cu—Mo substrate also has the characteristics (excellent thermal conductivity and thermal expansion coefficient close to the thermal expansion coefficient of the semiconductor element) of the Cu—Mo substrate of the prior invention. Therefore, the Cu—Mo substrate of the present invention is particularly useful as a heat dissipation substrate for power modules.
- the Cu-Mo substrate of the present embodiment has a predetermined Sn-Cu-based alloy layer so as to cover at least the surface exposed region of the Mo base (a small ridge part bonded to the Cu base). It is characterized by having been established.
- a preferred method for producing a Cu-Mo substrate according to the present embodiment is a step of preparing a Cu base material, a Mo base material, and a Sn-Cu-based alloy layer containing 1 mass% or more and 13 mass% or less of Sn. (a) and a step of melting the Sn—Cu alloy layer with the Mo substrate and the Sn—Cu alloy layer arranged in this order on the main surface (upper surface) of the Cu substrate (b) ).
- a Mo base and a Sn—Cu based alloy layer are sequentially arranged on the upper surface of the Cu base, and then the Sn—Cu based alloy layer is melted to
- a first Sn—Cu alloy layer and a second Sn—Cu alloy layer are formed so as to cover the first Sn—Cu alloy layer.
- the “Sn—Cu alloy layer” disposed on the Mo substrate is the Sn—Cu alloy brazing material used to form the first and second Sn—Cu alloy layers.
- the shape of the Sn—Cu alloy brazing material is not particularly limited, and it may be a brazing material such as a powdery foil or a molded body (rolled material) processed into a predetermined shape! /.
- the first method is to prepare a clad material in which a Cu base material and a Mo base material are joined (step (al)), and on this clad material (strictly, on the upper surface of the Mo base material).
- This is a method in which a Sn—Cu alloy layer is placed and melted.
- the first Sn—Cu based alloy layer covering the upper surface and the side surface of the Mo base is formed (see FIG. 2 described later).
- the second method is to prepare a clad material in which Sn—Cu based alloy layers are bonded to both surfaces of the Mo base (step (a2)), and these Sn—Cu based alloy layers are prepared. It is a method of melting. No. 2 According to this method, the first and second Sn—Cu based alloy layers are formed between the Mo base and the Cu base, and the upper and side surfaces of the Mo base (see FIG. 4 to be described later). .
- the third method is a method in which a Sn—Cu based alloy layer is placed between the Cu base and the Mo base and on the top of the Mo base (step (a3)) and melted. It is.
- the third method as in the second method, the first and second Sn—Cu based alloy layers are formed so as to cover the entire surface of the Mo base (see FIG. 5 described later). ).
- Another preferred embodiment of the Cu—Mo substrate according to the present embodiment is a process for preparing a Cu base material, a Mo base material, and a Sn—Cu based alloy layer (a), and a Mo base material.
- Forming a Sn—Cu based alloy layer covering the top and side surfaces of the Mo base by melting the Sn—Cu based alloy layer with the Sn—Cu based alloy layer disposed on the top surface of (b), And (c) joining the lower surface of the Mo base material on which the Sn—Cu based alloy layer is formed with the Cu base material.
- a Sn-Cu-based alloy layer placed on the upper surface or both surfaces of a Mo substrate is melted to form a Sn-Cu-based alloy layer covering at least a part of the surface of the Mo substrate. Therefore, it is a method of joining such Mo base material to Cu base material. Specifically, for example, an Sn—Cu based alloy layer is placed on the upper surface of the Mo base and melted to form an Sn Cu based alloy layer covering the upper and side surfaces of the Mo base. An example is a method in which a further Sn—Cu based alloy layer is disposed between the Mo base and the Cu base and melted.
- a Cu—Mo substrate is obtained in which the first and second Sn—Cu alloy layers are formed so as to cover the entire surface of the Mo base.
- an Sn—Cu alloy layer is placed on each side of the Mo substrate and melted to form a Sn—Cu alloy layer that covers the entire surface of the Mo substrate, and then the Cu substrate. It may be joined to the material.
- a Cu—Mo substrate 10 according to a first embodiment of the present invention will be described with reference to FIG.
- the surface of the Cu—Mo substrate 10 is covered with the Ni plating layer 4.
- the substrate before the Ni plating layer is formed is referred to as a “Cu—Mo substrate”, and the substrate in which the Ni plating layer is coated on the Cu—Mo substrate is referred to as an “rCu Mo—Ni substrate”.
- the Cu-Mo substrate 10 of this embodiment includes a Cu base material containing Cu as a main component (hereinafter, sometimes simply referred to as "Cu base material") 1 and Mo as a main component. Contains a Mo base (hereinafter sometimes referred to simply as “Mo base”) 2 and a first Sn—Cu-based alloy layer 3
- the Mo base 2 has a first main surface 2a and a second main surface 2b facing each other, and the second main surface 2b of the Mo base 2 is the main surface la of the Cu base 1 Is placed on top.
- the first main surface 2a of the Mo base material may be referred to as “the upper surface of the Mo base material 2”
- the second main surface 2b may be referred to as “the lower surface of the Mo base material 2”.
- a force illustrating an example of a Cu—Mo substrate in which a Mo substrate 2 is partially disposed on a Cu substrate 1 is not limited thereto.
- a Mo base 2 having a length 2L that is substantially the same as the length 1L of the Cu base may be disposed on the Cu base 1. The same applies to the embodiments described later.
- the Cu—Mo substrate 10 of the present embodiment covers the exposed surface area of the Mo base 2 (the first main surface 2a and the side surfaces 2c, 2d of the Mo base 2). As described above, the first Sn—Cu alloy layer 3 is provided.
- the first Sn-Cu-based alloy layer 3 contains 1 mass% or more and 13 mass% or less of Sn.
- the amount of Sn contained in the first Sn—Cu-based alloy layer 3 By controlling the amount of Sn contained in the first Sn—Cu-based alloy layer 3 to 1% by mass or more, it has excellent thermal conductivity and a thermal expansion coefficient close to that of a semiconductor element. In addition, a Cu-Mo substrate with excellent adhesion to the Ni plating layer can be obtained.
- the Sn-Cu-based alloy layer with a Sn content of 1% by mass or more has good wettability with respect to Ni, and when the Sn content is 2% by mass or more, the wettability is particularly high. It is preferable because it is excellent.
- the Sn content exceeds 13% by mass the Sn—Cu alloy layer becomes brittle and cracks and cracks are likely to occur. If the Sn content exceeds 13% by mass, Sn in the Sn-Cu-based alloy layer elutes into the Ni plating film during plating or Sn is oxidized, resulting in voids in the Ni plating film. (Vacancy) may be generated.
- the Ni plating film When voids are generated in the Ni plating film, the Ni plating film may swell or peel off.
- the Sn content contained in the Sn—Cu based alloy layer 3 is preferably 5% by mass or less.
- the Sn content of the first Sn-Cu-based alloy layer 3 is 2 mass% or more and 5 mass% or less.
- the wettability of the Sn—Cu alloy layer to Ni is particularly good, the adhesion of the Ni plating film is improved, and a Mi plating film with a uniform thickness can be obtained.
- the elution of Sn prevents the generation of voids due to acid soot.
- the Sn content also varies depending on the thickness direction of the Sn-Cu alloy layer.
- the Sn—Cu based alloy layer 3A formed on the upper surface 2a of the Mo base 2 the Sn distribution in the cross section in the thickness direction was examined using an EPMA (electron beam microanalyzer) analysis method. Rather than being uniformly distributed in the alloy layer 3A, the surface of the Sn—Cu based alloy layer 3A (the surface in contact with the first main surface 2a of the Mo base 2) is shown in FIG. The existence of a high concentration on the opposite surface) contributed.
- EPMA electron beam microanalyzer
- the reason why the Sn high-concentration region (concentrated layer) is formed on the surface of the Sn—Cu alloy layer in this way is that the Sn—Cu base alloy layer is formed as soon as the Sn is oxidized. This is presumed to move toward the surface side of the alloy layer. Detailed experimental results will be described in detail in the Examples section which will be described later. Such a tendency was similarly observed even after the Ni plating layer 4 was formed on the Sn—Cu based alloy layer.
- the first Sn-Cu-based alloy layer 3 may contain Sn in the above-mentioned range, and the balance may be formed of Cu. However, the adhesion due to the formation of the first Sn-Cu-based alloy layer 3 Other elements may be contained as long as the improving action is not impaired. Other elements include, for example, elements contained in the Cu base material 1 (described later), and elements that diffuse from the Cu base material 1 during the formation of the first Sn—Cu-based alloy layer 3 (for example, Pb, Fe, Zn, P, etc.). Such other elements can be contained in a total amount of about 0.05% by mass or more and 0.035% by mass or less.
- the thickness of the first Sn—Cu-based alloy layer 3 is approximately 2 ⁇ m or more.
- the upper limit of the thickness of the first Sn—Cu-based alloy layer 3 is not particularly limited from the viewpoint of the above action, but is preferably 100 / zm, for example, in view of an increase in cost. More preferably, it is 50 m.
- the thickness of the first Sn—Cu-based alloy layer 3 is not necessarily uniform.
- the surface strength of the Mo base 2 and the force that causes variations due to the formation method of the first Sn—Cu-based alloy layer 3 The thickness force of the layer in which the first Sn—Cu-based alloy layer 3 is formed to be the thinnest is satisfactory if the above preferred range is satisfied.
- the thickness of the first Sn—Cu alloy layer 3 was determined by observing the cross section of the alloy layer with an optical microscope.
- the Cu substrate 1 contains Cu as a main component.
- “containing Cu as a main component” means containing 99 mass% or more (preferably 99.9 mass% or more) of Cu.
- the Cu substrate may be formed only with Cu, or may contain other elements as long as the excellent thermal conductivity due to Cu is not impaired.
- the Mo base 2 contains Mo as a main component.
- “containing Mo as a main component” means containing 99 mass% or more (preferably 99.9 mass% or more) of Mo.
- the Mo base material may be formed only of Mo, but contains other elements within a range that does not impair the characteristics of Mo, such as a small difference in thermal expansion coefficient from the semiconductor element. You can also.
- the surface of the Cu—Mo substrate 10 is covered with a Ni plating layer 4.
- the formation of the Ni plating layer improves the corrosion resistance and the brazing ability with the ceramic substrate.
- the Cu—Mo—Ni substrate 100 can be obtained by performing only one staking operation on the Cu—Mo substrate 10.
- the Cu—Mo—Ni substrate 100 shown in FIG. 1 has the force that the Ni plating layer 4 is formed so as to cover the entire surface of the Cu—Mo substrate 10. As long as it is done, it is not limited to this.
- the first Sn—Cu alloy layer 3 and the surface of the Cu substrate 1 covered by the Mo substrate 2 and the first Sn—Cu alloy layer 3 of the surface of the Cu substrate 1! /, Na V, at least part of the surface
- force Ni plating layer 4 is sufficient if it is covered.
- the thickness of the Ni plating layer 4 is preferably 2 ⁇ m or more and 20 ⁇ m or less.
- the thickness of the Ni plating layer 4 is less than the above range, the above effect is not effectively exhibited. On the other hand, if the thickness of the Ni plating layer 4 exceeds the above range, the flatness of the Ni plating layer is lowered, and the durability and other characteristics are deteriorated.
- the Cu—Mo clad material 5 can be manufactured by a known method. For example, Cu base material 1 and Mo base material 2 are superposed and hot rolled or cold rolled, and then cut into a desired size according to the product dimensions. For the production method of the Cu—Mo clad material 5, for example, the method described in JP-A-6-268115 can be referred to.
- the Sn—Cu alloy brazing material 6 is disposed on the first main surface 2a of the Mo base 2 and heated to a predetermined temperature to be melted. (Step (b)). As a result, the first Sn—Cu-based alloy layer 3 is formed so as to cover the exposed surface area (first main surface 2a and side surfaces 2c, 2d) of the Mo base 2 (see FIG. 2 (c)). ).
- the Sn-Cu-based alloy brazing material 6 contains 1 mass% or more and 13 mass% or less of Sn. By using such a Sn—Cu alloy brazing material 6, the desired first Sn—Cu alloy layer 3 can be formed.
- the content of Sn contained in the Sn—Cu-based alloy brazing material 6 is preferably 2% by mass or more and 5% by mass or less.
- the Sn-Cu-based alloy brazing material 6 used in this embodiment includes Sn in the above-mentioned range, and the remainder may be formed of Cu. You may contain another element in the range which does not impair the adhesive improvement effect.
- elements such as Pb, Fe, Zn, and P can be contained in a total amount of 0.05% by mass or more and 0.35% by mass or less.
- the heating is performed by melting the Sn—Cu-based alloy brazing material 6 and covering not only the first main surface 2a of the Mo base 2 but also the side surfaces 2c and 2d of the Mo base 2 with the first Sn -This is performed until the Cu-based alloy layer 3 is formed.
- the heating condition of the present embodiment is different from the heating condition described in the above International Publication, and the lower limit of the heating temperature described in the above International Publication (the melting point of the Sn—Cu-based alloy brazing material 6). ) Is set slightly higher.
- the Sn—Cu alloy brazing material 6 is heated at the lower limit temperature described in the above International Publication, a Sn Cu alloy layer cannot be formed on the joint surface between the Cu base 1 and the Mo base 2. However, it is difficult to form the first Cu—Sn alloy layer 3 so as to cover the entire surface exposed area of the Mo base 2.
- the specific heating conditions depend on the type and shape of the Sn—Cu alloy brazing material 6 used. However, it is preferable to heat within the range of about 20 ° C or more and about 50 ° C or less than the melting point of Sn—Cu based brazing alloy 6 (force of about 810 ° C is also about 1000 ° C). More preferably, the temperature is in the range of from ° C to about 50 ° C. However, the upper limit of the heating temperature is a temperature below the melting point of Cu base material 1 (about 1083 ° C). This is because the Cu substrate 1 melts when heated at a temperature exceeding the melting point of the Cu substrate 1.
- the shape of the Sn-Cu-based alloy brazing material 6 used in the present embodiment is not particularly limited, and examples thereof include a molded body processed into a predetermined shape and a powdery foil-like brazing material.
- FIG. 2 (b) shows an example of a molded body processed into a predetermined shape as the Sn—Cu-based alloy brazing material 6.
- a molded body can be obtained, for example, by hot rolling a Sn—Cu based alloy having the above composition at a temperature of about 650 ° C. to about 750 ° C. and then forming.
- the brazing material and Mo base material 2 are overlapped and then pressed, for example, under a pressure of about 10 3 Pa to about 10 5 Pa, It is preferable to melt the Sn—Cu alloy brazing filler metal at the above-mentioned temperature in a hydrogen atmosphere while being pressed. As a result, a desired first Sn—Cu-based alloy layer 3 is formed.
- the size (length 6L) of the Sn—Cu alloy brazing material 6 was substantially the same as the size (2L) of the Mo base 2 as shown in FIG. 2 (b).
- the present invention is not limited to this, and may be smaller than the size of the Mo substrate 2, for example.
- the Sn—Cu alloy brazing material 6 is extremely superior in wettability with the Mo base 2, and therefore, on the Mo base 2, the Sn—Cu base is smaller than the Mo base 2. This is because even if the brazing alloy material 6 is disposed, the first Sn—Cu-based alloy 3 covering the surface exposed region of the Mo base 2 is finally formed by heating at a predetermined temperature. Accordingly, as long as the desired first Sn—Cu alloy 3 is formed, the size of the Sn—Cu alloy brazing material 6 can be appropriately set appropriately.
- a powdered or foil-like Sn—Cu-based alloy brazing material is placed (placed) on the upper surface of the Mo base, and the brazing material is melted by heating at the temperature described above. Since the Sn—Cu alloy brazing material melted by heating spreads along the upper surface and side surfaces of the Mo substrate, the desired first Sn—Cu alloy layer is formed.
- the Cu—Mo substrate 10 obtained in this way is coated with the Ni plating layer 4 to obtain a Cu—Mo—Ni substrate 100 (see FIG. 2D).
- the method of forming the Ni plating layer is not particularly limited, and a known electrolytic plating method or electroless plating method can be employed.
- the electroless plating method has an advantage over the electrolytic plating method in that a uniform Ni plating layer can be formed regardless of the type and shape of the material to be covered (in this embodiment, a Cu-Mo substrate). I have.
- the electroless plating method for example, it is preferable to form the Ni plating layer as follows.
- degreasing is performed with ethanol or the like. Degreasing also improves wettability during etching.
- the surface is etched using an etchant such as sulfuric acid-peroxy acid-hydrogen water.
- a catalytic metal for example, Sn, Pd—Sn complex, Pd, etc.
- Electroless plating proceeds with this catalytic metal as the nucleus.
- an electroless Ni plating solution is applied to form a Ni plating layer.
- a Cu-Mo substrate is used until a predetermined Ni plating layer is obtained.
- the reducing agent in the plating solution is oxidized on the surface of the catalytic metal adsorbed on the surface of the Cu-Mo substrate, and Ni ions in the plating solution are reduced. A Ni plating layer is formed.
- a Cu—Mo substrate 20 according to a second embodiment of the present invention will be described with reference to FIG.
- the Cu—Mo substrate 20 of this embodiment includes a Cu base material 11, a Mo base material 12, and a Sn—Cu based alloy layer 13.
- the Mo base 12 has a first main surface 12a and a second main surface 12b facing each other, and the second main surface 12b of the Mo base 12 is on the main surface 11a of the Cu base 11.
- the Sn—Cu based alloy layer 13 is formed of the first Sn—Cu based layer formed on the surface exposed region of the Mo base 12 (the first main surface 12a and the side surfaces 12c, 12d of the Mo base 12). An alloy layer (not shown) and a second Sn—Cu alloy layer (not shown) formed between the second main surface 12b of the Mo base 12 and the main surface 11a of the Cu base 11 Including.
- the Sn—Cu based alloy layer 13 contains 1 mass% or more and 13 mass% or less of Sn.
- the Cu—Mo substrate 20 of the present embodiment is not limited to the exposed surface area of the Mo substrate 12, and the Sn—Cu based alloy layer is also formed on the joint surface between the Mo substrate 12 and the Cu substrate 11.
- the Cu—Mo substrate 20 of the present embodiment is the same as the Cu—Mo substrate 10 of the first embodiment, and a detailed description thereof will be omitted.
- FIGS. 4 and 5 a preferred method for manufacturing the Cu—Mo substrate according to the present embodiment will be described with reference to FIGS. 4 and 5.
- the manufacturing processes shown in FIGS. 4 and 5 correspond to the second and third methods described above, respectively.
- each of the first and second main faces 12a and 12b of the Mo base 12 contains 1% by mass to 13% by mass of Sn.
- a clad material (laminated plate) 15 to which Sn—Cu based alloy layers 13a and 13b are bonded is prepared (step (a2)).
- the clad material 15 can be manufactured, for example, as follows.
- Sn—Cu alloy brazing materials 16a and 16b are prepared. These details are as detailed in the step (b) of the first embodiment described above, and the description is omitted.
- the Sn—Cu alloy brazing material 16a, the Mo base material 12, and the Sn—Cu alloy brazing material 16b are overlapped in this order to obtain about 60%.
- diffusion annealing is performed in a hydrogen atmosphere at a temperature of about 700 ° C and a temperature of 800 ° C for about 1 minute to about 3 minutes.
- the clad material 15 in which the Sn—Cu based alloy layers 13a and 13b are firmly bonded to both surfaces of the Mo base 12 is obtained.
- a clad material 15 is disposed on the main surface of the Cu base material 11, and Sn—Cu based alloy layers 13a, 13 b is heated and melted.
- the heating is performed by melting the first and second Sn—Cu-based alloy layers 13a and 13b formed on both surfaces of the Mo base 12 to form the surface of the Mo base 12 (the main surface 12a and side surfaces of the Mo base 12). 1 2c, 12d, and until the desired Sn—Cu-based alloy layer 13 is formed so as to cover all the joint surfaces 12b) of the Mo base 12 and the Cu base 11.
- Detailed heating conditions are as described in the first embodiment.
- a Ni plating layer 14 is formed on the surface of the Cu—Mo substrate 20 to obtain a Cu—Mo—Ni substrate 200 (see FIG. 4 (d)). ).
- the third method will be described with reference to FIG.
- steps different from those of the second method will be described in detail, and description of overlapping steps will be omitted.
- a Cu base material 11, a Sn—Cu based alloy brazing material 16b, and a Mo base material 12 are arranged in this order, and a Sn—Cu based alloy brazing material is arranged.
- Heat 16b. Heating is performed until the Sn—Cu based alloy layer 13b is formed between the Cu base 11 and the Mo base 12 (joint surface) (see FIG. 5B).
- the Sn—Cu based alloy layer 13b need not be formed over the entire bonding surface, but may be formed on at least a part of the bonding surface. Heating is preferably performed in the same manner as in the second method described above.
- the Sn—Cu-based brazing filler metal 16a is placed on the first main surface 12a of the Mo base 12 and heated. The heating is performed until the Sn—Cu alloy brazing material 16a is melted and the surface (12a, 12b, 12c, 12d) of the Mo base 12 is completely covered with the Sn—Cu alloy layer 13.
- the heating conditions are substantially the same as those described in the second method described above.
- the surface of the Cu—Mo substrate 20 is coated with the Ni plating layer 14 in the same manner as in the first method described above to obtain the Cu—Mo—Ni substrate 200 (see FIG. 5 (e)). ).
- the manufacturing method of the present embodiment is not limited to the second and third methods described above.
- a Cu base material is bonded.
- Sn-Cu alloy brazing material (cladding material) may also be used. This method prevents the deformation of the Sn-Cu alloy brazing material 16a in the Cu-Mo substrate manufacturing process compared to the case of using the Sn-Cu alloy brazing material 16a to which the Cu base material is not bonded. can do.
- Such a Sn—Cu alloy brazing material bonded with a Cu base material is, for example, a clad material in which a Sn—Cu alloy layer is bonded to both surfaces of a Mo base material in the second method described above. 15 (see FIG. 4 (b)) can be obtained in the same manner.
- a Cu—Mo—Cu substrate in which a Cu substrate is further disposed on the upper surface of the Sn—Cu based alloy layer 13 can be obtained.
- a power module 80 including the Cu—Mo—Ni substrate of the present embodiment will be described.
- the power module of the present embodiment is not limited to this.
- the power module 80 includes a first Cu—Mo substrate 30, two ceramic substrates 50a, 50b, and four second Cu—Mo substrates 40a, 40b, 40c, 40d, and four semiconductor chips (IGBT) 60a, 60b, 60c, 60d and force are stacked in this order.
- the semiconductor chips 60a and 60b and 60c and 60d are electrically connected via A1 wires 70a and 70b, respectively.
- the first Cu—Mo substrate 30 includes a Cu base 21 having a thickness of about 3 mm, and two Mo bases 22a and 22b partially disposed on the Cu base 21 (thickness). Are both approximately 0.6 mm).
- the surfaces of the Mo bases 22a and 22b are covered with Sn-Cu alloy layers 23a and 23b with a thickness of approximately 20 ⁇ m, respectively.
- the surface of the first Cu—Mo substrate 30 is covered with a Ni plating layer 24 having a thickness of about 5 m, which improves the brazing properties with the ceramic substrates 50a and 50b.
- the second Cu—Mo substrates 40a and 40b, and 40c and 40d are disposed on the Mo bases 22a and 22b via the ceramic substrates 50a and 50b, respectively. Since the second Cu—Mo substrate 40a, black, 40c, and 40d have the same configuration, the second Cu—Mo substrate 40a will be described below.
- the second Cu-Mo substrate 40a includes a Cu base 31a having a thickness of about 2 mm, and a Mo base 32a having a thickness of about 0.5 mm partially disposed on the Cu base 31a. And. Mo base 32a This surface is covered with a Sn—Cu-based alloy layer 33b having a thickness of about 20 m, which improves heat release characteristics and adhesion to the Ni plating layer 34a. The surface of the second Cu—Mo substrate 40a is covered with a Ni plating layer 34a having a thickness of about 3 m, thereby improving the brazing property between the ceramic substrate 50a and the semiconductor chip 60a.
- FIG. 6 shows a force showing an example of the Cu—Mo substrate 40a in which the entire surface of the Mo base material 32a is covered with the Sn—Cu based alloy layer 33a.
- the present invention is not limited to this.
- a Cu Mo substrate in which the Sn—Cu alloy layer 33a is coated only on the surface exposed region (upper surface and side surface) of the Mo base 32a can be used.
- solder layer 51 such as Sn-Pb, And 52 are joined.
- the second Cu—Mo substrates 40a, 40b and the semiconductor chips 60a, 60b are joined by solder layers 53a, 53b such as Ag—Cu.
- the power module 80 of the present embodiment has two equivalent laminated structures provided on the Cu base 21.
- the description will be given mainly focusing on the configuration of the right half (A in the figure) of FIG.
- the first Cu—Mo substrate 30 and the second Cu—Mo substrates 40a and 40b are manufactured by the first method of the first embodiment described above.
- a Ni plating layer is coated on each surface by an electroless plating method. The details of the electroless plating method are as described in the Examples section below.
- the first Cu-Mo substrate 30 and the ceramic substrate 50a are joined.
- a Cu—Ag brazing material is placed between the first Cu—Mo substrate 30 and the ceramic substrate 50a and heated and melted.
- the type of the brazing material is not limited to this, and a known brazing material capable of joining the Cu—Mo substrate 30 and the ceramic substrate 50a can be used.
- the heating temperature is appropriately determined according to the type of brazing material used.
- the second Cu—Mo substrates 40a and 40b and the semiconductor chips 60a and 60b are joined to each other.
- an Ag—Cu brazing material is placed between the second Cu—Mo substrates 40a and 40b and the semiconductor chips 60a and 60b, and bonded by heating and melting.
- a known brazing material capable of joining the Cu—Mo substrates 40a and 40b and the semiconductor chips 60a and 60b can be used.
- the heating temperature is appropriately determined according to the type of brazing material used.
- the ceramic substrate 50a to which the first Cu—Mo substrate 30 is bonded is bonded to the second Cu—Mo substrates 40a and 40b to which the semiconductor chips 60a and 60b are subjected to S bonding.
- a Sn—Pb-based brazing material is placed between the ceramic substrate 50a and the second Cu—Mo substrates 40a and 40b and melted by heating.
- the type of the brazing material is not limited to this, and a known brazing material that can join the ceramic substrate 50a and the Cu—Mo substrates 40a and 40b can be used.
- the heating temperature is appropriately determined according to the type of brazing material to be used.
- a Cu base material, a Mo base material, and a Sn—Cu based alloy layer containing 1% by mass or more and 13% by mass or less of Sn are arranged in this order.
- a further Sn—Cu-based alloy layer containing 1% by mass to 13% by mass of Sn is arranged! .
- the Cu-Mo laminate of this embodiment is different from the Cu-Mo substrate of this embodiment described above in that it does not have a Sn-Cu-based alloy layer on each of the side surfaces of the Mo base.
- Such a Cu-Mo laminate is useful as a material for manufacturing a Cu-Mo substrate, for example.
- Cu-Mo-Ni substrates in which a Ni plating layer was formed on the surface of the Cu-Mo substrate were produced by the methods of Experimental Examples 1 to 7 shown below, and their appearances were compared.
- a Cu—Mo substrate was prepared using a Cu—Mo clad material and having a Sn—Cu-based alloy layer provided on the exposed surface of Mo (upper surface and side surfaces) (Invention Example 1).
- Cu-Mo clad material was prepared by superimposing Cu substrate 1 and Mo substrate 2 and performing hot rolling (Cu substrate thickness 0.63 mm, Mo substrate thickness 0.63 mm ).
- a Sn-Cu alloy brazing foil (thickness: 25 m) containing about 2% by mass of Sn is prepared.
- the melting point of Sn—Cu alloy brazing foil is about 950 ° C.
- the Sn-Cu alloy brazing foil thus obtained was placed on the upper surface of the Cu-Mo clad material (strictly, on the Mo base material), and the temperature was about 990 ° C. Heated for minutes.
- the Sn—Cu alloy brazing foil was melted by heating, and a Cu—Mo substrate was obtained in which the upper and side surfaces of the Mo substrate were covered with a Sn—Cu alloy layer having a thickness of about 20 m.
- the Sn content of the Sn—Cu based alloy layer was generally in the range of 1.1 mass% to 2.5 mass%.
- a Ni plating layer having a thickness of about 3 m to 5 m was formed on the surface of the Cu-Mo substrate according to the following procedures (1) to (4).
- Ni sulfate 30gZL, sodium hypophosphite 10gZL, sodium acetate: appropriate amount, pH: about 4.6 an electroless Ni plating bath having the following composition
- Cu— is added to an etching solution containing about 200 gZL to 250 gZL of red blood potassium.
- Mo cladding material was immersed (about 10 seconds at room temperature), and the surface was etched.
- the Cu--Mo clad material etched in this way is applied by sputtering.
- An Au film having a thickness of about 0.1 ⁇ m was deposited.
- Sputtering was performed for about 30 minutes under a bias voltage of about lkV to 5 kV while controlling the pressure in the vacuum vessel to about 10 ⁇ .
- the diffusion heat treatment was performed.
- a Ni plating layer was formed by the same procedure as in Experimental Example 1, except that Sn—Cu alloy brazing foil containing 5 mass% Sn (melting point: about 940 ° C) was used. Note that the temperature of the heat treatment for forming the Sn—Cu based alloy layer was set to about 40 ° C. to about 50 ° C. higher than the melting point of the brazing foil used. The same applies to Experimental Examples 5 to 7 below.
- a Ni plating layer was formed in the same procedure as in Experimental Example 1 except that Sn—Cu alloy brazing foil containing 13% by mass of Sn (melting point: about 810 ° C.) was used.
- Ni plating layer was formed in the same procedure as in Experimental Example 1 except that Sn—Cu alloy brazing foil containing 14% by mass of Sn (melting point: about 800 ° C) was used.
- Ni plating layer was formed in the same procedure as in Experimental Example 1, except that a Sn—Cu alloy brazing foil containing 0.5% by mass of Sn (melting point: about 1000 ° C.) was used.
- Comparative Example 1 the Ni plating layer could not be formed with good adhesion, and a part of the surface was swollen.
- Comparative Example 2 although the Ni plating layer could be formed with good adhesion, seven blisters with a diameter of 100 m or more were found on a part of the surface.
- Comparative Example 3 a part of the Cu of the base material melts during brazing, and the Ni plating layer cannot be formed with good adhesion, and the surface in contact with the Mo base swells with a diameter of about 100 m. 5 were observed.
- the Ni plating layer could be formed on the surface of the Mo substrate with good adhesion. Plating layer peeling was observed.
- the Sn concentration in the cross section in the thickness direction of the Sn—Cu based alloy layer formed on the upper surface of the Mo base was measured using the EPMA analysis method. Specifically, in the cross-sectional photograph of the Cu—Mo—Ni substrate shown in FIG. 7, the Sn concentration was measured at a total of five locations (arrows 1 to 5 in the figure). The results are shown in Table 1.
- Sn in the Sn-Cu-based alloy layer formed on the upper surface of the Mo base is not evenly distributed in the alloy layer. It was found to exist at the highest concentration in the interface. As described above, the reason for this is that, as soon as Sn is oxidized, the Sn—Cu alloy layer is formed in the process of forming the Sn—Cu alloy layer. It is presumed to move. However, the Sn concentration does not increase continuously as the Mo substrate side metal moves toward the Ni plating layer side, but increases intermittently as shown in Table 1.
- the Cu-Mo substrate of the present invention is suitably used as a heat dissipation substrate for a power module mounted on, for example, an automobile.
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- Engineering & Computer Science (AREA)
- Chemical & Material Sciences (AREA)
- Materials Engineering (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- Physics & Mathematics (AREA)
- Ceramic Engineering (AREA)
- Cooling Or The Like Of Semiconductors Or Solid State Devices (AREA)
- Electroplating Methods And Accessories (AREA)
- Other Surface Treatments For Metallic Materials (AREA)
Abstract
Description
Claims
Priority Applications (4)
Application Number | Priority Date | Filing Date | Title |
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US11/915,201 US7830001B2 (en) | 2005-05-23 | 2006-05-23 | Cu-Mo substrate and method for producing same |
JP2007517832A JP5004792B2 (ja) | 2005-05-23 | 2006-05-23 | Cu−Mo基板およびその製造方法 |
EP06756479A EP1898463A4 (en) | 2005-05-23 | 2006-05-23 | SUBSTRATE BASED ON Cu AND Mo AND PROCESS FOR PRODUCING THE SAME |
CA2609252A CA2609252C (en) | 2005-05-23 | 2006-05-23 | Cu-mo substrate and method for producing same |
Applications Claiming Priority (2)
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JP2005149232 | 2005-05-23 | ||
JP2005-149232 | 2005-05-23 |
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WO2006126525A1 true WO2006126525A1 (ja) | 2006-11-30 |
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PCT/JP2006/310223 WO2006126525A1 (ja) | 2005-05-23 | 2006-05-23 | Cu-Mo基板およびその製造方法 |
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US (1) | US7830001B2 (ja) |
EP (1) | EP1898463A4 (ja) |
JP (1) | JP5004792B2 (ja) |
KR (1) | KR100897134B1 (ja) |
CN (1) | CN100459109C (ja) |
CA (1) | CA2609252C (ja) |
WO (1) | WO2006126525A1 (ja) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US20080298024A1 (en) * | 2007-05-31 | 2008-12-04 | A.L.M.T. Corp. | Heat spreader and method for manufacturing the same, and semiconductor device |
Families Citing this family (5)
Publication number | Priority date | Publication date | Assignee | Title |
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CA2609252C (en) * | 2005-05-23 | 2012-01-10 | Neomax Materials Co., Ltd. | Cu-mo substrate and method for producing same |
EP2560203A1 (en) * | 2011-08-17 | 2013-02-20 | ABB Technology AG | Power semiconductor arrangement |
CN102284701B (zh) * | 2011-08-26 | 2012-10-03 | 西北有色金属研究院 | 一种Cu-MoCu-Cu复合板材的制备方法 |
JP6462899B2 (ja) * | 2016-09-06 | 2019-01-30 | ザ グッドシステム コーポレーション | 高出力素子用放熱板材 |
JP6871524B1 (ja) * | 2020-03-23 | 2021-05-12 | 千住金属工業株式会社 | 積層接合材料、半導体パッケージおよびパワーモジュール |
Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH06268115A (ja) * | 1993-03-15 | 1994-09-22 | Tokyo Tungsten Co Ltd | 半導体装置用放熱基板の製造方法 |
JP2000269392A (ja) * | 1998-09-04 | 2000-09-29 | Sumitomo Metal Electronics Devices Inc | 半導体モジュール及び放熱用絶縁板 |
JP2001358266A (ja) * | 2000-01-26 | 2001-12-26 | Allied Material Corp | 半導体搭載用放熱基板材料、その製造方法、及びそれを用いたセラミックパッケージ |
Family Cites Families (22)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS59193036A (ja) | 1983-04-16 | 1984-11-01 | Toshiba Corp | 半導体装置の製造方法 |
JPS6142475A (ja) | 1984-08-06 | 1986-02-28 | Mazda Motor Corp | 金属部材の結合方法 |
DE3573137D1 (en) * | 1984-10-03 | 1989-10-26 | Sumitomo Electric Industries | Material for a semiconductor device and process for its manufacture |
JPH0620083B2 (ja) | 1986-02-06 | 1994-03-16 | 富士電機株式会社 | 半導体素子の製造方法 |
JP2675397B2 (ja) | 1989-04-22 | 1997-11-12 | 新光電気工業株式会社 | セラミックパッケージ |
DE69028378T2 (de) * | 1989-12-12 | 1997-03-06 | Sumitomo Spec Metals | Verfahren zur Herstellung eines wärmeleitenden Mischmaterial |
JPH06344131A (ja) | 1993-06-03 | 1994-12-20 | Sumitomo Electric Ind Ltd | 半導体放熱基板への部品接合方法 |
JP4080030B2 (ja) * | 1996-06-14 | 2008-04-23 | 住友電気工業株式会社 | 半導体基板材料、半導体基板、半導体装置、及びその製造方法 |
DE19651528B4 (de) * | 1996-12-11 | 2005-10-06 | Fraunhofer-Gesellschaft zur Förderung der angewandten Forschung e.V. | Chipanordnung und Verfahren zum Herstellen derselben |
US6261703B1 (en) * | 1997-05-26 | 2001-07-17 | Sumitomo Electric Industries, Ltd. | Copper circuit junction substrate and method of producing the same |
JPH11284111A (ja) | 1998-03-30 | 1999-10-15 | Sumitomo Special Metals Co Ltd | ヒートシンク部材及びその製造方法、並びにヒートシンク部材を用いた半導体パッケージ |
JP3479738B2 (ja) * | 1998-11-16 | 2003-12-15 | 株式会社アライドマテリアル | 半導体パッケージと、それに用いる放熱基板の製造方法 |
JP2001010874A (ja) * | 1999-03-27 | 2001-01-16 | Nippon Hybrid Technologies Kk | 無機材料とアルミニウムを含む金属との複合材料の製造方法とその関連する製品 |
US7083759B2 (en) | 2000-01-26 | 2006-08-01 | A.L.M.T. Corp. | Method of producing a heat dissipation substrate of molybdenum powder impregnated with copper with rolling in primary and secondary directions |
JP2001230350A (ja) | 2000-02-14 | 2001-08-24 | Sumitomo Metal Electronics Devices Inc | 放熱用金属板の製造方法 |
US8514340B2 (en) * | 2002-11-08 | 2013-08-20 | Lg Display Co., Ltd. | Method of fabricating array substrate having double-layered patterns |
ATE461037T1 (de) * | 2003-11-28 | 2010-04-15 | Wieland Werke Ag | Schichtenfolge zur herstellung eines verbundmaterials für elektromechanische bauelemente |
WO2006016479A1 (ja) * | 2004-08-10 | 2006-02-16 | Neomax Materials Co., Ltd. | ヒートシンク部材およびその製造方法 |
CA2609252C (en) * | 2005-05-23 | 2012-01-10 | Neomax Materials Co., Ltd. | Cu-mo substrate and method for producing same |
US7718832B1 (en) * | 2006-12-29 | 2010-05-18 | Pacific Renewable Fuels, Inc. | Combination catalytic process for producing ethanol from synthesis gas |
US20090278233A1 (en) * | 2007-07-26 | 2009-11-12 | Pinnington Thomas Henry | Bonded intermediate substrate and method of making same |
JP5196160B2 (ja) * | 2008-10-17 | 2013-05-15 | 日亜化学工業株式会社 | 半導体発光素子 |
-
2006
- 2006-05-23 CA CA2609252A patent/CA2609252C/en not_active Expired - Fee Related
- 2006-05-23 US US11/915,201 patent/US7830001B2/en not_active Expired - Fee Related
- 2006-05-23 KR KR1020077005344A patent/KR100897134B1/ko not_active IP Right Cessation
- 2006-05-23 WO PCT/JP2006/310223 patent/WO2006126525A1/ja active Application Filing
- 2006-05-23 CN CNB2006800009118A patent/CN100459109C/zh not_active Expired - Fee Related
- 2006-05-23 EP EP06756479A patent/EP1898463A4/en not_active Withdrawn
- 2006-05-23 JP JP2007517832A patent/JP5004792B2/ja not_active Expired - Fee Related
Patent Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH06268115A (ja) * | 1993-03-15 | 1994-09-22 | Tokyo Tungsten Co Ltd | 半導体装置用放熱基板の製造方法 |
JP2000269392A (ja) * | 1998-09-04 | 2000-09-29 | Sumitomo Metal Electronics Devices Inc | 半導体モジュール及び放熱用絶縁板 |
JP2001358266A (ja) * | 2000-01-26 | 2001-12-26 | Allied Material Corp | 半導体搭載用放熱基板材料、その製造方法、及びそれを用いたセラミックパッケージ |
Non-Patent Citations (1)
Title |
---|
See also references of EP1898463A4 * |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US20080298024A1 (en) * | 2007-05-31 | 2008-12-04 | A.L.M.T. Corp. | Heat spreader and method for manufacturing the same, and semiconductor device |
Also Published As
Publication number | Publication date |
---|---|
CN101032022A (zh) | 2007-09-05 |
EP1898463A4 (en) | 2010-09-15 |
CA2609252C (en) | 2012-01-10 |
KR20070056088A (ko) | 2007-05-31 |
CN100459109C (zh) | 2009-02-04 |
JP5004792B2 (ja) | 2012-08-22 |
US7830001B2 (en) | 2010-11-09 |
KR100897134B1 (ko) | 2009-05-14 |
CA2609252A1 (en) | 2006-11-30 |
EP1898463A1 (en) | 2008-03-12 |
JPWO2006126525A1 (ja) | 2008-12-25 |
US20090045506A1 (en) | 2009-02-19 |
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