Classifications

• • H—ELECTRICITY
  • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
  • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
  • H05K3/00—Apparatus or processes for manufacturing printed circuits
  • H05K3/46—Manufacturing multilayer circuits
• • H—ELECTRICITY
  • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
  • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
  • H05K3/00—Apparatus or processes for manufacturing printed circuits
  • H05K3/46—Manufacturing multilayer circuits
  • H05K3/4688—Composite multilayer circuits, i.e. comprising insulating layers having different properties
  • H05K3/4691—Rigid-flexible multilayer circuits comprising rigid and flexible layers, e.g. having in the bending regions only flexible layers
• • H—ELECTRICITY
  • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
  • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
  • H05K3/00—Apparatus or processes for manufacturing printed circuits
  • H05K3/02—Apparatus or processes for manufacturing printed circuits in which the conductive material is applied to the surface of the insulating support and is thereafter removed from such areas of the surface which are not intended for current conducting or shielding
  • H05K3/06—Apparatus or processes for manufacturing printed circuits in which the conductive material is applied to the surface of the insulating support and is thereafter removed from such areas of the surface which are not intended for current conducting or shielding the conductive material being removed chemically or electrolytically, e.g. by photo-etch process
  • H05K3/061—Etching masks
  • H05K3/062—Etching masks consisting of metals or alloys or metallic inorganic compounds
• • H—ELECTRICITY
  • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
  • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
  • H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
  • H05K2203/03—Metal processing
  • H05K2203/0361—Stripping a part of an upper metal layer to expose a lower metal layer, e.g. by etching or using a laser
• • H—ELECTRICITY
  • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
  • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
  • H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
  • H05K2203/07—Treatments involving liquids, e.g. plating, rinsing
  • H05K2203/0703—Plating
  • H05K2203/072—Electroless plating, e.g. finish plating or initial plating
• • H—ELECTRICITY
  • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
  • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
  • H05K3/00—Apparatus or processes for manufacturing printed circuits
  • H05K3/38—Improvement of the adhesion between the insulating substrate and the metal
  • H05K3/382—Improvement of the adhesion between the insulating substrate and the metal by special treatment of the metal
  • H05K3/384—Improvement of the adhesion between the insulating substrate and the metal by special treatment of the metal by plating
• • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
  • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
  • Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
  • Y10T29/00—Metal working
  • Y10T29/49—Method of mechanical manufacture
  • Y10T29/49002—Electrical device making
  • Y10T29/49117—Conductor or circuit manufacturing
  • Y10T29/49124—On flat or curved insulated base, e.g., printed circuit, etc.
  • Y10T29/49155—Manufacturing circuit on or in base

Definitions

• the present invention is related to the field of printed circuit boards, and in particular to the manufacture of rigid/flex printed circuit boards having both rigid and flexible areas so as to be mountable in non-planar spaces.
• Printed circuit board technology has evolved such that it is presently possible to fabricate so-called "rigid/flex" circuit boards that have desirable characteristics of both rigid and flexible circuits.
• Relatively rigid areas of rigid/flex boards are used for mounting circuit components, attaching external cables via connectors, and providing electrical circuit interconnections among the components and connectors.
• Relatively flexible areas of the rigid/flex boards are used to carry electrical interconnections and to enable the board to be bent or shaped as required by the physical characteristics of the system in which the board is to be used. For example, it is known to use a rigid/flex board having two rigid areas connected by a flex area and folded into a "U" shape to attain higher volumetric component density than might be achieved using two separate rigid circuit boards and conventional interconnection technology.
• Rigid/flex circuit boards have a variety of structures, and have been made by a variety of methods. Some rigid/flex circuit boards are fabricated by laminating a series of flexible layers together, alternating insulative and conductive layers as necessary. One technique for forming flexible areas involves the selective removal of portions of outer laminated layers. Where the outer layers have been removed, the board is relatively thin, and thus more flexible than in surrounding areas where the laminated outer layers have not been removed.
• One method of fabricating rigid/flex boards employs a flexible insulative core that is copper-cladded on both sides.
• the copper layers are selectively etched to form circuit traces.
• an insulating layer and another conductive layer are laminated to each side, resulting in a rigid/flex board having four or more conductive layers.
• the outer insulating layers Prior to lamination, are provided with openings where flexible areas of the rigid/flex circuit board will exist. The openings may be formed for example by routing.
• the outer conductive layers are formed of thin, conductive, metallic foil such as copper foil. Because of their fragility, it is generally not feasible to etch or shape the outer conductive layers prior to lamination. Rather, the foil is first laminated to the circuit board for mechanical stability, and then portions of the laminated foil are removed by suitable means such as chemical etching.
• the edges of the mask pattern are sealed in some manner to the surrounding outer layers, such as for example by "tucking" the mask material under a subsequently- laminated layer.
• the mask material protects the circuit etch on the flexible circuit during the etching of the outer conductive layers.
• a rigid/flex circuit board and fabricating process are disclosed that avoid the complex and costly steps of masking a flexible inner circuit in preparation for etching of a copper foil on a rigid outer circuit structure. As a result, the cost effectiveness of the rigid/flex circuit board is improved.
• patterns of electrical traces are formed by etching conductive layers formed on outer surfaces of a flexible multi-layer circuit structure.
• the etched traces are then protected by depositing a protective barrier material that is resistant to a subsequently-used copper etching solution.
• a protective barrier material that is resistant to a subsequently-used copper etching solution. Examples of such a material include tin and combinations of tin and oxides, which are resistant to ammonia-based copper etching solutions.
• the protective barrier material is deposited using an "electroless" process, such as immersion of the flexible circuit board in an aqueous solution containing ionic tin. The protective barrier material adheres to the copper traces to encapsulate them for subsequent processing.
• the outer structure includes a bondfilm of epoxy-impregnated fiberglass ("prepreg" bondfilm) and a copper foil layer.
• prepreg bondfilm has a window area removed by routing or an equivalent process prior to being laminated to the flexible structure.
• the window area defines a flex area of the rigid/flex circuit board that will be relatively flexible, enabling the rigid/flex circuit board to be folded, twisted, or otherwise shaped as necessary for a given enclosure or mounting scheme.
• the portion of the outer copper foil above the window area of the prepreg bondfilm is then removed, using a chemical etchant to which the previously-applied protective barrier material is immune.
• the protective barrier material in the flex area of the flexible circuit is stripped away.
• a flexible sealing coating is then applied to the circuit board. The sealing coating covers the edges of the outer laminated circuit structure adjacent to the flex area to seal the circuit structures against moisture and other contaminants.
• the disclosed fabricating method has several benefits.
• the protective barrier material on the copper traces of the flexible circuit acts as an etch stop in the flex area to protect the traces during the etching of the rigid circuit structure.
• the outer coating seals the edges of the outer circuit structure adjacent to the flexible area, and makes for a continuous coating of relatively uniform thickness across the circuit board.
• Figure 1 is a flow diagram of a process for fabricating a flexible inner circuit structure according to the present invention
• Figure 2 is a schematic edge view of the flexible inner circuit structure resulting from the process of Figure 1;
• Figure 3 is a schematic edge view of the flexible inner circuit structure of Figure 2 and additional outer circuit layers to be laminated thereto to create an intermediate workpiece
• Figure 4 is a schematic edge view of a workpiece resulting from lamination according to Figure 3 and subsequent removal of a portion of outer copper foil to expose a flex area of the flexible inner circuit structure
• Figure 5 is a schematic edge view of the workpiece of Figure 4 after having an immersion tin layer stripped away from the flex area of the flexible inner circuit structure
• Figure 6 is a schematic edge view of the workpiece of Figure 5 after having a sealing coating deposited thereon.
• Figure 1 shows a process by which a flexible inner circuit structure or "innerlayer” for use in a rigid/flex circuit board is made.
• step 10 tooling holes are punched into a copper-clad flexible substrate, such as a glass-reinforced epoxy or polyimide "prepreg” material commonly known as "thin-core FR4".
• the flexible substrate may also be an adhesive-based or adhesive-less polyimide film.
• step 12 photoresist material is applied to the copper cladding on both sides of the substrate in respective patterns reflecting a set of circuit interconnections to be made by the flexible substrate. These patterns are exposed to ultraviolet light in step 14 and developed in step 16.
• step 18 the copper that is not covered by exposed photoresist is etched using a suitable chemical etchant such as an ammoniacal etching solution.
• step 20 the photoresist is stripped away.
• the resulting set of copper interconnection traces is then inspected at step 22.
• the copper traces are covered with a protective barrier material, in preparation for subsequent processing of the flexible substrate into a rigid/flex circuit board as described below.
• the barrier material is tin, and it is deposited by immersing the circuit structure in a solution containing ionic tin.
• the innerlayer 30 consists of the FR4 core 32, copper signal layers 34 and 36, and immersion tin layers 38 and 40.
• the layers 34, 36, 38 and 40 are shown as solid and smooth in the schematic view of Figure 2; however, in actuality these layers exhibit contouring due to the selective etching that defines individual circuit traces in the layers 34 and 36.
• the immersion tin in the layers 38 and 40 adheres to and encapsulates the copper areas in layers 34 and 36, leaving areas of the core 32 exposed where copper from the layers 34 and 36 has been etched away.
• the protective barrier layers 38 and 40 may employ materials other than tin, such as for example gold.
• the protective barrier material should adequately encapsulate the copper traces in layers 34 and 36, and it should be resistant to a chemical copper etchant used in a subsequent processing step as described below. Also, the material should provide a surface to which a subsequently-applied bondfilm can adequately bond, as described below.
• Figure 3 is an exploded view illustrating the next step in the rigid/flex fabrication process. Layers 50 and 52 of prepreg bondfilm are laminated onto the outer surfaces of the innerlayer 30, and copper foil layers 54 and 56 are applied to the outer surfaces of bondfilm layers 50 and 52. Although in general the bondfilms 50 and 52 and foil layers 54 and 56 are also flexible, the overall structure resulting from laminating these additional layers is significantly more rigid than the innerlayer 30 alone.
• the prepreg bondfilm layers 50 and 52 Prior to being laminated to the innerlayer 30, the prepreg bondfilm layers 50 and 52 have respective window areas 58, 60 removed by routing or an equivalent process. As described in greater detail below, the window areas 58 and 60 define an area of the resulting rigid/flex circuit board having relatively greater flexibility. This area is thus referred to as the "flex" area of the rigid/flex circuit board. It will also be appreciated that after lamination of the bondfilm layers 50, 52 and the copper layers 54 and 56, the material surrounding the window areas 58 and 60 forms respective "pouches". These pouches are subsequently removed as described below.
• the bondfilm layers 50 and 52 may be formed of different materials.
• a bondfilm employing a 1-mil layer of polyimide and 1-mil outer layers of acrylic adhesive may be used.
• a bondfilm of this type is available from DuPont company and known by the trade name KAPTON LFO 111.
• the next step in the process is the selective etching of the outer copper layers 54 and 56 in a manner similar to that shown in Figure 1 for the inner copper layers 34 and 36 ( Figure 2) .
• the circuit patterns on the outer copper layers 54 and 56 are such that the entire area adjacent to the window areas 58 and 60 ( Figure 3) is removed, forming a flex area 70 of the rigid/flex board as shown in Figure 4.
• the copper foil is removed using a chemical etchant to which the immersion tin of the innerlayer 30 is immune, such as for example an ammonia- based etchant.
• a chemical etchant to which the immersion tin of the innerlayer 30 is immune such as for example an ammonia- based etchant.
• ammonia- based etchant allows for the removal of the copper in the layers 54 and 56 without affecting the integrity of the traces in the layers 34 and 36 ( Figure 2) .
• the next step is the removal of the portions of the immersion tin layers 38, 40 in the flex area 70.
• This stripping of the immersion tin can be accomplished using known means, such as for example a 2-part tin/lead stripping process used by many printed circuit manufacturers. 1-part stripping processes can also be employed.
• Figure 6 illustrates that the next step is the deposition of flexible solder mask layers 80 and 82 onto the rigid/flex circuit board.
• the layers 80 and 82 uniformly and continuously coat the circuit board across the flex area 70 and the rigid circuit areas.
• the edge areas 84 and 86 adjacent to the flexible area 70 are sealingly coated to prevent the introduction of moisture or other contaminants into the laminated structure.
• the material used for the layers 80 and 82 is an epoxy-based material known by the trade name PALCOAT® that is sprayed onto the outer surfaces of the rigid/flex circuit board.
• a photo-imagable coverlay known by the DuPont tradename PICTM is used.
• the protective barrier layers 38 and 40 are homogeneous layers of tin
• these layers may include a protective material such as tin in the flex area 70 and another material or materials in the rigid area.
• a protective material such as tin in the flex area 70 and another material or materials in the rigid area.
• oxide material such as a tin oxide in the rigid area.

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• Engineering & Computer Science (AREA)
• Manufacturing & Machinery (AREA)
• Microelectronics & Electronic Packaging (AREA)
• Metallurgy (AREA)
• Production Of Multi-Layered Print Wiring Board (AREA)
• Manufacturing Of Printed Circuit Boards (AREA)
• Structure Of Printed Boards (AREA)
• Manufacturing Of Electric Cables (AREA)

Priority Applications (3)

Applications Claiming Priority (4)

Publications (1)

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Family Applications (1)

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Cited By (3)

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Citations (7)

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• 1999
  • 1999-05-04 US US09/304,916 patent/US6099745A/en not_active Expired - Fee Related
  • 1999-06-02 CN CN99807042A patent/CN1095173C/zh not_active Expired - Fee Related
  • 1999-06-02 KR KR1020007013769A patent/KR20010071409A/ko not_active Withdrawn
  • 1999-06-02 WO PCT/US1999/012226 patent/WO1999063552A1/en not_active Ceased
  • 1999-06-02 EP EP99927157A patent/EP1084498A1/en not_active Withdrawn
  • 1999-06-02 JP JP2000552686A patent/JP2002517898A/ja not_active Ceased
  • 1999-07-26 TW TW088109302A patent/TW456162B/zh not_active IP Right Cessation

Patent Citations (7)

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