US20100202126A1 - Stacked Mounting Structure and Method of Manufacturing Stacked Mounting Structure - Google Patents

Stacked Mounting Structure and Method of Manufacturing Stacked Mounting Structure Download PDF

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Publication number
US20100202126A1
US20100202126A1 US12/678,855 US67885508A US2010202126A1 US 20100202126 A1 US20100202126 A1 US 20100202126A1 US 67885508 A US67885508 A US 67885508A US 2010202126 A1 US2010202126 A1 US 2010202126A1
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United States
Prior art keywords
mounting structure
electroconductive
substrate
stacked mounting
electroconductive member
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Abandoned
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US12/678,855
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English (en)
Inventor
Mikio Nakamura
Yu Kondo
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Olympus Corp
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Olympus Corp
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Assigned to OLYMPUS CORPORATION reassignment OLYMPUS CORPORATION ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS). Assignors: KONDO, YUN, NAKAMURA, MIKIO
Publication of US20100202126A1 publication Critical patent/US20100202126A1/en
Abandoned legal-status Critical Current

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    • H05K3/368—Assembling printed circuits with other printed circuits parallel to each other
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    • H01L24/18—High density interconnect [HDI] connectors; Manufacturing methods related thereto
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    • H05K3/40—Forming printed elements for providing electric connections to or between printed circuits
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    • H05K3/4046—Through-connections; Vertical interconnect access [VIA] connections using auxiliary conductive elements, e.g. metallic spheres, eyelets, pieces of wire
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    • H05K2203/13—Moulding and encapsulation; Deposition techniques; Protective layers
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Definitions

  • the present invention relates to a stacked mounting structure and a method of manufacturing stacked mounting structure.
  • Patent Literature 1 Japanese Patent Application Laid-open Publication No. 2001-144399
  • This substrate connecting member is a member which covers a core body made of a stiff conductor by an elastic body, and which covers the surrounding of the elastic body by an electroconductive material.
  • Patent Literature 1 Japanese Patent Application Laid-open Publication No. 2001-144399
  • the electronic components which can be built-in in a substrate thickness were restricted to components having a height smaller than the substrate thickness, and also, the circuit layer on the front and rear surface of the board main body had to be connected via the electronic components, due to which there had been substantial restrictions in designing of the circuit layer.
  • the connections can be made via a through hole, but it is necessary to provide an electrode pad (land electrode) larger than a through-hole diameter, and since the narrowing of pitch of the board connecting portion was difficult, there had been limitations on making small an area of a principal surface of the substrate.
  • the present invention has been made in view of the abovementioned circumstances, and an object of the present invention is to provide a stacked mounting structure in which, it is possible to realize the narrowing of pitch and to secure a height which enables to mount components, and a method of manufacturing stacked mounting structure. Moreover, another object of the present invention is to provide a stacked mounting structure in which, a degree of freedom of wiring of the substrate is high, and the narrowing of pitch of the substrate connecting portions is possible, and accordingly, the area of the principal surface of the substrate is small.
  • the stacked mounting structure of the present invention includes
  • a plurality of members provided with a mounting area which is necessary for installing an operating components to be mounted on at least one principal surface, and an area for connections for signal transfer for operating the components to be mounted, and
  • an electroconductive member which is disposed on the area for connections between the mutually facing members
  • a cross-section of the electroconductive member is same as or smaller than the area for connections, and an end portion of the electroconductive member is extended from a principal surface of one member up to a principal surface of the other member, and a height of the electroconductive member regulates a distance of the mounting area.
  • a reinforcing member is installed around the electroconductive member.
  • the components to be mounted are mounted on the mounting area, and a distance of the mounting area between the plurality of members is more than a height of the components to be mounted.
  • the reinforcing member is filled in the mounting area between the mutually facing members.
  • the electroconductive member is rod-shaped.
  • the electroconductive member in a state of one end portion thereof joined, the other end portion is mounted on the member, and is formed by removing the portion joined after the other end portion is mounted on the member.
  • an electroconductive pattern of which, at least a part is electrically connected to the electroconductive member is formed at one end portion of the reinforcing member.
  • a method of manufacturing stacked mounting structure includes steps of:
  • a surface of the reinforcing member, opposite to the first member is flattened by grinding, and an end portion of the electroconductive member is exposed.
  • the method of manufacturing stacked mounting structure of the present invention further includes a joining step of forming one end portion of the electroconductive member, in a state of the plurality of electroconductive members joined.
  • the method of manufacturing stacked mounting structure includes steps of: forming a metal film on an end-portion surface of the electroconductive member which is exposed, after the reinforcing member is formed by exposing the end portion of the electroconductive member, on the opposite side of the first member, and a step of forming a bump on the metal film of the end-portion surface of the electroconductive member.
  • the method of manufacturing stacked mounting structure of the present invention includes a separating step after an insulating-material forming step, and that the first member has a size equivalent to a plurality of modules.
  • the stacked mounting structure and the method of manufacturing stacked mounting structure of the present invention there is shown an effect that it is possible to provide a stacked mounting structure in which, it is possible to realize a narrowing of pitch and to secure a height, which enables to mount components to be mounted, and a method of manufacturing stacked mounting structure.
  • FIG. 1 is perspective view showing a structure of a stacked mounting structure according to a first embodiment, by separating into a first substrate and a second substrate.
  • FIG. 2 is a cross-sectional view showing a structure of the stacked mounting structure according to the first embodiment
  • FIG. 3 is a perspective view showing a structure of a stacked mounting structure according to a second embodiment, by separating into a first substrate and a second substrate;
  • FIG. 4 is an enlarged perspective view showing a relationship of an electroconductive member and a reinforcing member according to the second embodiment
  • FIG. 5 is a perspective view showing a structure of a stacked mounting structure according to a third embodiment
  • FIG. 6 is a flowchart showing a flow of a method of manufacturing stacked mounting structure according to a fourth embodiment
  • FIG. 7 is a flowchart showing a flow of a method of manufacturing stacked mounting structure according to a fifth embodiment
  • FIG. 8 is a flowchart showing a flow of a method of manufacturing stacked mounting structure according to a sixth embodiment
  • FIG. 9 is a diagram of which, a right side is an enlarged perspective view showing a structure of a stacked mounting structure corresponding to steps from step S 1 to step S 6 in FIG. 8 , and a left side is a perspective view showing an assembled state of the stacked mounting structure separated into pieces in the right-side diagram;
  • FIG. 10 is a side view showing a structure of the stacked mounting structure corresponding to steps from step S 1 to step S 6 in FIG. 8 ;
  • FIG. 11A is a perspective view showing a structure of a stacked mounting structure according to a modified embodiment
  • FIG. 11B is another perspective view showing the structure of the stacked mounting structure according to the modified embodiment.
  • FIG. 11C is still another perspective view showing the structure of the stacked mounting structure according to the modified embodiment.
  • FIG. 11D is another perspective view showing the structure of the stacked mounting structure according to the modified embodiment.
  • FIG. 12 is a flow chart showing a flow of a method of manufacturing stacked mounting structure according to a modified embodiment.
  • components to be mounted are mounted on a circuit board and at the same time, from among these components to be mounted, an electroconductive member which is longer than a component having the maximum height is connected upon fixing in perpendicular with the substrate, to an electrode on the circuit board, and after filling a resin in a gap between the electroconductive member and the component to be mounted, only a head portion of the electroconductive member is exposed by grinding.
  • an electroconductive member which is longer than a component having the maximum height is connected upon fixing in perpendicular with the substrate, to an electrode on the circuit board, and after filling a resin in a gap between the electroconductive member and the component to be mounted, only a head portion of the electroconductive member is exposed by grinding.
  • electronic components 26 are mounted on a principal surface of the first substrate 20 .
  • electronic components 36 are mounted on the second substrate 30 .
  • the first substrate 20 and the second substrate 30 are disposed face-to-face.
  • a multi-layer substrate or a substrate with built-in electronic components may be used for the first substrate 20 and the second substrate 30 .
  • Electrodes 22 are provided between the electronic components 26 of the first substrate 20 , and electroconductive members 21 having a substantially circular cylindrical shape are installed on the electrodes 22 .
  • a length of all the electroconductive members 21 is substantially same, and is longer than the maximum height of the electronic component 26 from among the electronic components 26 mounted on the first substrate 20 .
  • an area of an orthogonal cross-section perpendicular to a longitudinal direction of the electroconductive member 21 is same as or less than an area of the electrodes 22 .
  • the electroconductive member 21 can be made easily by cutting out from a wire, when a circular cylindrical shaped component is used. At this time, when a diameter of an end portion of a side of the electroconductive portion 21 , to be mounted on the first substrate 20 is made substantial, the mounting on the first substrate 20 can be carried out easily and assuredly. Whereas, an end portion of the electroconductive member, on the opposite side of the first substrate 20 can also be mounted in a state of a number of electroconductive members joined.
  • circuit layers 24 and 34 are formed in the first substrate 20 and the second substrate 30 respectively.
  • An insulating layer 23 is formed by filling and curing an insulating material (reinforcing member) of a resin around the electroconductive member 21 and the electronic components 26 on the first substrate 20 .
  • an insulating material forcing member
  • the insulating layer 23 only an end portion 21 a of the electroconductive member 21 , toward the second substrate 30 is exposed from a surface (an upper surface) 23 a toward the second substrate 30 .
  • Electrodes 32 are installed on a surface 30 a of the second substrate 30 , facing the first substrate 20 , at positions facing the electroconductive members 21 .
  • the second substrate 30 is joined to a surface of the insulating surface 23 such that the end portions 21 a of the electroconductive members 21 of the first substrate 20 and the electrodes 32 are connected electrically.
  • the number of stacked layers may be increased further by installing electroconductive members (not shown in the diagram) on electrodes (not shown in the diagram) on the exposed surface of the second substrate 30 .
  • the electroconductive member connecting the upper and the lower circuit boards can be installed freely between the electronic components, a wiring design of each substrate is not constrained. Furthermore, the electrode on which the electroconductive member is mounted not being a through hole electrode, a land electrode is not necessary, and the electroconductive members can be disposed at a narrow pitch. Therefore, it is possible to provide a stacked mounting structure having a small area of a principal surface of a substrate. Moreover, since processes such as cutting of through holes and recesses in the substrate are not necessary, it is possible to provide a stacked mounting structure at a low price and having a small area of the principal surface of the substrate.
  • FIG. 3 is a perspective view showing a structure of a second embodiment of a stacked mounting structure according to the present invention, by separating into a first substrate 50 and a second substrate 60 .
  • FIG. 4 is an enlarged perspective view showing a relationship of an electroconductive member and a reinforcing member according to the second embodiment.
  • the second embodiment differs from the first embodiment at a point that, a reinforcing member 57 is formed in a state of a part or whole of a mounting area exposed around an electroconductive member 51 .
  • the first substrate 20 , the electrode 22 , the electronic component 26 , the second substrate 30 , the electronic component 36 in the stacked mounting structure 10 of the first embodiment correspond to the first substrate 50 , the electroconductive member 51 , an electrode 52 , an electronic component 56 , the second substrate 60 , and an electronic component 66 respectively in a stacked mounting structure 40 of the second embodiment.
  • a circuit layer similar to the circuit layers 24 and 34 of the stacked mounting structure 10 of the first embodiment is formed.
  • the electronic components being exposed after forming the reinforcing member the electronic components can be checked immediately before connecting the second substrate, and the number of defective stacked mounting structures can be reduced.
  • the reinforcing member 57 is disposed such that an end portion 51 a toward the second substrate 60 is left around the electroconductive member 51 .
  • a material which is in a liquid format the time of disposing around the electroconductive member 51 , and which is hardened after disposing is to be used.
  • FIG. 5 is a perspective view showing a structure of a third embodiment of a stacked mounting structure according to the present invention.
  • an insulating layer 83 by an insulating material of a resin is formed around electronic components (not shown in the diagram) and electroconductive members 81 on a first substrate 80 , and on a surface of the insulating layer 83 , which is far from the first substrate 80 , wires 88 are formed to connect the electroconductive members 81 .
  • the wires 88 are formed directly on the insulating layer 83 .
  • a method for forming the wires 88 a method such as plating, sputtering, vapor deposition, and printed wiring by an ink-jet or dispensing may be used.
  • a method for forming the wires 88 a method such as plating, sputtering, vapor deposition, and printed wiring by an ink-jet or dispensing may be used.
  • FIG. 11A , FIG. 118 , FIG. 11C , and FIG. 11D show structures of stacked mounting structures according to the modified embodiments.
  • the end portion of the electroconductive member 21 toward the opposite side of the first substrate 20 can be mounted in the state of the number of electroconductive members 21 joined.
  • the state of the number of electroconductive members 21 joined can be formed by forming the electroconductive members 21 by plating of Cu on a substrate 100 , or by carrying out press working on a plate 100 of an electroconductive material such as Cu ( FIG. 11A ).
  • an electroconductive member 21 which is connected is prepared separately from the first substrate 20 , and is connected to the first substrate 20 .
  • FIG. 11B shows a state of a pin-substrate joining.
  • a resin is applied between a portion where the first substrate 20 and the electroconductive members 21 are joined, and cured.
  • a resin may be applied in advance on the first substrate 20 .
  • the portion at which, the first substrate 20 and the electroconductive members 21 are joined is removed by grinding, and each electroconductive member 21 is exposed.
  • a metal film which prevents oxidation of the electroconductive member 21 is formed at the end portion of the exposed electroconductive members 21 .
  • the second substrate 30 is stacked as shown in FIG. 118 , and the substrates 20 and 30 are connected. Accordingly, the stacked mounting structure is formed. Therefore, in a case in which, the height of the electronic component 26 is comparatively high such as from 0.3 mm to 1 mm, by disposing freely the electroconductive members 21 longer than the height of the electronic component 26 on a principal surface 20 a of the first substrate 20 , it is possible to connect the first substrate 20 and the second substrate 30 . Moreover, it is possible to narrow a pitch of connections.
  • the electroconductive members 21 are mounted collectively on the first substrate 20 in the state of the plurality of one end portions joined. Therefore, it is possible to mount the electroconductive members 21 easily. Moreover, since protruding electrodes can be prepared collectively, further narrowing of pitch is possible. As a result, the stacked mounting structure can be easily manufactured to be small.
  • FIG. 6 is a flowchart showing a flow of a method of manufacturing stacked mounting structure according to the fourth embodiment.
  • the method of manufacturing of the fourth embodiment is applicable to embodiments from the first embodiment to the third embodiment, and the modified embodiments, and in the description of the embodiments from the fourth embodiment to the sixth embodiment, reference numerals of the first embodiment are used.
  • the electronic components 26 are mounted on the first substrate 20 (step S 1 ), and at the same time, the electroconductive members 21 are mounted on the electrodes 22 of the first substrate 20 (step S 2 ).
  • a prevalent surface mounting process may be used.
  • the electroconductive members 21 can be mounted by a method in which, a cream solder and flux are supplied on the electrodes 22 by a method such as printing, and the electroconductive members are positioned and fixed on the electrodes 22 by using a mounting instrument and jig, and heated.
  • the electroconductive members 21 may be mounted after the electronic components 26 are mounted (refer to the fifth embodiment or the sixth embodiment), or vice versa.
  • the second substrate 30 is connected by stacking on the first substrate 20 via the bump in the form of a metal film formed on an end surface of the electroconductive member 21 , on the opposite side of the first substrate 20 .
  • wires are formed directly on a surface 23 a of the insulating layer 23 , on the opposite side of the first substrate 20 .
  • the stacked mounting structure being manufactured by the abovementioned steps, it is possible to provide the stacked mounting structure having a small area of a principal surface of the substrate by extremely less number of steps.
  • FIG. 7 is a flowchart showing a flow of a method of manufacturing stacked mounting structure according to a fifth embodiment.
  • steps of mounting electronic components step S 1
  • mounting electroconductive members step S 2
  • resin sealing step S 3
  • the upper surface 23 a of the insulating layer 23 is ground and flattened to be parallel to the principal surface 20 a of the first substrate 20 , as well as, each of the end surfaces 21 a of the electroconductive members 21 , on the opposite side of the first substrate 20 is exposed (step S 4 ).
  • a metal film (UBM layer) is formed on the end surface 21 a of the exposed electroconductive member 21 (step S 5 ).
  • UBM layer a metal film
  • the bump is formed on the metal film which is formed on the end surface 21 a of the exposed electroconductive member 21 (step S 6 ). Solder or gold can be used as a material of bump.
  • the end surface 21 a of the electroconductive member 21 has a structure which makes it easy to connect the second substrate 30 . Consequently, it is possible to provide a stacked mounting structure having a high quality of connection of the first substrate 20 and the second substrate 30 , and small area of the principal surface of the substrate.
  • FIG. 8 is a flowchart showing a flow of a method of manufacturing stacked mounting structure according to a sixth embodiment.
  • FIG. 9 is a diagram of which, a right side is an enlarged perspective view showing a structure of a stacked mounting structure corresponding to steps from Step S 1 to step S 6 in FIG. 8 , and left side is a perspective view showing an assembled state of the stacked mounting structure separated into pieces in the right-side diagram.
  • FIG. 10 is a side view showing a structure of the stacked mounting structure corresponding to steps from step S 1 to step S 6 in FIG. 8 .
  • steps of mounting electronic components step S 1 ), mounting electroconductive members (step S 2 ), resin sealing (step S 3 ), grinding (step S 4 ), UBM layer formation (step S 5 ), and bump formation (step S 6 ) are same as in the fifth embodiment.
  • step S 1 mounting electronic components
  • step S 2 mounting electroconductive members
  • step S 3 resin sealing
  • step S 4 grinding
  • step S 5 UBM layer formation
  • step S 6 bump formation
  • FIG. 12 is a flow chart showing a flow of a method of manufacturing stacked mounting structure according to a modified embodiment. Same reference numerals are assigned to contents which are same as the steps of the embodiments described above, and repeated description of such steps is omitted.
  • the electronic components 26 are mounted on the first substrate 20 (step S 1 ).
  • step S 2 a a state in which, one end portions of some of the electroconductive members 21 are connected is formed.
  • various methods such as forming Cu by plating on the substrate 10 , furthermore, forming the electroconductive members 21 by a method such as press working on a plate 100 of an electroconductive material such as Cu, and plating the end surfaces in a state of the rod-shaped electroconductive members 21 arranged to be aligned on a jig, can be used.
  • the electroconductive members 21 are formed such that the height of the electroconductive member 21 is more than the height of the electronic component 26 .
  • the end portion of the electroconductive member 21 is joined to the electrode of the principal surface 20 a of the first substrate 20 (step S 2 ).
  • step S 2 the electrode of the principal surface 20 a of the first substrate 20
  • a resin is applied between portions at which, the first substrate 20 and the electroconductive members 21 are joined, and cured (step S 3 ).
  • the resin may be applied in advance on the first substrate 20 .
  • a portion at which the first substrate 20 and the electroconductive members 21 are joined is removed by grinding, and each electroconductive member 21 is exposed (step S 4 ).
  • Surrounding of the electroconductive member 21 is reinforced by resin. Therefore, the electroconductive member 21 can be ground stably. Furthermore, the height (length) of the electroconductive members 21 can be arranged precisely by grinding. Therefore, a tolerance of length of the electroconductive member 21 to be used can be widened.
  • the electroconductive member 21 longer than the height of the electronic components 26 can be disposed freely on the principal surface 20 a of the first substrate 20 , and the first substrate 20 and the second substrate 30 can be joined. Moreover, pitch of connections can be narrowed.
  • the electroconductive members 21 are mounted on the first substrate 20 in the state of the plurality of one end portions joined. Therefore, the electroconductive members 21 can be mounted easily. Moreover, since protruding electrodes can be prepared collectively, further narrowing is possible. As a result, the stacked mounting structure can be easily manufactured to be small.
  • the electroconductive members which connect the upper and the lower circuit boards can be disposed freely between the electronic components, wiring design of each substrate is not constrained. Furthermore, the electrodes on which, the electroconductive members are mounted not being through-hole electrode, land electrodes are not required, and the electroconductive members can be disposed with a narrow pitch. Therefore, it is possible to provide a stacked mounting structure having a small area of the principal surface of the substrate.
  • the stacked mounting stricture and the method of manufacturing stacked mounting structure according to the present invention are useful for small sizing of a mounting structure main body, and particularly, are appropriate for highly dense mounting of an image picking unit at a front end of an endoscope.

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  • Engineering & Computer Science (AREA)
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  • Power Engineering (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Combinations Of Printed Boards (AREA)
  • Structures For Mounting Electric Components On Printed Circuit Boards (AREA)
  • Production Of Multi-Layered Print Wiring Board (AREA)
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Cited By (18)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE102014101366B3 (de) * 2014-02-04 2015-05-13 Infineon Technologies Ag Chip-Montage an über Chip hinausstehender Adhäsions- bzw. Dielektrikumsschicht auf Substrat
US20160206186A1 (en) * 2013-09-30 2016-07-21 Olympus Corporation Imaging module and endoscope apparatus
US9918386B2 (en) * 2016-04-18 2018-03-13 Skyworks Solutions, Inc. Surface mount device stacking for reduced form factor
US20180122537A1 (en) * 2015-07-15 2018-05-03 Murata Manufacturing Co., Ltd. Electronic component
US10062670B2 (en) 2016-04-18 2018-08-28 Skyworks Solutions, Inc. Radio frequency system-in-package with stacked clocking crystal
US10269769B2 (en) 2016-04-18 2019-04-23 Skyworks Solutions, Inc. System in package with vertically arranged radio frequency componentry
US10276521B2 (en) 2016-12-29 2019-04-30 Skyworks Solutions, Inc. Front end systems and related devices, integrated circuits, modules, and methods
US10297576B2 (en) 2016-04-18 2019-05-21 Skyworks Solutions, Inc. Reduced form factor radio frequency system-in-package
US10515924B2 (en) 2017-03-10 2019-12-24 Skyworks Solutions, Inc. Radio frequency modules
US20220157659A1 (en) * 2020-11-18 2022-05-19 Disco Corporation Wafer manufacturing method and laminated device chip manufacturing method
US20220157669A1 (en) * 2020-11-18 2022-05-19 Disco Corporation Wafer manufacturing method and laminated device chip manufacturing method
US20220157658A1 (en) * 2020-11-18 2022-05-19 Disco Corporation Wafer manufacturing method and laminated device chip manufacturing method
US20220157668A1 (en) * 2020-11-18 2022-05-19 Disco Corporation Wafer manufacturing method and laminated device chip manufacturing method
CN117135829A (zh) * 2023-08-30 2023-11-28 西南石油大学 一种基板自动裁切打磨堆叠卸载一体化机
US11984857B2 (en) 2015-12-30 2024-05-14 Skyworks Solutions, Inc. Impedance transformation circuit for amplifier
US12087589B2 (en) 2021-03-09 2024-09-10 Disco Corporation Method of manufacturing wafer and method of manufacturing stacked device chip
US12198990B2 (en) 2020-11-18 2025-01-14 Disco Corporation Wafer manufacturing method and laminated device chip manufacturing method
US12300545B2 (en) 2020-11-18 2025-05-13 Disco Corporation Wafer manufacturing method and laminated device chip manufacturing method

Families Citing this family (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP5449237B2 (ja) * 2011-03-09 2014-03-19 古河電気工業株式会社 基板および基板の製造方法
JP2014123638A (ja) * 2012-12-21 2014-07-03 Murata Mfg Co Ltd 部品モジュール
KR20150092881A (ko) * 2014-02-06 2015-08-17 엘지이노텍 주식회사 인쇄회로기판, 패키지 기판 및 이의 제조 방법
JP6274135B2 (ja) * 2015-03-12 2018-02-07 株式会社村田製作所 コイルモジュール
DE102017212739A1 (de) * 2017-07-25 2019-01-31 Siemens Aktiengesellschaft Halbleiterbauteil sowie Verfahren zu dessen Herstellung
CN109714910B (zh) * 2019-01-29 2020-08-14 维沃移动通信有限公司 一种多层电路板的制造方法、多层电路板和移动终端

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2001144399A (ja) * 1999-11-17 2001-05-25 Sony Corp 基板間接続部材、電子回路基板、電子回路装置及び電子回路装置の製造方法
US7129110B1 (en) * 1999-08-23 2006-10-31 Rohm Co., Ltd. Semiconductor device and method for manufacturing the same

Family Cites Families (15)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH05102149A (ja) * 1991-10-04 1993-04-23 Sharp Corp 半導体装置の製造方法
US5334804A (en) * 1992-11-17 1994-08-02 Fujitsu Limited Wire interconnect structures for connecting an integrated circuit to a substrate
US5977640A (en) * 1998-06-26 1999-11-02 International Business Machines Corporation Highly integrated chip-on-chip packaging
KR100290784B1 (ko) * 1998-09-15 2001-07-12 박종섭 스택 패키지 및 그 제조방법
JP2000323806A (ja) * 1999-05-13 2000-11-24 Matsushita Electric Ind Co Ltd バンプ付セラミック回路基板及びその製造方法
JP3833859B2 (ja) * 1999-10-14 2006-10-18 ローム株式会社 半導体装置およびその製造方法
US6448106B1 (en) * 1999-11-09 2002-09-10 Fujitsu Limited Modules with pins and methods for making modules with pins
JP4320492B2 (ja) * 1999-12-08 2009-08-26 株式会社デンソー 半導体素子の実装構造および半導体素子の実装構造の製造方法
JP2002134653A (ja) * 2000-10-23 2002-05-10 Matsushita Electric Ind Co Ltd 半導体装置とその製造方法
JP4380088B2 (ja) * 2001-05-31 2009-12-09 株式会社デンソー 積層回路モジュールの製造方法
JP2006165252A (ja) 2004-12-07 2006-06-22 Shinko Electric Ind Co Ltd チップ内蔵基板の製造方法
KR100734264B1 (ko) * 2005-06-16 2007-07-02 삼성전자주식회사 집적회로 패키지와 집적회로 모듈
JP4635202B2 (ja) * 2005-07-20 2011-02-23 国立大学法人九州工業大学 両面電極パッケージの製造方法
JP3960479B1 (ja) * 2006-07-07 2007-08-15 国立大学法人九州工業大学 両面電極構造の半導体装置の製造方法
JP4793155B2 (ja) * 2006-07-31 2011-10-12 エプソントヨコム株式会社 プリント基板、プリント基板ユニット、表面実装型高安定圧電発振器、及びプリント基板の加工方法

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7129110B1 (en) * 1999-08-23 2006-10-31 Rohm Co., Ltd. Semiconductor device and method for manufacturing the same
JP2001144399A (ja) * 1999-11-17 2001-05-25 Sony Corp 基板間接続部材、電子回路基板、電子回路装置及び電子回路装置の製造方法

Cited By (41)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US10617285B2 (en) * 2013-09-30 2020-04-14 Olympus Corporation Imaging module with multi-layer substrate and endoscope apparatus
US20160206186A1 (en) * 2013-09-30 2016-07-21 Olympus Corporation Imaging module and endoscope apparatus
US12218098B2 (en) 2014-02-04 2025-02-04 Infineon Technologies Ag Chip assembling on adhesion layer or dielectric layer, extending beyond chip, on substrate
US10056348B2 (en) 2014-02-04 2018-08-21 Infineon Technologies Ag Chip assembling on adhesion layer or dielectric layer, extending beyond chip, on substrate
US11309277B2 (en) 2014-02-04 2022-04-19 Infineon Technologies Ag Chip assembling on adhesion layer or dielectric layer, extending beyond chip, on substrate
DE102014101366B3 (de) * 2014-02-04 2015-05-13 Infineon Technologies Ag Chip-Montage an über Chip hinausstehender Adhäsions- bzw. Dielektrikumsschicht auf Substrat
US10734351B2 (en) 2014-02-04 2020-08-04 Infineon Technologies Ag Chip assembling on adhesion layer or dielectric layer, extending beyond chip, on substrate
US20180122537A1 (en) * 2015-07-15 2018-05-03 Murata Manufacturing Co., Ltd. Electronic component
US11984857B2 (en) 2015-12-30 2024-05-14 Skyworks Solutions, Inc. Impedance transformation circuit for amplifier
US11088112B2 (en) 2016-04-18 2021-08-10 Skyworks Solutions, Inc. Radio frequency system-in-package with stacked clocking crystal
US10269769B2 (en) 2016-04-18 2019-04-23 Skyworks Solutions, Inc. System in package with vertically arranged radio frequency componentry
US10446524B2 (en) 2016-04-18 2019-10-15 Skyworks Solutions, Inc. Radio frequency system-in-package with stacked clocking crystal
US10062670B2 (en) 2016-04-18 2018-08-28 Skyworks Solutions, Inc. Radio frequency system-in-package with stacked clocking crystal
US10535637B2 (en) 2016-04-18 2020-01-14 Skyworks Solutions, Inc. Methods to form reduced form factor radio frequency system-in-package
US10548223B2 (en) 2016-04-18 2020-01-28 Skyworks Solutions, Inc. Surface mount device stacking for reduced form factor
US10297576B2 (en) 2016-04-18 2019-05-21 Skyworks Solutions, Inc. Reduced form factor radio frequency system-in-package
US10362678B2 (en) 2016-04-18 2019-07-23 Skyworks Solutions, Inc. Crystal packaging with conductive pillars
US9918386B2 (en) * 2016-04-18 2018-03-13 Skyworks Solutions, Inc. Surface mount device stacking for reduced form factor
US10231341B2 (en) 2016-04-18 2019-03-12 Skyworks Solutions, Inc. Surface mount device stacking for reduced form factor
US11037893B2 (en) 2016-12-29 2021-06-15 Skyworks Solutions, Inc. Selectively shielded radio frequency module with linearized low noise amplifier
US11864295B2 (en) 2016-12-29 2024-01-02 Skyworks Solutions, Inc. Selectively shielded radio frequency module with multi-mode stacked power amplifier stage
US12279353B2 (en) 2016-12-29 2025-04-15 Skyworks Solutions, Inc. Packaged module with antenna and front end integrated circuit
US10276521B2 (en) 2016-12-29 2019-04-30 Skyworks Solutions, Inc. Front end systems and related devices, integrated circuits, modules, and methods
US10629553B2 (en) 2016-12-29 2020-04-21 Skyworks Solutions, Inc. Front end systems with linearized low noise amplifier and injection-locked oscillator power amplifier stage
US11576248B2 (en) 2016-12-29 2023-02-07 Skyworks Solutions, Inc. Front end systems with multi-mode power amplifier stage and overload protection of low noise amplifier
US11043466B2 (en) 2017-03-10 2021-06-22 Skyworks Solutions, Inc. Radio frequency modules
US10515924B2 (en) 2017-03-10 2019-12-24 Skyworks Solutions, Inc. Radio frequency modules
US11682649B2 (en) 2017-03-10 2023-06-20 Skyworks Solutions, Inc. Radio frequency modules
US20220157658A1 (en) * 2020-11-18 2022-05-19 Disco Corporation Wafer manufacturing method and laminated device chip manufacturing method
US11764115B2 (en) * 2020-11-18 2023-09-19 Disco Corporation Wafer manufacturing method and laminated device chip manufacturing method
US11764114B2 (en) * 2020-11-18 2023-09-19 Disco Corporation Wafer manufacturing method and laminated device chip manufacturing method
US11854891B2 (en) * 2020-11-18 2023-12-26 Disco Corporation Wafer manufacturing method and laminated device chip manufacturing method
US11756831B2 (en) * 2020-11-18 2023-09-12 Disco Corporation Wafer manufacturing method and laminated device chip manufacturing method
US20220157668A1 (en) * 2020-11-18 2022-05-19 Disco Corporation Wafer manufacturing method and laminated device chip manufacturing method
US12198990B2 (en) 2020-11-18 2025-01-14 Disco Corporation Wafer manufacturing method and laminated device chip manufacturing method
US20220157669A1 (en) * 2020-11-18 2022-05-19 Disco Corporation Wafer manufacturing method and laminated device chip manufacturing method
US20220157659A1 (en) * 2020-11-18 2022-05-19 Disco Corporation Wafer manufacturing method and laminated device chip manufacturing method
US12300545B2 (en) 2020-11-18 2025-05-13 Disco Corporation Wafer manufacturing method and laminated device chip manufacturing method
US12087589B2 (en) 2021-03-09 2024-09-10 Disco Corporation Method of manufacturing wafer and method of manufacturing stacked device chip
CN117135829A (zh) * 2023-08-30 2023-11-28 西南石油大学 一种基板自动裁切打磨堆叠卸载一体化机
US12275083B2 (en) 2023-08-30 2025-04-15 Southwest Petroleum University Integrated machine for automatic cutting, polishing, stacking and unloading of substrates

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EP2194576B1 (en) 2017-12-06
EP2194576A1 (en) 2010-06-09
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CN101803020B (zh) 2012-05-23
EP2194576A4 (en) 2010-10-06

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