TWI823332B - 拼接式微型發光二極體顯示面板 - Google Patents
拼接式微型發光二極體顯示面板 Download PDFInfo
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Abstract
一種拼接式微型發光二極體顯示面板,包括彼此拼接的多個電路板以及多個微型發光二極體模組。每一電路板包括至少一驅動晶片。微型發光二極體模組彼此分離地配置於每一電路板上並與驅動晶片電性連接。每一微型發光二極體模組包括陣列設置的多個發光二極體單元。在每一電路板上,驅動晶片驅動微型發光二極體模組的發光二極體單元發光。在相鄰兩電路板上的相鄰兩發光二極體單元之間具有一第一間距,在每一微型發光二極體模組上的相鄰兩發光二極體單元之間具有一第二間距,且第一間距小於第二間距。
Description
本發明是有關於一種顯示面板,且特別是有關於一種拼接式微型發光二極體顯示面板。
在現有的技術中,顯示螢幕的拼接是將紅色發光二極體、綠色發光二極體及藍色發光二極體一顆一顆的封裝後,在一顆一顆的打件至驅動電路板上。因此,尺寸與間距均有其限制,且接合良率也不高。近年來,亦有微型發光二極體搭配積體電路(Integrated Circuit,IC)的封裝組合,但接合上仍耗時。
本發明提供一種拼接式微型發光二極體顯示面板,其是透過將較小尺寸的微型發光二極體模組組合成較大尺寸的顯示面板,可減少轉移時間,且可提高接合良率及具有較佳的顯示品質。
本發明的拼接式微型發光二極體顯示面板,包括彼此拼接的多個電路板以及多個微型發光二極體模組。每一電路板包括至少一驅動晶片(driver IC)。微型發光二極體模組彼此分離地配置於每一電路板上並與驅動晶片電性連接。每一微型發光二極體模組包括陣列設置的多個發光二極體單元。在每一電路板上,驅動晶片驅動微型發光二極體模組的發光二極體單元發光。在相鄰兩電路板上的相鄰兩發光二極體單元之間具有一第一間距,在每一微型發光二極體模組上的相鄰兩發光二極體單元之間具有一第二間距,且第一間距小於第二間距。
在本發明的一實施例中,上述的第一間距與第二間距的比值小於1且大於等於0.85。
在本發明的一實施例中,上述的微型發光二極體模組與驅動晶片分別設置於每一電路板的兩相反側。
在本發明的一實施例中,上述在相鄰兩電路板上的相鄰兩微型發光二極體模組之間具有一第三間距,且第三間距小於第一間距。
在本發明的一實施例中,上述的拼接式微型發光二極體顯示面板還包括多個光遮蔽部,配置於電路板上,且位於微型發光二極體模組之間。
在本發明的一實施例中,上述的每一光遮蔽部的一第一高度小於等於每一微型發光二極體模組的一第二高度。
在本發明的一實施例中,上述的拼接式微型發光二極體顯示面板還包括多個連接件,配置於微型發光二極體模組與電路板之間。微型發光二極體模組透過連接件電性連接且固定至電路板。部分連接件突出於對應的微型發光二極體模組邊緣且被對應的光遮蔽部覆蓋。
在本發明的一實施例中,上述的每一微型發光二極體模組還包括一多層線路層、多個微型發光二極體以及一透光平坦層。多層線路層包括一頂部線路層與一底部線路層,底部線路層包括多個接墊。微型發光二極體配置於多層線路層的頂部線路層上,且定義出發光二極體單元。每一發光二極體單元包括彼此分離的三個微型發光二極體,且每一發光二極體單元於底部線路層上的正投影完全重疊於對應的接墊內。透光平坦層覆蓋多層線路層的頂部線路層與微型發光二極體。
在本發明的一實施例中,上述的多層線路層更包括至少一內部線路層以及多個介電層。內部線路層位於頂部線路層與底部線路層之間,而介電層位於頂部線路層、內部線路層以及底部線路層之間。
在本發明的一實施例中,上述的多層線路層更包括多個導電通孔,其中頂部線路層、內部線路層與底部線路層透過導電通孔電性連接。導電通孔於底部線路層上的正投影不重疊於微型發光二極體於底部線路層上的正投影。
在本發明的一實施例中,上述的內部線路層包括多條線路,每一發光二極體單元於底部線路層上的正投影完全重疊於對應的線路內。
在本發明的一實施例中,上述的頂部線路層、內部線路層或底部線路層的線路圖案密度大於50%。
在本發明的一實施例中,上述的每一微型發光二極體模組更包括一絕緣層,配置於多層線路層的底部線路層上,且暴露出部分接墊。
在本發明的一實施例中,上述的每一微型發光二極體模組更包括一表面處理層,配置於絕緣層所暴露出的接墊上。
在本發明的一實施例中,上述的接墊分別對應連接件,且連接件延伸位於絕緣層與電路板之間。
在本發明的一實施例中,上述的每一微型發光二極體模組更包括一光阻擋層,配置於多層線路層的頂部線路層上,且包括多個阻擋部。阻擋部與發光二極體單元呈交替排列。
在本發明的一實施例中,上述的光阻擋層的厚度大於每一微型發光二極體的厚度。
在本發明的一實施例中,上述的拼接式微型發光二極體顯示面板還包括一透光膠層與多個光遮蔽部。光遮蔽部配置於電路板上且位於微型發光二極體模組之間。透光膠層覆蓋於光遮蔽部上。
在本發明的一實施例中,上述的光遮蔽部的高度不高於光阻擋層的高度且不低於發光二極體單元的高度。
基於上述,在本發明的拼接式微型發光二極體顯示面板中,微型發光二極體模組是彼此分離地配置於拼接在一起的每一電路板上,其中在相鄰兩電路板上的相鄰兩發光二極體單元之間的第一間距小於在每一微型發光二極體模組上的相鄰兩發光二極體單元之間的第二間距。藉此,將較小尺寸的微型發光二極體模組組合成較大尺寸的顯示面板,可減少轉移時間,且可提高接合良率,使本發明的拼接式微型發光二極體顯示面板可具有較佳的顯示品質。
為讓本發明的上述特徵和優點能更明顯易懂,下文特舉實施例,並配合所附圖式作詳細說明如下。
圖1A是依照本發明的一實施例的一種拼接式微型發光二極體顯示面板的示意圖。圖1B是圖1A的區域A中的局部放大示意圖。圖2是圖1A的拼接式微型發光二極體顯示面板的一個微型發光二極體模組的示意圖。
請先同時參考圖1A與圖1B,在本實施例中,拼接式微型發光二極體顯示面板10a包括彼此拼接的多個電路板(示意地繪示二個電路板20a、20b)以及多個微型發光二極體模組(示意地繪示四個微型發光二極體模組100a)。每一電路板20a、20b包括至少一驅動晶片(示意地於每一電路板20a、20b 上繪示一個驅動晶片22a、22b)。微型發光二極體模組100a彼此分離地配置於每一電路板20a、20b上並與驅動晶片22a、22b電性連接,其中每一微型發光二極體模組100a包括陣列設置的多個發光二極體單元U。在每一電路板20a、20b上,驅動晶片22a、22b驅動微型發光二極體模組100a的發光二極體單元U發光。特別是,在相鄰兩電路板20a、20b上相鄰的一個微型發光二極體模組100a1中的一個發光二極體單元U與另一個微型發光二極體模組100a2中的另一個發光二極體單元U之間具有一第一間距G1,而在每一微型發光二極體模組100a上相鄰的兩發光二極體單元U之間具有一第二間距G2(即,畫素間距,與顯示面板的解析度有關),且第一間距G1小於第二間距G2。此處,第一間距G1例如為250微米至400微米,而第二間距G2例如為300微米至450微米。
電路板20a、20b拼接由於製程公差較大,拼接距離差異較大,會使得在拼接縫上的畫素間距跑掉。若拼接縫上的畫素間距大於正常畫素間距,則人眼對拼接縫的感受會更明顯。因此,本發明在考慮製程公差的前提下,直接將拼接間距縮小,讓第一間距G1小於第二間距G2,利用後續畫面調校,可令人眼對拼接縫的感知降低,使整體拼接式微型發光二極體顯示面板10a的畫面品質更好。更具體來說,第一間距G1與第二間距G2的比值,較佳地,小於1且大於等於0.85。意即,第一間距G1與第二間距G2的大小落差也不能太大,否則畫面的品質也會受影響,甚至讓人眼感受到拼接痕跡。值得一提的是,現有實驗測得比值≥0.85的觀看品質是較佳地。
更進一步來說,在相鄰兩電路板20a、20b上的相鄰兩微型發光二極體模組100a1、100a2之間具有一第三間距G3,且第三間距G3小於第一間距G1。此處,第一間距G1例如為100微米至150微米。再者,為了減少微型發光二極體模組100a1、100a2間的干擾以避免人眼感受到縫隙,本實施例的拼接式微型發光二極體顯示面板10a還包括多個光遮蔽部30,其中光遮蔽部30配置於電路板20a、20b上,且位於微型發光二極體模組100a1、100a2之間。較佳地,每一光遮蔽部30的一第一高度H1小於等於每一微型發光二極體模組100a的一第二高度H2。
此外,本實施例的拼接式微型發光二極體顯示面板10a還包括多個連接件40,其中連接件40配置於微型發光二極體模組100a與電路板20a、20b之間。微型發光二極體模組100a透過連接件40電性連接且固定至電路板20a、20b。部分連接件40突出於對應的微型發光二極體模組100a邊緣且被對應的光遮蔽部30覆蓋。此處,微型發光二極體模組100a透過連接件40電性連接至電路板20a、20b,其中連接件40的材質例如是會反光的金屬材料,但並不以此為限。更進一步來說,連接件40例如是銦凸塊或錫凸塊,所以微型發光二極體模組100a壓上去後會擴散而突出於對應的微型發光二極體模組100a邊緣,此時,光遮蔽部30會覆蓋在連接件40突出100a的邊緣(甚至爬到微型發光二極體模組100a的側壁上)。值得一提的是,位於相鄰兩微型發光二極體模組100a1、100a2之間的光遮蔽部30,除了可擋住微型發光二極體模組100a間發光二極體單元U的干擾以及填縫使人眼比較不會感受到縫隙之外,亦可遮住外露且會反光的連接件40,以避免影響可視度。
此外,請再參考圖1A,本實施例的微型發光二極體模組100a與驅動晶片22a、22b分別設置於每一電路板20a、20b的兩相反側,即分別設置在上表面21與下表面23上。須說明的是,本實施例的驅動晶片22a、22b可控制多個在同個電路板20a、20b上的微型發光二極體模組100a,且獨立控制每個微型發光二極體120R、120G、120B 發光。於其他實施例中,每個電路板20a、20b亦可包括多個驅動晶片,同樣分別控制在同個電路板20a、20b上的多個微型發光二極體模組100a。
進一步來說,請參考圖2,在本實施例中,每一微型發光二極體模組100a還包括一多層線路層110、多個微型發光二極體120R、120G、120B以及一透光平坦層130。多層線路層110包括一頂部線路層112與一底部線路層114,而底部線路層114包括多個接墊115。微型發光二極體120R、120G、120B配置於多層線路層110的頂部線路層112上,且定義出發光二極體單元U。每一發光二極體單元U包括彼此分離的三個微型發光二極體120R、120G、120B。此處,每一發光二極體單元U中的三個微型發光二極體120R、120G、120B分別為一紅色微型發光二極體、一綠色微型發光二極體以及一藍色微型發光二極體。特別是,每一發光二極體單元U於底部線路層114上的正投影完全重疊於對應的接墊115內,可具有較佳的平坦度。透光平坦層130覆蓋多層線路層110的頂部線路層112與微型發光二極體120R、120G、120B。
更具體來說,多層線路層110還包括至少一內部線路層(示意地繪示一層內部線路層116)以及多個介電層(示意地繪示二層介電層118)。內部線路層116位於頂部線路層112與底部線路層114之間,而介電層118位於頂部線路層112、內部線路層116以及底部線路層114之間。也就是說,頂部線路層112、內部線路層116以及底部線路層114透過介電層118來電性隔離。特別是,本實施例的頂部線路層112、內部線路層116以及底部線路層114於多層線路層110中所佔的圖案密度至少大於50%。頂部線路層112以及內部線路層116在每一層別中所佔的線路圖案密度至少大於50%,較佳可達80%,可令每一層別的平坦度更平,利於後續微型發光二極體120R、120G、120B的覆晶接合製程、提高良率。另外考量製程限制,例如曝光/蝕刻的線寬、或各層間寄生電容的產生等等。需注意的是,線路圖案的密度以不大於90%為佳。
再者,本實施例的多層線路層110還包括多個導電通孔119,其中頂部線路層、內部線路層116與底部線路層114透過導電通孔119電性連接。特別是,導電通孔119於底部線路層114上的正投影不重疊於微型發光二極體120R、120G、120B於底部線路層114上的正投影。也就是說,以俯視觀之,微型發光二極體120R、120G、120B的位置與導電通孔119的位置完全不重疊。更進一步來說,本實施例的內部線路層116包括多條線路117,其中每一發光二極體單元U於底部線路層114上的正投影也完全重疊於對應的線路117內。
此外,在本實施例中,微型發光二極體模組100a還包括一絕緣層140,其中絕緣層140配置於多層線路層110的底部線路層114上,且暴露出部分接墊115。進一步來說,絕緣層140是覆蓋每一接墊115的周圍表面,且暴露出接墊115的中間部分。另外,本實施例的微型發光二極體模組100a還包括一表面處理層150,其中表面處理層150配置於絕緣層140所暴露出的接墊115上。較佳地,表面處理層150的材質例如是化鎳浸金(Electroless Nickel and Immersion Gold,ENIG),可有效地避免或減少被絕緣層140所暴露出的接墊115產生氧化現象。此處,接墊115分別對應連接件40,意即一個接墊115對應一個連接件40,且連接件40延伸位於絕緣層140與電路板20a、20b之間。
簡言之,本實施例是將較小尺寸的微型發光二極體模組100a組合成較大尺寸的拼接式微型發光二極體顯示面板10,可減少轉移時間,且可提高接合良率及具有較佳的顯示品質。
在此必須說明的是,下述實施例沿用前述實施例的元件標號與部分內容,其中採用相同的標號來表示相同或近似的元件,並且省略了相同技術內容的說明。關於省略部分的說明可參照前述實施例,下述實施例不再重複贅述。
圖3是本發明的另一實施例的一種拼接式微型發光二極體顯示面板的示意圖。請同時參考圖3、圖2以及圖1A,本實施例的微型發光二極體顯示模組100b與圖2的微型發光二極體顯示模組100a相似,兩者的差異在於:在本實施例中,拼接式微型發光二極體顯示面板10b還包括多個透光基板160,配置於透光平坦層130上,其中透光平坦層130位於透光基板160與多層線路層110之間。此外,本實施例的微型發光二極體模組100b還包括一光阻擋層170,配置於多層線路層110的頂部線路層112上,且包括多個阻擋部172。阻擋部172與發光二極體單元U呈交替排列。較佳地,光阻擋層170的厚度T2大於每一微型發光二極體120R、120G、120B的厚度T1。舉例來說,微型發光二極體120R、120G、120B的厚度T1例如是小於10微米,而光阻擋層170的厚度T2例如是20微米。透光基板160例如是玻璃蓋板、光學膜等,利用貼合技術蓋在各電路板20a、20b上的所有微型發光二極體模組100b上,可以改善微型發光二極體模組100b間隙漏光、導致觀看品質不佳的問題。
由於本實施例的拼接式微型發光二極體顯示面板10b包括透光基板160,例如是光學膜片,可大面積地覆蓋電路板20a、20b上所有的微型發光二極體模組100b,可讓微型發光二極體顯示模組100b之間的縫隙較不明顯,進而可提升拼接式微型發光二極體顯示面板10b的觀看品質。或者,於另一實施例,透光基板160例如是玻璃蓋板,可增強拼接式微型發光二極體顯示面板10b的結構強度且可提高製程良率。此外,本實施例的微型發光二極體顯示模組100b還包括光阻擋層170,可使每一發光二極體單元U具有較佳的出光效果,而使微型發光二極體顯示模組100b具有較佳的顯示效果,進而可使得拼接式微型發光二極體顯示面板10b具有較佳的顯示品質。
圖4是本發明的另一實施例的一種拼接式微型發光二極體顯示面板的示意圖。請同時參考圖4以及圖3,本實施例的拼接式微型發光二極體顯示面板10c與圖3的拼接式微型發光二極體顯示面板10b相似,兩者的主要差異在於:在本實施例中,拼接式微型發光二極體顯示面板10c更具有一透光膠層31,覆蓋於光遮蔽部30’上。特別是,本實施例中的光遮蔽部30’的高度不高於微型發光二極體顯示模組100c中的光阻擋層170的高度,較佳地,則不低於發光二極體單元U的高度。拼接縫中的光遮蔽部30’若太高,在側視觀看時,容易看到微型發光二極體顯示模組100c的界線而影響觀看品質;反之,若光遮蔽部30’過低,則無法改善發光二極體單元U間的顏色干擾。另一差異點在於:本實施例的表面處理層150’是完全設置於接墊115表面,而絕緣層140則覆蓋於表面處理層150’的部分表面。此結構設計可以直接在接墊115上反應化鍍表面處理層150’,之後再進行絕緣層140的設置,可簡化製程步驟、提高製程良率。
綜上所述,在本發明的拼接式微型發光二極體顯示面板中,微型發光二極體模組是彼此分離地配置於拼接在一起的每一電路板上,其中在相鄰兩電路板上的相鄰兩發光二極體單元之間的第一間距小於在每一微型發光二極體模組上的相鄰兩發光二極體單元之間的第二間距。藉此,將較小尺寸的微型發光二極體模組組合成較大尺寸的顯示面板,可減少轉移時間,且可提高接合良率,使本發明的拼接式微型發光二極體顯示面板可具有較佳的顯示品質。
雖然本發明已以實施例揭露如上,然其並非用以限定本發明,任何所屬技術領域中具有通常知識者,在不脫離本發明的精神和範圍內,當可作些許的更動與潤飾,故本發明的保護範圍當視後附的申請專利範圍所界定者為準。
10a、10b、10c:拼接式微型發光二極體顯示面板
20a、20b:電路板
21:上表面
22a、22b:驅動晶片
23:下表面
30、30’:光遮蔽部
31:透光膠層
40:連接件
100a、100a1、100a2、100b、100c:微型發光二極體模組
110:多層線路層
112:頂部線路層
114:底部線路層
115:接墊
116:內部線路層
117:線路
118:介電層
119:導電通孔
120R、120G、120B:微型發光二極體
130:透光平坦層
140:絕緣層
150、150’:表面處理層
160:透光基板
170:光阻擋層
172:阻擋部
A:區域
G1:第一間距
G2:第二間距
G3:第三間距
H1:第一高度
H2:第二高度
T1、T2:厚度
U:發光二極體單元
圖1A是依照本發明的一實施例的一種拼接式微型發光二極體顯示面板的示意圖。
圖1B是圖1A的區域A中的局部放大示意圖。
圖2是圖1A的拼接式微型發光二極體顯示面板的一個微型發光二極體模組的示意圖。
圖3是本發明的另一實施例的一種拼接式微型發光二極體顯示面板的示意圖。
圖4是本發明的另一實施例的一種拼接式微型發光二極體顯示面板的示意圖。
20a、20b:電路板
30:光遮蔽部
40:連接件
100a、100a1、100a2:微型發光二極體模組
A:區域
G1:第一間距
G2:第二間距
G3:第三間距
U:發光二極體單元
Claims (14)
- 一種拼接式微型發光二極體顯示面板,包括: 彼此拼接的多個電路板,各該電路板包括至少一驅動晶片;以及 多個微型發光二極體模組,彼此分離地配置於各該電路板上並與該至少一驅動晶片電性連接,各該微型發光二極體模組包括陣列設置的多個發光二極體單元,在各該電路板上,該至少一驅動晶片驅動該些微型發光二極體模組的該些發光二極體單元發光,其中在相鄰兩該些電路板上的相鄰兩該些發光二極體單元之間具有一第一間距,在各該微型發光二極體模組上的相鄰兩該些發光二極體單元之間具有一第二間距,且該第一間距小於該第二間距,其中各該微型發光二極體模組更包括: 一多層線路層,包括一頂部線路層與一底部線路層,該底部線路層包括多個接墊; 多個微型發光二極體,配置於該多層線路層的該頂部線路層上,且定義出該些發光二極體單元,其中各該發光二極體單元包括彼此分離的三個該些微型發光二極體;以及 一透光平坦層,覆蓋該多層線路層的該頂部線路層與該些微型發光二極體。
- 如請求項1所述的拼接式微型發光二極體顯示面板,其中該第一間距與該第二間距的比值小於1且大於等於0.85。
- 如請求項1所述的拼接式微型發光二極體顯示面板,其中該些微型發光二極體模組與該至少一驅動晶片分別設置於各該電路板的兩相反側。
- 如請求項1所述的拼接式微型發光二極體顯示面板,其中在相鄰兩該些電路板上的相鄰兩該些微型發光二極體模組之間具有一第三間距,且該第三間距小於該第一間距。
- 如請求項1所述的拼接式微型發光二極體顯示面板,其中該多層線路層更包括至少一內部線路層以及多個介電層,該至少一內部線路層位於該頂部線路層與該底部線路層之間,而該些介電層位於該頂部線路層、該至少一內部線路層以及該底部線路層之間。
- 如請求項5所述的拼接式微型發光二極體顯示面板,其中該多層線路層更包括多個導電通孔,該頂部線路層、該至少一內部線路層與該底部線路層透過該些導電通孔電性連接,且該些導電通孔於該底部線路層上的正投影不重疊於該些微型發光二極體於該底部線路層上的正投影。
- 如請求項5所述的拼接式微型發光二極體顯示面板,其中該至少一內部線路層包括多條線路,各該發光二極體單元於該底部線路層上的正投影完全重疊於同樣的膜層結構。
- 如請求項5所述的拼接式微型發光二極體顯示面板,其中該頂部線路層、該至少一內部線路層或該底部線路層的線路圖案密度大於50%。
- 如請求項1所述的拼接式微型發光二極體顯示面板,其中各該微型發光二極體模組更包括: 一絕緣層,配置於該多層線路層的該底部線路層上,且暴露出部分該些接墊。
- 如請求項1所述的拼接式微型發光二極體顯示面板,其中各該微型發光二極體模組更包括: 一光阻擋層,配置於該多層線路層的該頂部線路層上,且包括多個阻擋部,其中該些阻擋部與該些發光二極體單元呈交替排列。
- 如請求項10所述的拼接式微型發光二極體顯示面板,其中該光阻擋層的厚度大於各該微型發光二極體的厚度。
- 如請求項11所述的拼接式微型發光二極體顯示面板,更包括: 一透光膠層與多個光遮蔽部,該些光遮蔽部配置於該些電路板上且位於該些微型發光二極體模組之間,該透光膠層覆蓋於該些光遮蔽部上。
- 如請求項12所述的拼接式微型發光二極體顯示面板,其中該些光遮蔽部的高度不高於該些光阻擋層的高度且不低於該些發光二極體單元的高度。
- 如請求項1所述的拼接式微型發光二極體顯示面板,其中各該發光二極體單元於該底部線路層上的正投影完全重疊於對應的該接墊內。
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