TWI613787B - 半導體模組和形成半導體模組的方法 - Google Patents
半導體模組和形成半導體模組的方法 Download PDFInfo
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- TWI613787B TWI613787B TW101146143A TW101146143A TWI613787B TW I613787 B TWI613787 B TW I613787B TW 101146143 A TW101146143 A TW 101146143A TW 101146143 A TW101146143 A TW 101146143A TW I613787 B TWI613787 B TW I613787B
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Abstract
說明電氣模組以及形成模組與操作模組的方法。模組包含電容器、第一切換裝置以及第二切換裝置。電氣模組進一步包含諸如DBC基板的基板,基板包含在第一金屬層與第二金屬層之間的絕緣層,且基板可包含與彼此互相堆疊的多層DBC基板。第一金屬層包含第一部分與第二部分,第一部分與第二部分藉由溝槽阻隔自彼此,溝槽係形成為穿過兩部分之間的第一金屬層。第一切換裝置與第二切換裝置位於第一金屬層上,電容器的第一端點電氣連接至第一金屬層的第一部分,電容器的第二端點電氣連接至第一金屬層的第二部分,且電容器延伸於溝槽之上。
Description
本發明相關於由半導體電氣裝置形成的電氣模組的配置。
諸如橋接電路(bridge circuits)的功率切換電路被常見地使用於各種應用中。第1圖圖示經配置以驅動馬達的先前技術三相橋接電路10的電路示意圖。電路10中的三個半橋接15、25與35之每一者包含兩個電晶體(41-46),電晶體能夠阻擋第一方向中的電壓,且能夠傳導第一方向中的電流(或可選地,兩方向中的電流)。在橋接電路10所採用的電晶體僅能夠於一個方向傳導電流的應用中(例如在使用矽IGBT時),可將反並聯二極體(未圖示)連接至電晶體41-46之每一者。電晶體41-46之每一者在被偏壓於OFF狀態中時,能夠阻擋至少如電路10高壓(HV)源11一般大的電壓。換言之,在電晶體41-46之任意者的閘極-源極電壓VGS小於電晶體臨限電壓Vth時,在汲極-源極電壓VDS(亦即汲極相對於源極的電壓)位於0V與HV之間時,沒有大量電流流
動通過電晶體。在偏壓於ON狀態中時(亦即VGS大於電晶體臨限電壓時),電晶體41-46之每一者能夠傳導對於電晶體所被使用之應用為足夠高的電流。電晶體41-46可為增強模式(或E-mode)電晶體(常閉,Vth>0),或空乏模式(或D-mode)電晶體(常開,Vth<0)。在功率電路中,增強模式裝置通常被用以防止意外導通,意外導通可造成裝置或其他電路部件的傷害。節點17、18與19經由電感性負載(亦即諸如馬達線圈的電感性部件,未圖示於第1圖)被耦接至彼此。
第2a圖圖示第1圖中的全三相馬達驅動電路的先前技術半橋接15,以及在節點17、18之間的馬達繞組(winding)(電感性部件21)與電晶體44,馬達電流饋入電晶體44。對於此功率相,電晶體44為持續開啟(Vgs44>Vth)且電晶體42為持續關閉(Vgs42<Vth,亦即Vgs42=0V,若使用增強模式電晶體),同時電晶體41被由脈衝寬度調變(PWM)訊號調變以得到所需的馬達電流。第2b圖指示在電晶體41被偏壓為開啟的時間內的電流27路徑。對於此偏壓,馬達電流流動通過電晶體41與44,同時沒有電流流動通過電晶體42,因為電晶體42被偏壓為關閉,且在節點17的電壓為接近HV,故電晶體42阻擋接近HV的電壓。
在本文中使用的名詞「阻擋電壓」代表電晶體、裝置或部件位於在電壓被施加為跨電晶體、裝置或部件上時,防止大量電流流動通過電晶體、裝置或部件的狀態中,大量電流諸如大於一般開啟狀態傳導期間內的平均操作電流的0.001倍。換言之,在電晶體、裝置或部件阻擋施加為跨電晶
體、裝置或部件上的電壓的同時,傳輸通過電晶體、裝置或部件的總和電流將不大於一般開啟狀態傳導期間內的平均操作電流的0.001倍。
參照第2c圖,在電晶體41被切換關閉時,沒有電流能夠流動通過電晶體41,且因此馬達電流以相反方向流動通過電晶體42,此可發生於電晶體42被偏壓為開啟或關閉時。或者,反並聯空轉(freewheeling)二極體(未圖示)可被連接為跨電晶體42,在此情況下反向電流流動通過空轉二極體。在此種作業期間內,電感性部件21迫使節點17的電壓為足夠負的值,以導致通過電晶體42的反向傳導,且電晶體41阻擋接近HV的電壓。
在許多高壓電路應用中,電路部件被裝設在基板上,基板包含陶瓷或其他電氣絕緣高熱傳導性材料,諸如AlN或Al2O3。將高熱含量(heat capacity)金屬(諸如銅)塗上電氣絕緣高熱傳導性材料的至少一側(通常為兩側),從而允許電路部件產生的熱被散逸。詳言之,直接覆銅(direct bonded copper;DBC)基板為適合的基板,DBC基板係由將純銅以高溫熔融與擴散製程接合至陶瓷隔離體(諸如AlN或Al2O3)來形成。第3圖圖示說明示例性DBC先前技術基板,該基板包含接合至陶瓷層60相對側的銅層61與62。DBC基板當前僅可作為單層基板,不像熱傳導性較低的印刷電路板(PCB)基板,PCB基板可由使多重絕緣層堆疊於彼此之上來形成,且在每一承續的絕緣層之間存在傳導性金屬層。用以形成DBC基板的製程確保對於高電壓應用足夠高的熱傳導
性,該製程當前僅可用以形成包含單一絕緣/陶瓷層且每一側接合了純銅層的DBC基板。因此,併入DBC基板的佈局被限制於單層金屬-陶瓷-金屬DBC材料。儘管PCB基板可由多重絕緣層且金屬層將每一絕緣層相隔來形成(允許電路佈局更有彈性),此種基板的熱傳導性及/或熱含量低於DBC基板的熱傳導性及/或熱含量,且對於許多高電壓電路(例如用於功率轉換的橋接電路)而言不夠高。
回到第2a圖至第2c圖,第2a圖至第2c圖先前技術所圖示說明的切換模式通常被稱為硬式切換(hard switching)。在硬式切換電路配置中,切換電晶體被配置為在切換電晶體被切換為ON時立刻有高電流傳輸通過切換電晶體,而在切換電晶體被切換為OFF時有高電壓跨過切換電晶體。詳言之,在硬式切換電路配置中,切換電晶體被配置為在從OFF切換成ON的同時,電晶體承受大汲極-源極電壓,且在切換電晶體被切換為ON時立刻有高電流傳輸通過切換電晶體。在這些條件下切換的電晶體被稱為被「硬式切換」。硬式切換電路傾向於相對簡單,並可以廣泛的輸出負載功率操作。然而,硬式切換電路通常容易發生大電壓超越量(overshoot)且因此容易發生高位準EMI。替代的電路配置使用額外的被動及/或主動部件,或替代性的訊號時序技術,來允許電晶體被「軟式切換(soft switching)」。在軟式切換電路配置中,切換電晶體被配置為在零電流(或接近零電流)狀態期間切換為ON,或在零電壓(或接近零電壓)狀態期間切換為ON。軟式切換方法與配置被發展以減少切換
損耗,並處理在硬式切換電路中(特別是在高電流及/或高電壓應用中)觀察到的高位準電磁干擾(electro-magnetic interference;EMI)以及相關聯的振鈴效應(ringing)。儘管軟式切換在許多情況下可緩解這些問題,軟式切換所需的電路系統通常包含許多額外的部件,使得總和成本與複雜度提升。軟式切換通常亦要求電路被配置為僅在特定的時間處切換,如在達成零電流或零電壓狀態時,因此限制了可被施加的控制訊號,且在許多情況下此降低了電路效能。再者,由於軟式切換作業所需要的共振狀態,每一軟式切換電路的輸出負載值必須位於給定的範圍內,從而限制電路的作業範圍。因此,硬式切換功率切換電路需要替代的配置與方法,以防止過度的高電壓超越量,並維持足夠低位準的EMI,同時允許廣泛的輸出負載範圍。
本發明的第一態樣說明一種電氣模組。該電氣模組包含電容器、包含第一電晶體的第一切換裝置以及包含第二電晶體的第二切換裝置。該電氣模組進一步包含基板,該基板包含在第一金屬層與第二金屬層之間的絕緣層,該第一金屬層包含第一部分與第二部分,該第二部分藉由溝槽與該第一部分電氣阻隔,該溝槽係形成為通過在該第一部分與該第二部分之間的該第一金屬層。該第一切換裝置與該第二切換裝置係位於該第一金屬層上,該電容器的第一端點係電氣連接至該第一金屬層的該第一部分,且該電容器的第二端點係電氣連接至該第一金屬層的該第二部分,且該電容器延伸於
該溝槽之上。
本發明的第二態樣說明一種電氣模組。該電氣模組包含第一基板與第二基板,該第一基板包含在第一絕緣層上的第一金屬層,該第一金屬層包含第一部分與第二部分,且該第二基板包含在第二金屬層與第三金屬層之間的第二絕緣層,該第二基板具有第二表面與第三表面,該第三表面位於該第二基板相對於該第二表面的相對側上,該第二絕緣層的面積比該第一絕緣層的面積小。該電氣模組進一步包含第一半導體裝置。該第二基板係裝設在該第一金屬層的該第一部分上,且該第二基板不位於該第一金屬層的該第二部分上,且該第二基板的該第二表面直接接觸該第一金屬層,且該第一半導體裝置係裝設於該第二基板的該第三表面上。
本發明的第三態樣說明一種電氣模組。該電氣模組包含第一基板與第二基板,該第一基板包含在第一金屬層與第二金屬層之間的第一絕緣層,該第二基板包含在第三金屬層與第四金屬層之間的第二絕緣層。該第二基板的面積比該第一基板的面積小,該第二基板係裝設在該第一基板的第一部分上,且該第三金屬鄰接於(或接觸)該第二金屬。該電氣模組進一步包含具有第一閘極與第一源極的第一切換裝置,以及具有第二閘極與第二源極的第二切換裝置。該第一切換裝置係裝設在該第一基板的該第二金屬層上,且該第二基板位於該第二切換裝置與該第一基板之間。
本文所說明的電氣模組可包含下列特徵之一或更多者。該第一電晶體的汲極可電氣連接至該第二電晶體的源
極,且該第一電晶體與該第二電晶體兩者可皆位於該第一金屬層的該第一部分上。該第一金屬層的該第一部分可包含第一連接構件,用以將該第一金屬層的該第一部分電氣連接至DC地或第一DC電壓,且該第一金屬層的該第二部分可包含第二連接構件,用以將該第一金屬層的該第二部分電氣連接至第二DC電壓。該電容器可經配置以穩定化該第一金屬層的該第一部分與該第二部分之間的電壓差。該第一或第二電晶體可為III-氮族電晶體。該基板可包含直接覆銅基板。該電氣模組可進一步包含第二基板,該第二基板包含在第三金屬層與第四金屬層之間的第二絕緣層,該第二基板係位於該第一金屬層的第三部分之上,但該第二基板不位於該第一金屬層的該第一部分與該第二部分之上,其中該第二基板係位於該第二電晶體與該第一基板之間,且該第一電晶體係位於該第一金屬層的該第一或第二部分之上。
該第一基板與該第二基板可包含直接覆銅基板。該電氣模組可進一步包含第二半導體裝置,該第二半導體裝置裝設在該第一金屬層的該第二部分上。該第一半導體裝置可包含第一電晶體,該第二半導體裝置可包含第二電晶體,且該第一電晶體的源極與該第二電晶體的汲極可電氣連接至該第三金屬層。該第一電晶體或該第二電晶體可為III-氮族電晶體。該第一金屬層可進一步包含第三部分,其中該第三部分藉由溝槽與該第二部分電氣阻隔,該溝槽係形成為通過該第三部分與該第二部分之間的該第一金屬層。該電氣模組可進一步包含電容器,其中該電容器的第一端點係電氣連接至該
第一金屬層的該第三部分,該電容器的第二端點係電氣連接至該第一金屬層的該第二部分,且該電容器延伸於該溝槽之上。該第一電晶體的汲極可電氣連接至該第一金屬層的該第三部分。該第一半導體裝置可進一步包含第三電晶體,該第三電晶體的源極可電氣連接至該第一電晶體的汲極,且該第一電晶體的汲極可電氣連接至該第一金屬層的該第三部分。
該電氣模組可進一步包含第三基板,該第三基板包含在第四金屬層與第五金屬層之間的第三絕緣層,該第三絕緣層的面積比該第二絕緣層的面積小,其中該第三基板係裝設為直接位於該第二基板的該第三表面之上。該第一半導體裝置可包含第一電晶體,該第二半導體裝置可包含第二電晶體,且該第一電晶體的源極與該第二電晶體的汲極皆可電氣連接至該第三金屬層。該第一金屬層可進一步包含第三部分,且該第三部分藉由溝槽與該第二部分電氣阻隔,該溝槽係形成為通過在該第三部分與該第二部分之間的該第一金屬層。該電氣模組可進一步包含電容器,其中該電容器的第一端點係電氣連接至該第一金屬層的該第三部分,該電容器的第二端點係電氣連接至該第一金屬層的該第二部分,且該電容器延伸於該溝槽之上。該第一電晶體的汲極可電氣連接至該第一金屬層的該第三部分。該第一半導體裝置可進一步包含第三電晶體,且該第三電晶體的源極係電氣連接至該第一電晶體的汲極,且該第一電晶體的汲極係電氣連接至該第一金屬層的該第三部分。
該第一半導體裝置與該第二半導體裝置可包含電晶
體,該等電晶體為半橋接(half bridge)的部分。該第一源極可電氣連接至第一源極引線,該第一閘極可電氣連接至第一閘極引線,該第二源極可電氣連接至第二源極引線,且該第二閘極可電氣連接至第二閘極引線。該第一源極引線與該第一閘極引線可裝設在該第一基板的該第二金屬層上,且該第二源極引線與該第二閘極引線可裝設在該第二基板的該第四金屬層上。該第一源極引線可延伸離開該第一基板的表面,該第二閘極引線可延伸離開該第二基板的表面,該第一源極引線可朝遠離該第二切換裝置的方向彎曲,且該第二源極引線可朝遠離該第一切換裝置的方向彎曲。
本發明之第四態樣說明一種製造電氣模組的方法。該方法包含以下步驟:提供第一基板,該第一基板包含在第一絕緣層上的第一金屬層,該第一基板具有第一表面,該第一基板包含第一部分與第二部分。該方法進一步包含以下步驟:提供第二基板,該第二基板包含在第二金屬層與第三金屬層之間的第二絕緣層,該第二基板具有第二表面與第三表面,該第三表面位於該第二基板相對於該第二表面的相對側上。該方法亦包含以下步驟:將該第二基板裝設在該第一基板的該第一部分中的該第一表面上,且該第二表面位於該第三表面與該第一表面之間;以及將第一半導體裝置裝設在該第二基板的該第三表面上。
本文所說明之製造電氣模組的方法可包含下列特徵的一或更多者。該方法可進一步包含以下步驟:將第二半導體裝置裝設在該第一基板的該第二部分中的該第一基板的該
第一表面上。該第一半導體裝置或該第二半導體裝置可為電晶體。該電晶體可包含源極電極、閘極電極與汲極電極,該等電極之每一者位於該電晶體的第一側上。該電晶體可為III-氮族電晶體。該第一半導體裝置或該第二半導體裝置可為切換電晶體,該切換電晶體經配置為硬式切換。該切換電晶體的切換時間可為約3奈秒或更小。在該第二基板上裝設該第一半導體裝置之步驟或在該第一基板上裝設該第二半導體裝置之步驟,可於將該第二基板裝設在該第一基板的該第一部分中的該第一表面上之步驟之前執行。該第二基板的該第二表面可直接附接至該第一基板的該第一部分中的該第一基板的該第一表面。該第一基板的該第一表面可包含該第一金屬層的表面,該第二基板的該第二表面可包含該第二金屬層的表面,且該第二基板的該第三表面可包含該第三金屬層的表面。
該方法可進一步包含以下步驟:部分移除該第一金屬層。部分移除該第一金屬層之步驟可包含以下步驟:形成通過該第一金屬層的阻隔溝槽。部分移除該第一金屬層之步驟,可於將該第二基板裝設在該第一基板的該第一部分中的該第一表面上之步驟之前執行。將該第二基板裝設在該第一基板的該第一部分上之步驟,可包含以下步驟:將該第二基板的該第二表面焊接至該第一基板的該第一表面的該第一部分。該第一絕緣層或該第二絕緣層可包含陶瓷材料。該第一金屬層、該第二金屬層或該第三金屬層之一或更多者可包含銅。該第一基板或該第二基板可為直接覆銅(DBC)基板。
該第一基板的該第一表面的面積,可大於該第二基板的該第二表面的面積。該電氣模組可包含半橋接。該電氣模組可包含功率反相器或功率轉換器。該方法可進一步包含以下步驟:將電容器裝設在該電氣模組上,該電容器具有第一端點與第二端點。該方法可進一步包含以下步驟:形成溝槽為通過該第一基板的該第二部分中的該第一金屬層。將該電容器裝設在該電氣模組上之步驟可包含以下步驟:將該第一端點連接至該溝槽的第一側上的該第一金屬層,並將該第二端點連接至該溝槽的第二側上的該第一金屬層。該第一基板可進一步包含第四金屬層,該第四金屬層位在該第一絕緣層與該第一金屬層相對的相對側上。
本發明之第五態樣說明一種電氣裝置。該電氣裝置包含增強模式電晶體,該增強模式電晶體包含第一源極電極、第一閘極電極、第一汲極電極與第一半導體層。該第一源極電極與該第一閘極電極係位在該第一半導體層與該第一閘極電極相對的相對側上。該電氣裝置進一步包含空乏模式電晶體,該空乏模式電晶體包含第二源極電極與第二閘極電極,該第二源極電極係位於第二半導體層之上。該增強模式電晶體係裝設為直接位於該第二源極電極頂端或該第二源極電極之上,且該第一汲極電極直接電氣接觸該第二源極電極。
本文所說明的電氣裝置與部件可包含下列特徵之一或更多者。該空乏模式電晶體可進一步包含第二汲極電極,且該第二源極電極與該第二汲極電極皆可位於該第二半導體層的第一側上。該空乏模式電晶體可為橫向裝置。該增強模
式電晶體可為以矽為基礎的電晶體。該空乏模式電晶體可為III-氮族電晶體。該第一源極電極可電氣連接至該第二閘極電極。該空乏模式電晶體可包含在該半導體層上的絕緣層,且該第二源極電極位於該絕緣層上。該空乏模式電晶體可包含裝置主動區與非主動區,其中裝置通道係位於該半導體層中的該裝置主動區中而不位於該半導體層中的該非主動區中,且該絕緣層位於該裝置主動區與該非主動區兩者之上。該增強模式電晶體可位於該絕緣層上,且該增強模式電晶體可直接位於該裝置主動區的部分上以及該非主動區的部分上。該空乏模式電晶體可具有較該增強模式電晶體為高的崩潰電壓。
本發明之第六態樣說明一種形成電氣裝置的方法。該方法包含以下步驟:提供增強模式電晶體,該增強模式電晶體包含第一源極電極、第一閘極電極、第一汲極電極與第一半導體層,其中該第一源極電極與該第一閘極電極位於該第一半導體層與該第一閘極電極相對的相對側上。該方法亦包含以下步驟:提供空乏模式電晶體,該空乏模式電晶體包含第二源極電極與第二閘極電極,該第二源極電極位於第二半導體層上。該方法進一步包含以下步驟:將該增強模式電晶體裝設為直接位於該第二源極電極頂端或該第二源極電極之上,且該第一汲極電極直接電氣接觸該第二源極電極。
本文所說明之形成電氣裝置與模組的方法可包含下列特徵之一或更多者。該空乏模式電晶體可為橫向裝置。該方法可進一步包含以下步驟:將該第二閘極電極引線接合至
該第一源極電極。
本發明之第七態樣說明一種操作功率反相器的方法。該方法包含以下步驟:將該功率反相器連接至高電壓供應,該高電壓供應提供至少500 V的電壓,以及將該切換裝置從開啟狀態切換至關閉狀態以及從關閉狀態切換至開啟狀態。在該開啟狀態中,該切換裝置傳導40至50安培,在該關閉狀態中,該切換裝置阻擋由高電壓供應提供的該電壓,該切換的切換時間係小於10奈秒,且跨該切換裝置之上的電壓從不超過該高電壓供應所提供的該電壓的1.35倍。
本文所說明之操作功率反相器的方法可包含下列特徵之一或更多者。該切換時間可小於5奈秒。跨該切換裝置之上的電壓從不超過700V。
本說明書所說明之發明標的的一或更多個具體實施例的細節,已說明於附加圖式以及下文。根據說明書、圖式與申請專利範圍,發明標的的其他特徵、態樣與優點將為顯然。
10‧‧‧先前技術三相橋接電路
11‧‧‧DC高電壓節點
12‧‧‧地
15‧‧‧半橋接
17-19‧‧‧節點
21‧‧‧馬達繞組
25‧‧‧半橋接
27‧‧‧電流路徑
35‧‧‧半橋接
37‧‧‧金屬層下部
38‧‧‧金屬層上部
39‧‧‧引線接合
41-46‧‧‧電晶體
51‧‧‧電容器
52,53‧‧‧寄生電感
56‧‧‧溝槽
57‧‧‧最小間距
60‧‧‧陶瓷層
61,62‧‧‧銅層
74‧‧‧DBC基板
75‧‧‧金屬層
76‧‧‧溝槽
77‧‧‧接地引線
78‧‧‧高電壓引線
79‧‧‧輸出引線
81-86‧‧‧電晶體
87‧‧‧閘極引線
88‧‧‧源極引線
91‧‧‧電容器
92‧‧‧金屬層區域
94-96‧‧‧額外的DBC基板
96’‧‧‧DBC基板
97‧‧‧絕緣/陶瓷層
98,99‧‧‧金屬層
101,103,105‧‧‧高側電晶體
102,104,106‧‧‧低側電晶體
105’,105”‧‧‧高側電晶體
106’,106”‧‧‧低側電晶體
107‧‧‧混合裝置
108‧‧‧高電壓D-mode電晶體
109‧‧‧低電壓E-mode電晶體
111,114‧‧‧源極電極
112,115‧‧‧閘極電極
113,116‧‧‧汲極電極
114’‧‧‧指狀源極
115’‧‧‧指狀閘極
116’‧‧‧指狀汲極
114‧‧‧源極電極
116‧‧‧汲極電極
121’-123’‧‧‧半橋接
121”-123”‧‧‧半橋接
121‧‧‧混合裝置的源極
122‧‧‧混合裝置的閘極
123‧‧‧混合裝置的汲極
126‧‧‧第三DBC基板
130‧‧‧基板
131,132‧‧‧III-氮族層
133‧‧‧2DEG通道
134‧‧‧植入離子區域
135‧‧‧絕緣層
140‧‧‧主動區
141‧‧‧非主動區
143,144‧‧‧通孔
第1圖圖示說明先前技術三相橋接電路的電路示意圖。
第2a圖至第2c圖圖示說明在各種操作條件下的第1圖先前技術三相橋接電路的部分。
第3圖為先前技術直接覆銅(DBC)基板的透視圖。
第4a圖至第4b圖圖示說明橋接電路之部分的電路示意圖。
第5圖至第7圖為具有橋接電路的電氣模組的平面示意圖。
第8A圖與第8B圖為第7圖電氣模組之部分的截面圖。
第9A圖至第9E圖圖示說明形成第7圖電氣模組的程序。
第10A圖至第10B圖圖示說明可用於電氣模組中的電氣裝置。
第11A圖至第11F圖圖示說明製造可用於電氣模組中的電氣裝置的程序。
第12圖為具有半橋接的電氣模組的平面示意圖。
第13A圖至第13B圖為功率反相器在作業期間的電流與電壓特性圖表。
在各個圖式中,類似的元件編號表示類似的元件。
本文說明適合在電氣功率切換電路中維持低位準EMI,從而允許較高的電壓穩定度與效能提升的電氣部件與方法。與傳統部件相較之下,電氣部件亦可具有較小的尺寸,從而允許較低的生產成本。
本文所說明電路中的電晶體或其他切換裝置,通常經配置為被硬式切換(如先前所說明)於非常高的切換速率(亦即具有非常小的切換時間)。在本文電路之一者的電晶體位於關閉狀態而無大量電流流動通過該電晶體時,該電晶體通常阻擋該電晶體汲極與源極端點之間的電壓,該電壓接
近電路的高電壓。在本文電路之一者的電晶體位於開啟狀態時,通常有大量的汲極-源極電流傳輸通過該電晶體,且僅有小電壓跨於裝置上。在硬式切換狀態下切換之切換電晶體的切換時間被界定如下。在電晶體被從關閉狀態(如前述)切換成開啟狀態(如前述)時,在切換開始處通過裝置的電流開始提升,提升速率可由調整控制電路系統的狀態來調整,同時跨於裝置上的電壓約保持相同。跨於裝置上的汲極-源極電壓不大量下降,直到實質上所有的負載電流傳輸通過電晶體之後。從切換開始到跨於裝置上的電壓下降經過的時間,被稱為用以開啟電晶體的「切換時間」。更詳言之,開啟電晶體的「切換時間」可被界定為從汲極-源極電壓等於90%的阻擋電壓到汲極-源極電壓等於10%的阻擋電壓所經過的時間。所切換之跨於裝置上的總和電壓除以切換時間(dV/dt),被稱為「電壓切換速率」或「切換速率」。
在將電晶體從開啟狀態切換成關閉狀態的情況中,跨於裝置上的電壓約在切換開始時提升至關閉狀態電壓,儘管電流需要較長的時間以從開啟狀態值下降至關閉狀態值,下降速率可再次由調整控制電路系統的狀態來調整。從切換開始到通過裝置之電流下降至零所經過的時間,被稱為用以關閉電晶體的「切換時間」。更詳言之,用以關閉電晶體的「切換時間」可被界定為從汲極-源極電壓等於10%的阻擋電壓至汲極-源極電壓等於90%的阻擋電壓所經過的時間。所切換之通過裝置的總和電流除以切換時間(dI/dt),被稱為「電流切換速率」或「切換速率」。一般而言,儘管較短的切換時
間(且因此為較高的切換速率)通常產生較低的切換損耗,但較短的切換時間通常亦產生較高位準的EMI,較高位準的EMI可使電路部件降級或傷害電路部件,而使電路部件變為不可操作。
為了確保具有諸如第1圖至第2圖之電路示意佈局的電路能夠適當作業,DC高電壓節點11必須被維持為AC地。換言之,節點11較佳地被電容性耦接至DC地,藉由將電容器51的一個端點連接至高電壓節點11,並將電容器的另一端點連接至地12,如第4a圖所圖示說明。因此,在電晶體41或42之任一者被切換開啟或關閉時,電容器51可依所需充電或放電,以提供在電路高電壓側與低電壓側維持實質上固定電壓所需的電流。由較高切換速率產生的EMI,通常造成電容器51需要在較短時間期間內提供較高的電流位準,以穩定電路。在許多情況中,在電容器51與電路之間的傳導性連接器具有大寄生電感(由第4b圖的電感器52與53代表)。此寄生電感使傳輸通過電容器51的電流無法足夠快速地切換,從而使電容器51無法在電晶體之任一者被切換開啟或關閉之後,以足夠快的速率提供電流以防止跨於電晶體41或42上的電壓變異。此可造成有害的效應,諸如電壓振盪(亦即振鈴效應)與過大的EMI。詳言之,跨於電路中電晶體之任意者之上的過大電壓振盪,可造成電晶體崩潰且變為不可操作。
第5圖至第7圖為電氣部件(亦即橋接電路)示意佈局。第5圖至第7圖電氣部件之每一者的電路圖係類似於
第1圖的電氣部件,但第5圖至第7圖的電氣部件之每一者亦包含位於高電壓與地平面之間的電容器71/91。第5圖至第7圖的電氣部件包含經設計以大量減少電路中的寄生電感的特徵,從而使電路可以較高的切換速度與較低的損耗來操作。
參照第5圖所圖示說明的橋接電路的示意佈局,橋接電路的全部部件被裝設在單一共用DBC基板74上,DBC基板74具有接合至絕緣或陶瓷材料的金屬層75。半橋接121包含電晶體81與82,半橋接122包含電晶體83與84,且半橋接123包含電晶體85與86。電晶體81至86為垂直電晶體且每一者的源極與閘極電極位於相對於汲極的電晶體側,電晶體81至86裝設在基板上且汲極接觸金屬層75。或者,可使用橫向電晶體作為電晶體81至86且每一者的源極、閘極與汲極位於裝置的相同側,在此情況下汲極可連接至金屬層75(例如藉由引線接合(wire bonding))。可使用的橫向電晶體範例,包含III-氮族電晶體,諸如III-氮族高電子移動性電晶體(HEMT)。在本文中使用的名詞III-氮族或III-N材料、層、裝置、結構等等,代表由依據化學計量方程式AlxInyGazN的複合半導體材料所構成的材料、層、裝置或結構,其中x+y+z約為1。在III-氮或III-N裝置(諸如電晶體或HEMT)中,傳導性通道可被部分或整體包含在III-N族材料層中。
形成穿越金屬層的溝槽76,在溝槽區域中陶瓷材料暴露,且溝槽76使圍繞電晶體82、84與86每一者的金屬層75電氣阻隔自金屬層75的其餘部分。電氣連接至金屬層75
下部37(亦即溝槽76以下的部分)的引線77,被配置為連接至DC地,從而將金屬層75下部37維持在DC地。電氣連接至金屬層75上部38(亦即溝槽76以上的部分)的引線78,被配置為連接至DC高電壓供應(未圖示),從而將金屬層75上部38維持在DC高電壓。在本文中使用的兩個或兩個以上接點或其他物件(諸如傳導性層或部件),若該等接點或其他物件被由充分傳導的材料連接而確保接點或其他物件之每一者的電位實質上相同(或約相同),不論偏壓條件為何,則該等接點或其他物件被稱為「電氣連接」。閘極引線87與源極引線88各別電氣連接至電晶體81至86的閘極與源極,例如藉由圖示的引線接合39(為了清晰圖示,第5圖僅將一個引線接合編號為39)。閘極引線87與源極引線88之每一者由溝槽56電氣隔離自該每一者各別的電晶體汲極,溝槽56形成為穿過金屬層75的全體厚度且環繞閘極引線87與源極引線88之每一者。輸出引線79經配置為連接至電感性負載(未圖示),且輸出引線79每一者電氣連接至金屬層75圍繞電晶體82、84與86的各別區域。
如第5圖所圖示,部分37與38之間存在相當大的空間間隔,且將部分37中的地平面電容性耦接至部分38中的高電壓平面的電容器71為外部裝設,而傳導性連接器72與73將電容器分別連接至金屬層75的部分37與38。因為連接器72與73相當長以容許部分37與38之間的大空間間隔,連接器傾向於具有大寄生電感,對應於第4b圖的大的電感器52與53值。因此,儘管在電晶體以較低切換速率及/或足夠
低的切換電流與電壓位準(與足夠高的切換時間)切換時,第5圖的電氣部件可為可操作,但是在電晶體以較高的切換速率及/或較高的切換電壓或電流切換時,電路中的寄生電感可產生無法接受的高位準EMI與電壓擾動/振盪。詳言之,若在電晶體切換期間通過電晶體之電流改變速率(dI/dt)或跨於電晶體上之電壓改變速率(dv/dt)太高,則電壓擾動/振盪與EMI可減少電路的效率與效能,或使電路部件之一或更多者失效。
第6圖圖示另一電氣部件(亦即橋接電路)的示意佈局。第6圖的電氣部件類似於第5圖的電氣部件,但佈局已被修改為包含位於高電壓平面與地平面之間且直接位於單一DBC基板74上的耦接電容器91,從而消除了在耦接電容器任一側上的長連接器的需求,並減少電路的寄生電感。詳言之,形成為穿過DBC基板金屬層75的溝槽76的形狀已被修改,而使部分38包含在電晶體82與84之間以及電晶體84與86之間的區域92。區域92中的金屬層75向下延伸朝向金屬層75的部分37,且與金屬層75的部分37相隔溝槽76的寬度,溝槽76的寬度可小於2 cm,例如約1cm或更小。電容器91直接裝設在溝槽76上(如圖示),且電容器91的第一端點連接至溝槽一側上的金屬層75,且電容器91的第二端點連接至溝槽相對側上的金屬層75。金屬層75連接至電容器兩個端點的點,與溝槽的距離可小於2 cm及/或與彼此相距小於4 cm,從而允許低寄生電感的小型設計。
儘管相較於第5圖的佈局,第6圖的佈局可大量減
少電路中的寄生電感,流動通過電容器91與電晶體81、83、85之任意者的任何電流必須流動通過相當窄的區域92,此仍可造成電路的寄生電感對於一些應用而言過高,例如對於跨於電晶體任意者之上的電壓及/或通過電晶體任意者的電流切換速率非常高的應用而言。儘管提升區域92寬度可產生較低的寄生電感,電氣部件的總和尺寸與成本亦提升。然而,期望有使在耦接電容器與電晶體之間流動的電流擴散在大寬度的傳導材料上的小型佈局,以增進電路速度與效能,而同時將佈局面積與材料成本最小化。
第7圖圖示橋接電路的小型佈局,相較於第5圖與第6圖的佈局,第7圖的佈局進一步減少寄生電感。藉由使用額外的DBC基板94-96堆疊於DBC基板74之上而達成小型設計,此使傳輸通過電容器91之任意者的電流能夠在高側裝置101、103或105下方傳輸,且因此不被限制於相當窄的通道,如進一步說明於下文。
第7圖圖示說明的橋接電路被形成在DBC基板74上且包含電晶體101-106,電晶體101-106為橫向電晶體且源極、閘極與汲極皆位於裝置相同側或裝置的共用半導體層上。橫向電晶體101-106被形成為使源極、閘極與汲極之每一者位於裝置半導體層的一或更多者上,且一或多個裝置半導體層位於DBC基板74與源極、閘極與汲極之每一者之間。第7圖的電氣部件進一步包含堆疊在DBC基板74上的額外DBC基板94-96,且半橋接121”-123”各別的高側電晶體101、103與105位於基板94、95與96上。如沿著第7圖虛線100
之電氣部件截面圖的第8A圖所圖示,包含在絕緣/陶瓷層97相對側上的金屬層98與99的DBC基板95,被固定在DBC基板74的下部37(亦即標記於第7圖且其中金屬層75連接至地的部分)上。DBC基板95的金屬層99可電氣連接至DBC基板74的金屬層75,且例如可由傳導性接著劑或環氧樹脂固定至金屬層75。橫向功率電晶體103形成於金屬層98上,且橫向功率電晶體103的源極電極引線接合至源極引線88(圖示於第7圖但未圖示於第8A圖)與DBC基板95的金屬層98,閘極電極引線接合至閘極引線87(圖示於第7圖但未圖示於第8A圖),且橫向功率電晶體103的汲極電極引線接合至DBC層74的部分38中的金屬層75。
回到第7圖,輸出引線79之每一者電氣連接至DBC基板94-96的上金屬層(第8A圖的層98)。裝設在DBC基板部分37上且在不包含額外DBC基板之區段中的低側電晶體102、104與106,每一者經配置如下述。源極電極引線接合至部分37中的金屬層75以及源極引線88,閘極電極引線接合至閘極引線87,且汲極電極引線接合至DBC基板94-96的上金屬層(亦即離DBC基板74最遠的金屬層),如圖示。
在第7圖的電氣部件中,從電容器91之任意者流動至電晶體102、104或106之任意者的源極的電流(或相反方向的電流),流動通過金屬層75且可因此在電晶體101、103或105之至少一者下方傳輸,由於金屬層75在電晶體101、103與105下方延展。因此,電流不被橫向地限制於相當窄的通道(如第6圖的情況)。因此,減少了此電氣部件中的寄
生電感,相較於第6圖電氣部件中的寄生電感。再者,因為第7圖的電氣部件不需要第6圖的電氣部件所包含的窄區域92,第7圖的電氣部件可被製為更小型,且可具有較小的佈局面積,相較於第6圖的電氣部件。
第8B圖為沿著第7圖虛線90之電氣部件截面圖,且圖示說明電晶體103與104各別的源極引線與閘極引線88與87的配置。因為第7圖電氣部件的小型設計,且特定而言,由於電晶體103與104之間的小間距,引線87與88被彎曲以防止裝置意外與彼此短路。換言之,電晶體103的引線87與88朝遠離電晶體104的方向彎曲,且電晶體104的引線87與88朝遠離電晶體103的方向彎曲,以提升鄰接裝置引線之間的最小間距57。
第9A圖至第9E圖圖示說明形成第7圖電氣部件的範例方法。參照第9A圖,提供第一DBC基板74以及DBC基板94-96。DBC基板94-96之每一者的截面面積小於DBC基板74的截面面積。參照第9E圖,特定而言,因為DBC基板94-96之每一者必須契合在DBC基板74的區域內而不與彼此重疊,DBC基板94-96之每一者的截面積小於DBC基板74截面積的1/3。再者,因為需要維持足夠的空間給部分38與電晶體102、104與106,DBC基板94-96之每一者的截面積可小於DBC基板74截面積的1/6。
參照第9B圖,隨後形成穿越DBC基板74金屬層75的溝槽76,且在DBC基板75與94-96之每一者的上側金屬層中形成溝槽56。接著如第9C圖圖示,將電晶體101、103
與105之每一者分別固定至DBC基板94、95與96的上側金屬表面,並將電晶體102、104與106固定至DBC基板74部分37(亦即位於與引線77相同的溝槽76側上的DBC基板74部分)中的金屬層75。將電容器91固定至溝槽76上,且電容器91的一個端點接觸部分37中的金屬層75,且電容器91相對的端點接觸部分38(亦即位於與引線78相同的溝槽76側上的DBC基板74部分)中的金屬層75。將接地引線77固定並電氣連接至部分37中的金屬層75,將高電壓引線78固定並電氣連接至部分38中的金屬層75,且將輸出引線79固定並電氣連接至DBC基板94-96之每一者的上側金屬表面。將源極引線88與閘極引線87附接於電晶體101-106之每一者的近端,如圖示。
接著如第9D圖圖示說明,將DBC基板94-96固定至DBC基板74上,且DBC基板74的金屬層75接觸DBC基板94-96底部金屬層之每一者。最後,形成引線接合39,而產生如第9E圖圖示的電氣部件,該電氣部件與第7圖的電氣部件相同(為了清晰說明目的,在第7圖與第9E圖中僅編號一個引線接合39)。
電晶體101-106可為具有正臨限電壓的增強模式(E-mode)電晶體,或可為具有負臨限電壓的空乏模式(D-mode)電晶體。在許多高電壓或功率切換應用中,電晶體較佳地為增強模式裝置,以防止在電晶體101-106之任意者失效的情況下電路被傷害。電晶體101-106亦可包含絕緣或半絕緣層,例如半絕緣基板(諸如Al2O3、矽或碳化矽),於裝
置半導體層以及裝設半導體層於其上的DBC基板的一些或所有者之間,以電氣阻隔裝置部分與DBC基板。
儘管在第7圖中,電晶體101-106之每一者被圖示為單一橫向電晶體,可替代性地使用其他裝置。例如,可使用諸如圖示於第10A圖與第10B圖之混合裝置107的切換裝置,來代替切換電晶體101-106之每一者或任意者。因為由高電壓增強模式電晶體所構成的切換裝置可難以可靠地生產,對於單一高電壓E-mode電晶體的一種替代方案,為結合高電壓D-mode電晶體108與低電壓E-mode電晶體109於第10A圖與第10B圖的配置中以形成混合裝置107。混合裝置107的操作方式可與單一高電壓E-mode電晶體相同,且在許多情況中混合裝置107達成與單一高電壓E-mode電晶體相同或類似的輸出特性。第10A圖圖示混合裝置107的示意圖,且第10B圖圖示混合裝置107的電路圖。混合裝置107包含高電壓D-mode電晶體108與低電壓E-mode電晶體109。在第10A圖與第10B圖圖示說明的配置中,E-mode電晶體109為垂直電晶體,且E-mode電晶體109的汲極電極113位於與E-mode電晶體109的源極電極111與閘極電極112相對的裝置半導體層側上,而D-mode電晶體108為橫向電晶體,D-mode電晶體108的源極電極114、閘極電極115與汲極電極116皆位於裝置半導體層的相同側上。然而,亦可能對電晶體108與109之每一者使用其他配置。在一些實施例中,D-mode電晶體108為III-氮族電晶體。在一些實施例中,E-mode電晶體109為以矽為基礎的電晶體,同時在其他實施例中E-mode電
晶體109為III-氮族電晶體。
低電壓E-mode電晶體109的源極電極111,與高電壓D-mode電晶體108的閘極電極115,兩者被電氣連接在一起(例如藉由引線接合39(圖示於第10A圖))並一起形成混合裝置107的源極121(圖示於第10B圖)。低電壓E-mode電晶體109的閘極電極112形成混合裝置107的閘極122(圖示於第10B圖)。高電壓D-mode電晶體108的汲極電極116形成混合裝置107的汲極123(圖示於第10B圖)。高電壓D-mode電晶體108的源極電極114電氣連接至低電壓E-mode電晶體109的汲極電極113。如第10A圖所圖示,對於分別與源極電極111和汲極電極112相對的E-mode電晶體109側上的汲極電極113,可藉由將低電壓E-mode電晶體109直接裝設在源極電極114的頂端(或之上),並使汲極電極113(汲極電極113在E-mode電晶體109的底部及圖示於第10B圖)直接接觸源極電極114(例如藉由使用傳導性焊料或合成樹脂),來將汲極電極113電氣連接至源極電極114。因此,低電壓E-mode電晶體109的佈局面積(以及截面面積)可小於高電壓D-mode電晶體108的佈局面積,且特定言之,低電壓E-mode電晶體109的佈局面積可小於高電壓D-mode電晶體108源極電極114的佈局面積。
第11A圖至第11F圖圖示說明形成混合裝置107(諸如圖示於第10A圖的混合裝置)的方法。首先,形成高電壓D-mode電晶體108,如第11A圖至第11E圖圖示。參照第11A圖,在基板130上形成包含III-氮族層131與132的III-氮族
材料結構。藉由層131與132之間的組成差異,在III-氮族材料結構中誘發二維電子氣體(2DEG)通道133。接著,如下文所說明來界定裝置主動區140與非主動區141。處理非主動區141,而使2DEG通道133被從非主動區141移除但保持在主動區中。此種處理可包含將區域134植入離子,如第11A圖圖示。或者,處理可包含蝕刻非主動區141中的III-氮族材料層131及/或132的一些或全部。例如,可執行蝕刻至深於2DEG通道133的深度,而移除非主動區141中包含2DEG通道133的材料。第11B圖圖示第11A圖結構的平面圖(俯視圖)。
接著如第11C圖圖示,在裝置主動區140中的III-氮族層上形成指狀源極114’、指狀閘極115’與指狀汲極116’。指狀源極114’與指狀汲極116’分別形成對2DEG通道133的歐姆接觸(ohmic contacts),且指狀閘極115’調變2DEG通道133中直接位於指狀閘極115’下方的電荷密度。如第11D圖圖示,在裝置主動區140整體上形成絕緣層135(且可選地,亦在裝置非主動區141整體上形成絕緣層135)。在第11D圖中,裝置主動區的周圍(以及指狀源極、指狀閘極與指狀汲極的周圍)被圖示為虛線,以指示指狀源極、指狀閘極與指狀汲極在絕緣層135下方的位置。接著,在指狀源極114’的部分上將通孔143蝕刻通過絕緣層135的整體厚度,並在指狀汲極116’的部分上將通孔144蝕刻通過絕緣層135的整體厚度。雖然未圖示於第11D圖,但亦在指狀閘極115’上形成通過絕緣層135整體厚度的通孔。
接著如第11E圖圖示,在絕緣層135上分別形成源極電極114與汲極電極116。源極電極114被形成於通孔143上(圖示於第11D圖)並在這些通孔中接觸指狀源極114’(第11C圖),且汲極電極116被形成於通孔144上(圖示於第11D圖)並在這些通孔中接觸指狀汲極116’(第11C圖),從而完成D-mode電晶體108。雖然未圖示,但亦在絕緣層135上形成接觸指狀閘極115’的閘極電極(圖示於第11C圖)。
隨後,藉由將E-mode電晶體109連接至D-mode電晶體108來形成混合裝置107,如第11F圖圖示。E-mode電晶體109被放置在直接位於D-mode電晶體108源極電極114之上,且E-mode電晶體109的汲極電極直接接觸D-mode電晶體108的源極電極114。如第11F圖圖示,E-mode電晶體109的上側部分直接位於D-mode電晶體108的主動裝置區140之上,同時E-mode電晶體109的下側部分直接位於D-mode電晶體108的非主動裝置區141之上。雖然未圖示於第11F圖,E-mode電晶體109的源極電極111係連接至D-mode電晶體108的閘極電極115,例如藉由引線接合,如第10A圖圖示。
雖然未圖示於第11E圖至第11F圖,但可能將源極電極114延展於非主動區141上,並使E-mode電晶體109整體位於D-mode電晶體108的非主動裝置區141上。此可為較佳的,因為此允許E-mode電晶體109在作業期間能更有效率地使熱散逸,由於D-mode電晶體108的主動裝置區140中的平均溫度大於非主動裝置區141的平均溫度。若在E-mode電
晶體109作業期間產生的熱未被充分地散逸,則E-mode電晶體109的溫度提升,此可造成較低的效率及/或裝置失效。然而,使E-mode電晶體109的至少一部分位於主動裝置區140上,減少了材料成本以及裝置的總和佈局面積。
在E-mode電晶體109至少部分位於D-mode電晶體108的主動裝置區140上的結構中,為了在作業期間使熱被有效率地從E-mode電晶體109散逸,E-mode電晶體109與D-mode電晶體108之間的熱阻可被製為盡可能小。此可由提升在源極電極114之下的所有通孔的累積面積,而使總和通孔面積對總和源極電極114面積的比例盡可能大來達成。例如,總和通孔面積可為總和源極電極114面積的至少10%。
在本文中使用的「混合增強模式電氣裝置或部件」(或簡稱為「混合裝置或部件」),為由空乏模式電晶體與增強模式電晶體形成的電氣裝置或部件,其中相較於增強模式電晶體,空乏模式電晶體能夠具有較高的操作電壓及/或崩潰電壓,且混合裝置或部件經配置為類似於具有如空乏模式電晶體一般高的崩潰電壓及/或操作電壓的單一增強模式電晶體般操作。換言之,混合增強模式裝置或部件包含具有下列性質的至少三個節點。在第一節點(源極節點)與第二節點(閘極節點)被保持在相同的電壓時,混合增強模式裝置或部件可阻擋施加至第三節點(汲極節點)之相對於源極節點的正高電壓(亦即大於增強模式電晶體能夠阻擋之電壓的電壓)。在閘極節點相對於源極節點被保持在足夠正的電壓(亦即大於增強模式電晶體的臨限電壓)時,在足夠正的電壓施
加在汲極節點(相對於源極節點)時,電流從源極節點傳輸至汲極節點(或從汲極節點傳輸至源極節點)。在增強模式電晶體為低電壓裝置且空乏模式電晶體為高電壓裝置時,混合部件可類似於單一高電壓增強模式電晶體般操作。空乏模式電晶體的崩潰電壓及/或最大操作電壓,可為增強模式電晶體的崩潰電壓及/或最大操作電壓的至少兩倍、至少三倍、至少五倍、至少十倍或至少二十倍。
在本文中使用的「高電壓裝置」(諸如高電壓電晶體),為最佳化為用於高電壓切換應用的電氣裝置。換言之,在電晶體關閉時,電晶體能夠阻擋諸如約300 V或更高、約600 V或更高、約1200 V或更高,或約1700 V或更高的高電壓,且在電晶體開啟時,電晶體的導通電阻(RON)對於使用電晶體的應用而言足夠低,亦即在大量電流傳輸通過裝置時傳導損耗為足夠低。高電壓裝置可至少能夠阻擋等於使用高電壓裝置的電路中的高電壓供應或最大電壓。高電壓裝置可能夠阻擋300 V、600 V、1200 V、1700 V或其他如應用所需的適合阻擋電壓。換言之,高電壓裝置可阻擋0 V與至少Vmax之間的任何電壓,其中Vmax為電路或電源供應可供應的最大電壓。在一些實施例中,高電壓裝置可阻擋0 V與至少2*Vmax之間的任何電壓。在本文中使用的「低電壓裝置」(諸如低電壓電晶體),為能夠阻擋低電壓(諸如0 V與Vlow之間,其中Vlow小於Vmax)但不能夠阻擋高於Vlow的電壓的電氣裝置。在一些實施例中,Vlow等於約|Vth|、大於|Vth|、約2*|Vth|、約3*|Vth|或在約|Vth|與3*|Vth|之間,其中|Vth|為包含在使用低
電壓電晶體之混合部件內的高電壓電晶體(諸如高電壓空乏模式電晶體)臨限電壓的絕對值。在其他實施例中,Vlow為約10 V、約20 V、約30 V、約40 V或在約5 V與50 V之間(諸如在約10 V與40 V之間)。在其他實施例中,Vlow為小於約0.5*Vmax、小於約0.3* Vmax、小於約0.1* Vmax、小於約0.05* Vmax或小於約0.02* Vmax。
在使用高電壓切換電晶體的典型功率切換應用中,電晶體大部分時間內處於兩個狀態之一者中。在通常被稱為「開啟狀態」的第一狀態中,閘極電極相對於源極電極的電壓高於電晶體臨限電壓,且大量電流流動通過電晶體。在此狀態中,源極與汲極之間的電壓差通常為低,通常不超過數伏特(諸如約0.1-5伏特)。在通常被稱為「關閉狀態」的第二狀態中,閘極電極相對於源極電極的電壓低於電晶體臨限電壓,且沒有大量電流(除了關閉狀態洩漏電流之外)流動通過電晶體。在此第二狀態中,源極與汲極之間的電壓可為0 V至電路高電壓供應的值,電路高電壓供應在一些情況中可高至100 V、300 V、600 V、1200 V、1700 V或更高,但可小於電晶體的崩潰電壓。在一些應用中,電路中的電感性元件使源極與汲極之間的電壓甚至高於電路高電壓供應。此外,在閘極被切換開啟或關閉隨後的短時間內,電晶體位於在上述兩個狀態之間的轉變模式中。在電晶體位於關閉狀態時,電晶體被稱為在源極與汲極之間「阻擋電壓」。在本文中使用的「阻擋電壓」代表電晶體、裝置或部件在電壓施加於跨電晶體、裝置或部件上時,防止大量電流(諸如大於在
一般開啟狀態傳導期間內平均操作電流的0.001倍)流動通過電晶體、裝置或部件的能力。換言之,在電晶體、裝置或部件阻擋跨於電晶體、裝置或部件上的電壓時,傳輸通過電晶體、裝置或部件的總和電流將不會大於在一般開啟狀態傳導期間內平均操作電流的0.001倍。
在一些情況中,半橋接(諸如第7圖的121”至123”)的電晶體不能夠傳輸對特定電路應用而言足夠大的電流。在這些情況中,可修改半橋接121”至123”,而以兩個並聯連接的電晶體代替高側電晶體與低側電晶體。第12圖圖示此種半橋接配置的佈局。第12圖的佈局被最佳化以最小化並聯連接電晶體之間的寄生電感。
在第12圖的半橋接中,高側電晶體105’與105”並聯連接,且高側電晶體各別的源極與汲極電氣連接在一起,而低側電晶體106’與106”亦同。電晶體105’與105”的源極被連接至共同源極引線,且電晶體105’與105”的閘極被連接至共同閘極引線。電晶體106’與106”的源極被連接至共同源極引線,且電晶體106’與106”的閘極被連接至共同閘極引線。電晶體105’/105”各別的源極引線與閘極引線88與87,皆位於第三DBC基板126上。在DBC基板126上側金屬層中蝕刻通過溝槽,以使引線88與87與彼此電氣阻隔,並與DBC基板126上側金屬層的剩餘部分阻隔。如第12圖圖示,溝槽之一者圍繞源極引線88,而另一溝槽圍繞閘極引線87。
DBC基板126係裝設為直接位於DBC基板96’上,而使DBC基板96’的上側金屬層在底下傳輸,且在DBC基板126下方
連續。使DBC基板96’上側金屬層為連續,減少了電晶體105’與105”源極之間以及電晶體106’與106”汲極之間的寄生電感,從而增進了切換期間的效能。
本文所說明的電路被設計為使電晶體可以高切換速率切換,而不造成電路去穩定(destabilize),或對電路部件造成傷害。例如,在使用諸如III-N HEMT(通常能夠達到高切換速率)的電晶體作為電晶體105’/105”與106’/106”時,可能夠達到大於40伏特/奈秒的電壓切換速率dV/dt與大於5安培/奈秒的電流切換速率dI/dt,而不使跨任意電晶體的電壓在切換期間超過2*Vhigh,其中Vhigh為電路高電壓。在一些情況中,可能夠達到大於90伏特/奈秒的電壓切換速率dV/dt與大於10安培/奈秒的電流切換速率dI/dt,而不使跨任意電晶體的電壓在切換期間超過2*Vhigh或1.5*Vhigh。
第13A圖與第13B圖圖示說明在切換半橋接高側裝置(第13A圖)與低側裝置(第13B圖)以將負載(亦即電感器)電流從0安培提升至50安培期間內的電流與電壓裝置特性,其中半橋接功率反相器係以520 V高電壓供應(亦即提供大於500V之電壓的電源供應)來操作。半橋接係設計為與第12圖的半橋接類似,但使用了混合切換裝置(諸如第10A圖至第10B圖或第11F圖的混合切換裝置)來代替電晶體105’/105”與106’/106”。高側裝置代表連接至高電壓供應的裝置,例如第12圖的電晶體105’/105”。低側裝置代表連接至DC地的裝置,例如第12圖的裝置106’/106”。將電晶體的切換時間設為3奈秒(小於5奈秒,且實質上小於10奈秒,
10奈秒之切換時間將為具有較高寄生電感的電路所需要)。如圖示,在高側裝置從開啟狀態(其中高側裝置傳導50安培或更少(諸如40至50安培))切換至關閉狀態(其中整體高電壓被高側裝置阻擋)時,跨高側裝置上的電壓從不超過700 V(為電路高電壓的1.35倍)。在切換通過高側裝置的電流小於30安培時(例如20至30安培),跨高側裝置上的電壓從不超過630 V(為電路高電壓的1.21倍)。在低側裝置從開啟狀態(其中低側裝置傳導50安培或更少(例如40至50安培))切換至關閉狀態(其中整體高電壓被低側裝置阻擋)時,跨低側裝置上的電壓從不超過700 V(為電路高電壓的1.35倍)。在切換的電流小於30安培時(例如20至30安培),跨高側裝置上的電壓從不超過610 V(為電路高電壓的1.17倍)。所支援的跨高側與低側電晶體上之超過高電壓供應的電壓部分,係低於傳統功率轉換器所能達成的電壓部分。
已說明了數種實施例。儘管如此,將瞭解到可進行各種修改,而不脫離本文所說明的技術與裝置的精神與範圍。因此,其他實施例係位於下列申請專利範圍的範圍內。
37‧‧‧金屬層下部
38‧‧‧金屬層上部
74‧‧‧DBC基板
75‧‧‧金屬層
76‧‧‧溝槽
77‧‧‧接地引線
78‧‧‧高電壓引線
79‧‧‧輸出引線
87‧‧‧閘極引線
88‧‧‧源極引線
91‧‧‧電容器
96’‧‧‧DBC基板
105’‧‧‧高側電晶體
105”‧‧‧高側電晶體
106’‧‧‧低側電晶體
106”‧‧‧低側電晶體
126‧‧‧第三DBC基板
Claims (39)
- 一種電氣模組,包含:一第一基板,該第一基板包含在一第一絕緣層上的一第一金屬層,該第一金屬層包含一第一部分與一第二部分;一第二基板,該第二基板包含在一第二金屬層與一第三金屬層之間的一第二絕緣層,該第二基板具有一第二表面與一第三表面,該第三表面位於該第二基板相對於該第二表面的一相對側上,該第二絕緣層的一面積比該第一絕緣層的一面積小;以及一第一半導體裝置;一第二半導體裝置,該第二半導體裝置裝設在該第一金屬層的該第二部分上;其中該第二基板係裝設在該第一金屬層的該第一部分上,且該第二基板不位於該第一金屬層的該第二部分上,且該第二基板的該第二表面直接接觸該第一金屬層;以及該第一半導體裝置係裝設於該第二基板的該第三表面上;其中該第一半導體裝置包含一第一電晶體,該第二半導體裝置包含一第二電晶體,且該第一電晶體的一源極與該第二電晶體的一汲極係電氣連接至該第三金屬層。
- 如請求項1所述之電氣模組,其中該第一基板與該第二基板包含直接覆銅基板。
- 如請求項1所述之電氣模組,其中該第一電晶體或該第二電晶體為一III-氮族電晶體。
- 如請求項1所述之電氣模組,該第一金屬層進一步包含一第三部分,其中該第三部分藉由一溝槽與該第二部分電氣阻隔,該溝槽係形成為通過該第三部分與該第二部分之間的該第一金屬層。
- 如請求項4所述之電氣模組,該電氣模組進一步包含一電容器,其中該電容器的一第一端點係電氣連接至該第一金屬層的該第三部分,該電容器的一第二端點係電氣連接至該第一金屬層的該第二部分,且該電容器延伸於該溝槽之上。
- 如請求項4所述之電氣模組,其中該第一電晶體的一汲極係電氣連接至該第一金屬層的該第三部分。
- 如請求項4所述之電氣模組,其中該第一半導體裝置進一步包含一第三電晶體,該第三電晶體的一源極係電氣連接至該第一電晶體的一汲極,且該第一電晶體的一汲極係電氣連接至該第一金屬層的該第三部分。
- 一種電氣模組,包含:一第一基板,該第一基板包含在一第一絕緣層上的一第一金屬層,該第一金屬層包含一第一部分與一第二部分;一第二基板,該第二基板包含在一第二金屬層與一第三金屬層之間的一第二絕緣層,該第二基板具有一第二表面與一第三表面,該第三表面位於該第二基板相對於該第二表面的一相對側上,該第二絕緣層的一面積比該第一絕緣層的一面積小;以及一第三基板,該第三基板包含在一第四金屬層與一第五金屬層之間的一第三絕緣層,該第三絕緣層的一面積比該第二絕緣層的一面積小,其中該第三基板係裝設為直接位於該第二基板的該第三表面之上;一第一半導體裝置;一第二半導體裝置,該第二半導體裝置裝設在該第一金屬層的該第二部分上;其中該第二基板係裝設在該第一金屬層的該第一部分上,且該第二基板不位於該第一金屬層的該第二部分上,且該第二基板的該第二表面直接接觸該第一金屬層;以及該第一半導體裝置係裝設於該第二基板的該第三表面上。
- 如請求項8所述之電氣模組,其中該第一半導體裝置包含一第一電晶體,該第二半導體裝置包含一第二電晶體,且該第一電晶體的一源極與該第二電晶體的一汲極皆電氣連接至該第三金屬層。
- 如請求項9所述之電氣模組,該第一金屬層進一步包含一第三部分,其中該第三部分藉由一溝槽與該第二部分電氣阻隔,該溝槽係形成為通過在該第三部分與該第二部分之間的該第一金屬層。
- 如請求項10所述之電氣模組,該電氣模組進一步包含一電容器,其中該電容器的一第一端點係電氣連接至該第一金屬層的該第三部分,該電容器的一第二端點係電氣連接至該第一金屬層的該第二部分,且該電容器延伸於該溝槽之上。
- 如請求項10所述之電氣模組,其中該第一電晶體的一汲極係電氣連接至該第一金屬層的該第三部分。
- 如請求項10所述之電氣模組,其中該第一半導體裝置進一步包含一第三電晶體,該第三電晶體的一源極係電氣連接至該第一電晶體的一汲極,且該第一電晶體的一汲極係電氣連接至該第一金屬層的該第三部分。
- 一種電氣模組,包含:一第一基板,該第一基板包含在一第一絕緣層上的一第一金屬層,該第一金屬層包含一第一部分與一第二部分;一第二基板,該第二基板包含在一第二金屬層與一第三金屬層之間的一第二絕緣層,該第二基板具有一第二表面與一第三表面,該第三表面位於該第二基板相對於該第二表面的一相對側上,該第二絕緣層的一面積比該第一絕緣層的一面積小;以及一第一半導體裝置;一第二半導體裝置,該第二半導體裝置裝設在該第一金屬層的該第二部分上;其中該第二基板係裝設在該第一金屬層的該第一部分上,且該第二基板不位於該第一金屬層的該第二部分上,且該第二基板的該第二表面直接接觸該第一金屬層;以及該第一半導體裝置係裝設於該第二基板的該第三表面上;其中該第一半導體裝置與該第二半導體裝置包含電晶體,該等電晶體為一半橋接(half bridge)的部分。
- 一種製造一電氣模組的方法,包含以下步驟: 提供一第一基板,該第一基板包含在一第一絕緣層上的一第一金屬層,該第一基板具有一第一表面,該第一基板包含一第一部分與一第二部分;提供一第二基板,該第二基板包含在一第二金屬層與一第三金屬層之間的一第二絕緣層,該第二基板具有一第二表面與一第三表面,該第三表面位於該第二基板相對於該第二表面的一相對側上;將該第二基板裝設在該第一基板的該第一部分中的該第一表面上,且該第二表面位於該第三表面與該第一表面之間;以及將一第一半導體裝置裝設在該第二基板的該第三表面上;將一第二半導體裝置裝設在該第一基板的該第二部分中的該第一基板的該第一表面上;其中該第一半導體裝置包含一第一電晶體,該第二半導體裝置包含一第二電晶體,且該第一電晶體的一源極與該第二電晶體的一汲極係電氣連接至該第三金屬層。
- 如請求項15所述之方法,其中該第一電晶體或該第二電晶體包含源極電極、閘極電極與汲極電極,該等電極之每一者位於該電晶體的一第一側上。
- 如請求項15所述之方法,其中該第一電晶體或該第二電晶體為一III-氮族電晶體。
- 如請求項15所述之方法,其中該第一電晶體或該第二電晶體為一切換電晶體,該切換電晶體經配置為硬式切換(hard-switched)。
- 如請求項15所述之方法,其中該切換電晶體的一切換時間為約3奈秒或更小。
- 如請求項15所述之方法,其中在該第二基板上裝設該第一半導體裝置之步驟或在該第一基板上裝設該第二半導體裝置之步驟,係於將該第二基板裝設在該第一基板的該第一部分中的該第一表面上之步驟之前執行。
- 如請求項15所述之方法,其中該第二基板的該第二表面係直接附接至該第一基板的該第一部分中的該第一基板的該第一表面。
- 如請求項15所述之方法,其中該第一基板的該第一表面包含該第一金屬層的一表面,該第二基板的該第二表面包含該第二金屬層的一表面,且該第二基板的該第三表面包含該第三金屬層的一表面。
- 如請求項15所述之方法,該方法進一步包含以下步驟:部分移除該第一金屬層。
- 如請求項23所述之方法,其中部分移除該第一金屬層之步驟包含以下步驟:形成通過該第一金屬層的一阻隔溝槽。
- 如請求項23所述之方法,其中部分移除該第一金屬層之步驟,係於將該第二基板裝設在該第一基板的該第一部分中的該第一表面上之步驟之前執行。
- 如請求項15所述之方法,其中將該第二基板裝設在該第一基板的該第一部分上之步驟,包含以下步驟:將該第二基板的該第二表面焊接至該第一基板的該第一表面的該第一部分。
- 如請求項15所述之方法,其中該第一絕緣層或該第二絕緣層包含一陶瓷材料。
- 如請求項15所述之方法,其中該第一金屬層、該第二金屬層或該第三金屬層之一或更多者包含銅。
- 如請求項15所述之方法,其中該第一基板或該第二基板為一直接覆銅(DBC)基板。
- 如請求項15所述之方法,其中該第一基板的該第一表面的一面積,係大於該第二基板的該第二表面的一面積。
- 如請求項15所述之方法,其中該電氣模組包含一半橋接。
- 如請求項15所述之方法,其中該電氣模組包含一功率反相器或一功率轉換器。
- 如請求項15所述之方法,該方法進一步包含以下步驟:將一電容器裝設在該電氣模組上,該電容器具有一第一端點與一第二端點。
- 如請求項33所述之方法,該方法進一步包含以下步驟:形成一溝槽為通過該第一基板的該第二部分中的該第一金屬層,且其中將該電容器裝設在該電氣模組上之步驟包含以下步驟:將該第一端點連接至該溝槽的一第一側上的該第一金屬層,並將該第二端點連接至該溝槽的一第二側上的該第一金屬層。
- 如請求項15所述之方法,其中該第一基板進一步包含一第四金屬層,該第四金屬層位在該第一絕緣層與該第一金屬層相對的一相對側上。
- 一種電氣模組,包含:一第一基板,該第一基板包含在一第一金屬層與一第二金屬層之間的一第一絕緣層;一第二基板,該第二基板包含在一第三金屬層與一第四金屬層之間的一第二絕緣層,該第二基板的一面積比該第一基板的一面積小,該第二基板係裝設在該第一基板的一第一部分上,且該第三金屬鄰接於或接觸該第二金屬;一第一切換裝置,該第一切換裝置具有一第一閘極與一第一源極;以及一第二切換裝置,該第二切換裝置具有一第二閘極與一第二源極;其中該第一切換裝置係裝設在該第一基板的該第二金屬層上,且該第二基板位於該第二切換裝置與該第一基板之間。
- 如請求項36所述之電氣模組,其中該第一源極係電氣連接至一第一源極引線,該第一閘極係電氣連接至一第一閘極引線,該第二源極係電氣連接至一第二源極引線,且該第二閘極係電氣連接至一第二閘極引線。
- 如請求項37所述之電氣模組,其中該第一源極引線與該第一閘極引線係裝設在該第一基板的該第二金屬層 上,且該第二源極引線與該第二閘極引線係裝設在該第二基板的該第四金屬層上。
- 如請求項38所述之電氣模組,其中該第一源極引線延伸離開該第一基板的一表面,該第二閘極引線延伸離開該第二基板的一表面,該第一源極引線朝遠離該第二切換裝置的方向彎曲,且該第二源極引線朝遠離該第一切換裝置的方向彎曲。
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WO2013085839A3 (en) | 2013-09-26 |
WO2013085839A2 (en) | 2013-06-13 |
US9818686B2 (en) | 2017-11-14 |
EP2789011B1 (en) | 2019-05-29 |
JP6158210B2 (ja) | 2017-07-05 |
CN104160506B (zh) | 2017-03-15 |
TW201332085A (zh) | 2013-08-01 |
US20160079154A1 (en) | 2016-03-17 |
JP2015506102A (ja) | 2015-02-26 |
EP2789011A4 (en) | 2015-09-16 |
US20130147540A1 (en) | 2013-06-13 |
US9209176B2 (en) | 2015-12-08 |
EP2789011A2 (en) | 2014-10-15 |
CN104160506A (zh) | 2014-11-19 |
US20160240470A1 (en) | 2016-08-18 |
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