TWI606565B - 封裝結構及其製作方法 - Google Patents

封裝結構及其製作方法 Download PDF

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Publication number
TWI606565B
TWI606565B TW105128012A TW105128012A TWI606565B TW I606565 B TWI606565 B TW I606565B TW 105128012 A TW105128012 A TW 105128012A TW 105128012 A TW105128012 A TW 105128012A TW I606565 B TWI606565 B TW I606565B
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Taiwan
Prior art keywords
pads
openings
package structure
resist layer
substrate
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TW105128012A
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English (en)
Other versions
TW201807797A (zh
Inventor
鄭有為
Original Assignee
金寶電子工業股份有限公司
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Publication date
Application filed by 金寶電子工業股份有限公司 filed Critical 金寶電子工業股份有限公司
Priority to TW105128012A priority Critical patent/TWI606565B/zh
Priority to US15/293,309 priority patent/US20180061793A1/en
Priority to CN201610903318.XA priority patent/CN107785331A/zh
Priority to JP2017029757A priority patent/JP6764355B2/ja
Priority to EP17172245.7A priority patent/EP3291285A1/en
Application granted granted Critical
Publication of TWI606565B publication Critical patent/TWI606565B/zh
Publication of TW201807797A publication Critical patent/TW201807797A/zh

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Description

封裝結構及其製作方法
本發明是有關於一種半導體結構及其製作方法，且特別是有關於一種半導體封裝結構及其製作方法。
隨著科技進步，各種電子裝置朝向小型化及多功能化的方向發展。因此為了使電子裝置中的晶片能傳輸或接收更多的訊號，電性連接於晶片與線路板之間的接點也朝向高密度化的方向發展。於習知技術中，電性連接晶片與基板的方法多為先在晶片的接點與基板的導電結構之間配置異方性導電膜（Anisotropic Conductive Film, ACF），且晶片的接點與基板的導電結構皆面向異方性導電膜。然後，壓合晶片的接點、異方性導電膜與基板的導電結構，以藉由異方性導電膜中的導電顆粒電性連接晶片的每一接點與玻璃基板上與前述接點對應的導電結構。
此外，在此種封裝製程中，須先對異方性導電膜進行熱壓，以將異方性導電膜貼附於基板的壓合區域上，接著再高溫壓合晶片於異方性導電膜上，使晶片上的接墊與基板上的焊墊能夠藉由異方性導電膜中的導電粒子而導通。上述兩個步驟須分開進行，因而增加製程的複雜度，且有應用領域的限制，使得製程時間增加，進而導致產能下降。並且，異方性導電膜在經過多次按壓及環境的變化後會造成異方性導電膜的阻抗不穩定，進而導致封裝結構的電性表現下降。再者，異方性導電膜的價格昂貴，故使用異方性導電膜亦會使封裝結構的成本增加。
本發明提供一種封裝結構及其製作方法，其可簡化製程並可提升封裝結構的電性表現。
本發明的封裝結構的製作方法包括下列步驟。提供一基板，基板包括多個焊墊。形成一圖案化防焊層於基板上，圖案化防焊層包括多個階梯狀開口，階梯狀開口分別暴露焊墊。設置一高分子膠體於圖案化防焊層的一頂面，其中熱熔膠體至少環繞焊墊的一設置區域並設置於兩相鄰焊墊之間。分別設置多個焊料於焊墊上，其中焊料分別位於階梯狀開口內。設置一晶片於基板上，其中晶片包括一主動表面以及多個接墊，接墊位於主動表面，並透過焊料而與焊墊連接。對焊料進行一迴焊製程，並使高分子膠體填充於圖案化防焊層的一頂面與主動表面之間。
本發明的封裝結構包括一基板、一圖案化防焊層、多個焊料、一晶片以及一高分子膠體。基板包括多個焊墊。圖案化防焊層設置於基板上並包括多個階梯狀開口。階梯狀開口分別暴露焊墊。焊料設置於焊墊上並位於階梯狀開口內。晶片設置於基板上並包括一主動表面以及多個接墊。接墊設置於主動表面並透過焊料而與焊墊連接。高分子膠體填充於圖案化防焊層的一頂面與主動表面之間，其中熱熔膠體至少環繞焊料的一設置區域並填充於兩相鄰焊料之間。
在本發明的一實施例中，上述的形成圖案化防焊層於基板上的步驟更包括：形成一第一防焊層於基板上，其中第一防焊層覆蓋焊墊。對第一防焊層進行一第一圖案化製程以形成包括多個第一開口的第一圖案化防焊層，第一開口分別暴露焊墊。形成一第二防焊層於第一防焊層上。對第二防焊層進行一第二圖案化製程以形成包括多個第二開口的第二圖案化防焊層，其中第二開口分別暴露第一開口及環繞第一開口的部分第一圖案化防焊層，各第一開口及對應的第二開口共同定義出各階梯狀開口。
在本發明的一實施例中，上述的高分子膠體設置於第二圖案化防焊層上。
在本發明的一實施例中，上述的第一圖案化製程以及第二圖案化製程包括曝光顯影製程。
在本發明的一實施例中，上述的高分子膠體環繞各階梯狀開口。
在本發明的一實施例中，上述的高分子膠體的材料包括合成聚酯樹脂。
在本發明的一實施例中，上述的封裝結構的製作方法更包括：在分別設置焊料於焊墊上之前，對高分子膠體進行一預固化製程，以使高分子膠體呈現一半固化狀態。
在本發明的一實施例中，上述的預固化製程包括對高分子膠體進行加熱。
在本發明的一實施例中，上述的對高分子膠體進行加熱的一加熱溫度實質上介於攝氏50度至80度之間。
在本發明的一實施例中，上述的分別設置焊料於焊墊上的方法包括網板印刷。
在本發明的一實施例中，上述的設置高分子膠體於圖案化防焊層的頂面的方法包括網板印刷。
在本發明的一實施例中，上述的基板包括軟性電路板。
在本發明的一實施例中，上述的圖案化防焊層包括一第一圖案化防焊層以及一第二圖案化防焊層。第一圖案化防焊層設置於基板上並包括多個第一開口，第一開口分別暴露焊墊。第二圖案化防焊層設置於第一圖案化防焊層上並包括多個第二開口，第二開口分別暴露第一開口及環繞第一開口的部分第一圖案化防焊層，其中各第一開口及對應的第二開口共同定義出各階梯狀開口。
在本發明的一實施例中，上述的高分子膠體填充於第二圖案化防焊層與晶片之間。
在本發明的一實施例中，上述的焊料分別填充階梯狀開口。
在本發明的一實施例中，上述的各接墊的尺寸實質上大於各焊墊的尺寸。
基於上述，本發明將高分子膠體設置於具有階梯狀開口的圖案化防焊層的頂面上，其中，階梯狀開口暴露基板的焊墊，並且，高分子膠體環繞焊墊的設置區域並設置於兩相鄰焊墊之間。之後，在將晶片透過焊料而設置於基板上，如此，由於焊料在迴焊固化後會收縮，進而壓縮高分子膠體，使高分子膠體可填滿圖案化防焊層的頂面與晶片的主動表面之間的間隙，因而可達到密封的效果，防止外界的水氣滲入封裝結構內。因此，本發明可透過一次打件作業即同時完成封裝結構的防水結構的製作，因而可取代習知的異方性導電膜的製程，進而簡化封裝結構的製程步驟及降低生產成本。此外，由於本發明是利用表面黏著技術（surface-mount technology SMT）而將晶片設置於基板上，故相對於異方性導電膜來說，其阻抗較為穩定，因此，本發明亦可提升封裝結構的電性表現。
為讓本發明的上述特徵和優點能更明顯易懂，下文特舉實施例，並配合所附圖式作詳細說明如下。
有關本發明之前述及其他技術內容、特點與功效，在以下配合參考圖式之各實施例的詳細說明中，將可清楚的呈現。以下實施例中所提到的方向用語，例如：「上」、「下」、「前」、「後」、「左」、「右」等，僅是參考附加圖式的方向。因此，使用的方向用語是用來說明，而並非用來限制本發明。並且，在下列各實施例中，相同或相似的元件將採用相同或相似的標號。
圖1A至圖1K是依照本發明的一實施例的一種封裝結構的製作方法之流程剖面示意圖。本實施例的封裝結構的製作方法可包括下列步驟。首先，提供如圖1A所示之一基板110，其中，基板110包括多個焊墊112。接著，形成如圖1H所示之一圖案化防焊層120於基板110上，其中，圖案化防焊層120如圖1H所示之包括多個階梯狀開口122，且階梯狀開口122分別暴露基板110上的焊墊112。在本實施例中，基板110可為一軟性電路板，當然，本發明並不以此為限。在其他實施例中，基板110亦可為一印刷線路板或其他適合的基板。
舉例而言，上述的圖案化防焊層120的製作方法可包括下列步驟：首先如圖1B所示之形成一第一防焊層124a於基板110上。在本實施中，第一防焊層124a可例如全面性覆蓋基板110上表面並覆蓋焊墊112。接著，再對第一防焊層124a進行一第一圖案化製程，此第一圖案化製程可例如為一曝光顯影製程。詳細而言，上述的圖案化製程可如圖1C所示之設置具有多個開口的圖案化光阻層125於第一防焊層124a上，上述開口暴露部分的第一防焊層124a，接著再對暴露的第一防焊層124a進行曝光製程，以移除被暴露的第一防焊層124a而形成如圖1D所示之第一圖案化防焊層124，其中，第一圖案化防焊層124包括多個第一開口122a，且第一開口122a分別暴露焊墊112。須說明的是，上述的圖案化製程是以正型光阻為例，當然，在其他實施例中，圖案化製程亦可採用負型光阻並對應改變圖案化光阻層的圖案來形成第一圖案化防焊層124，本發明並不以此為限。
接著，形成如圖1E所示之一第二防焊層126a於第一圖案化防焊層124上，再對第二防焊層126a進行一第二圖案化製程，此第二圖案化製程亦可為一曝光顯影製程。詳細而言，上述的圖案化製程可如圖1F所示之設置具有多個開口的圖案化光阻層127於第二防焊層126a上，上述開口暴露部分的第二防焊層126a，接著，再對暴露的第二防焊層126a進行曝光製程，以移除被暴露的第二防焊層126a而形成如圖1G所示之第二圖案化防焊層126，其中，第二圖案化防焊層126包括多個第二開口122b，且第二開口122b分別暴露第一開口122a及環繞第一開口122a的部分第一圖案化防焊層124。也就是說，如圖1H所示之圖案化防焊層120可由第一圖案化防焊層124及第二圖案化防焊層126所堆疊而成，且第一圖案化防焊層124的第一開口122a及第二圖案化防焊層126的第二開口122b共同定義出圖案化防焊層120的階梯狀開口122。相似地，第二圖案化製程亦可採用負型光阻並對應改變圖案化光阻層的圖案來形成第二圖案化防焊層126，本發明並不以此為限。
圖2是依照本發明的一實施例的高分子膠體於圖案化防焊層上的配置之俯視示意圖。圖3是依照本發明的另一實施例的高分子膠體於圖案化防焊層上的配置之俯視示意圖。請先參照圖1H及圖2，接著，設置一高分子膠體130於圖案化防焊層120的頂面，詳細而言，高分子膠體130設置於第二圖案化防焊層126的上表面。高分子膠體130通常可由許多相同的、簡單的結構單元通過共價鍵重複連接而成的高分子量（通常可達10至10 6）化合物。在本實施例中，高分子膠體的材料可包括合成聚酯樹脂（synthetic polyester resin）或其他適合的高分子防水絕緣材料，並且，設置高分子膠體130於圖案化防焊層120上的方法可包括網板印刷。當然，本實施例僅用以舉例說明，本發明並不以此為限。在本實施例中，高分子膠體130可至少環繞多個焊墊112的一設置區域，並可設置於兩相鄰焊墊112之間。換句話說，高分子膠體130可沿著多個焊墊112的外圍設置，以環繞所述的多個焊墊112，並可至少設置於兩相鄰焊墊112之間。舉例來說，高分子膠體130可如圖2所示之環繞多個焊墊112的外圍，並橫跨於上下兩列焊墊112之間。此外，在另一實施例中，高分子膠體130也可如圖3所示之環繞各階梯狀開口122，也就是環繞於各個焊墊112的周圍。
接著，在一實施例中，可例如對高分子膠體130進行一預固化製程，以使高分子膠體130呈現一半固化狀態。具體而言，上述的預固化製程可例如是對高分子膠體130進行加熱，其加熱溫度約介於攝氏50度至80度之間。當然，本實施例僅用以舉例說明，本發明並不以此為限。
請接續參照圖1I，分別設置多個焊料140於焊墊112上，其中焊料140分別位於階梯狀開口122內。在本實施例中，設置焊料140於焊墊112上的方法可包括網板印刷，當然，本發明並不以此為限。接著，再如圖1J所示之設置一晶片150於基板110上，其中，晶片150包括一主動表面152以及多個接墊154。接墊154位於主動表面152上，並透過焊料140而與焊墊112連接。換句話說，本實施例是利用表面黏著技術（surface-mount technology SMT）而將晶片150設置於基板110上。在本實施例中，各接墊154的尺寸可如圖1J所示之略大於各焊墊112的尺寸，當然，本發明並不以此為限。高分子膠體130則位於圖案化防焊層120的頂面與晶片150的主動表面152之間。
接著，對焊料140進行一迴焊製程，以將晶片150固設於基板110上，迴焊後的焊料140可完全填充圖案化防焊層120的階梯狀開口122。同時，由於焊料140在迴焊固化後會收縮，進而壓縮高分子膠體130，使高分子膠體130可完全填充於圖案化防焊層120的頂面與主動表面之間的間隙，因而可達到密封的效果，防止外界的水氣滲入封裝結構100內。如此，即可大致完成如圖1K所示的封裝結構100。
就結構上而言，依上述製作方法所形成的封裝結構100可包括基板110、一圖案化防焊層120、多個焊料140、一晶片150以及一高分子膠體130。基板110包括多個焊墊112。圖案化防焊層120設置於基板110上並包括多個階梯狀開口112。階梯狀開口122分別暴露焊墊112。詳細而言，圖案化防焊層120包括如圖1H所示的第一圖案化防焊層124以及第二圖案化防焊層126。第一圖案化防焊層124設置於基板110上並包括多個第一開口122a，且第一開口122a分別暴露焊墊112。第二圖案化防焊層126則設置於第一圖案化防焊層124上並包括多個第二開口122b，且第二開口122b分別暴露第一開口122a及環繞第一開口122a的部分第一圖案化防焊層124，其中，第一開口122a及第二開口122b共同定義出圖案化防焊層120的階梯狀開口122。
並且，焊料140設置於焊墊112上並位於階梯狀開口122內。晶片150設置於基板110上並包括主動表面152以及多個接墊154。接墊154設置於主動表面152並透過焊料140而與焊墊112連接。高分子膠體130則填充於圖案化防焊層120的頂面與晶片150的主動表面152之間，其中，高分子膠體130至少環繞焊料140的設置區域並填充於兩相鄰焊料140之間。
綜上所述，本發明將高分子膠體設置於具有階梯狀開口的圖案化防焊層的頂面上，其中，階梯狀開口暴露基板的焊墊，並且，高分子膠體環繞焊墊的設置區域並設置於兩相鄰焊墊之間。之後，在將晶片透過焊料而設置於基板上，如此，由於焊料在迴焊固化後會收縮，進而壓縮高分子膠體，使高分子膠體可填滿圖案化防焊層的頂面與晶片的主動表面之間的間隙，因而可達到密封的效果，防止外界的水氣滲入封裝結構內。
因此，本發明可透過一次打件作業即同時完成封裝結構的防水結構的製作，因而可取代習知的異方性導電膜的製程，進而簡化封裝結構的製程步驟及降低生產成本。此外，由於本發明是利用表面黏著技術（surface-mount technology SMT）而將晶片設置於基板上，故相對於異方性導電膜來說，其阻抗較為穩定，因此，本發明亦可提升封裝結構的電性表現。
雖然本發明已以實施例揭露如上，然其並非用以限定本發明，任何所屬技術領域中具有通常知識者，在不脫離本發明的精神和範圍內，當可作些許的更動與潤飾，故本發明的保護範圍當視後附的申請專利範圍所界定者為準。
100‧‧‧封裝結構
110‧‧‧基板
112‧‧‧焊墊
120‧‧‧圖案化防焊層
122‧‧‧階梯狀開口
122a‧‧‧第一開口
122b‧‧‧第二開口
124‧‧‧第一圖案化防焊層
124a‧‧‧第一防焊層
125、127‧‧‧圖案化光阻層
126‧‧‧第二圖案化防焊層
126a‧‧‧第二防焊層
130‧‧‧高分子膠體
140‧‧‧焊料
150‧‧‧晶片
152‧‧‧主動表面
154‧‧‧接墊
圖1A至圖1K是依照本發明的一實施例的一種封裝結構的製作方法之流程剖面示意圖。 圖2是依照本發明的一實施例的高分子膠體於圖案化防焊層上的配置之俯視示意圖。 圖3是依照本發明的另一實施例的高分子膠體於圖案化防焊層上的配置之俯視示意圖。
100‧‧‧封裝結構
110‧‧‧基板
112‧‧‧焊墊
120‧‧‧圖案化防焊層
130‧‧‧高分子膠體
140‧‧‧焊料
150‧‧‧晶片
152‧‧‧主動表面
154‧‧‧接墊

Claims (20)

  1. 一種封裝結構的製作方法，包括：提供一基板，該基板包括多個焊墊；形成一圖案化防焊層於該基板上，該圖案化防焊層包括多個階梯狀開口，該些階梯狀開口分別暴露該些焊墊；設置一高分子膠體於該圖案化防焊層的一頂面，其中該高分子膠體至少環繞該些焊墊的一設置區域並設置於兩相鄰焊墊之間，且該頂面為該圖案化防焊層最遠離該基板的表面；分別設置多個焊料於該些焊墊上，其中該些焊料分別位於該些階梯狀開口內；設置一晶片於該基板上，其中該晶片包括一主動表面以及多個接墊，該些接墊位於該主動表面，並透過該些焊料而與該些焊墊連接；以及對該些焊料進行一迴焊製程，並使熱熔膠體填充於該圖案化防焊層的一頂面與該主動表面之間。
  2. 如申請專利範圍第1項所述的封裝結構的製作方法，其中形成該圖案化防焊層於該基板上的步驟更包括：形成一第一防焊層於該基板上，其中該第一防焊層覆蓋該些焊墊；對該第一防焊層進行一第一圖案化製程以形成包括多個第一開口的一第一圖案化防焊層，該些第一開口分別暴露該些焊墊；形成一第二防焊層於該第一圖案化防焊層上；以及 對該第二防焊層進行一第二圖案化製程以形成包括多個第二開口的一第二圖案化防焊層，其中該些第二開口分別暴露該些第一開口及環繞該些第一開口的部分該第一圖案化防焊層，各該第一開口及對應的第二開口共同定義出各該階梯狀開口。
  3. 如申請專利範圍第2項所述的封裝結構的製作方法，其中該高分子膠體設置於該第二圖案化防焊層上。
  4. 如申請專利範圍第2項所述的封裝結構的製作方法，其中該第一圖案化製程以及該第二圖案化製程包括曝光顯影製程。
  5. 如申請專利範圍第1項所述的封裝結構的製作方法，其中該高分子膠體環繞各該階梯狀開口。
  6. 如申請專利範圍第1項所述的封裝結構的製作方法，其中該高分子膠體的材料包括合成聚酯樹脂。
  7. 如申請專利範圍第1項所述的封裝結構的製作方法，更包括：在分別設置該些焊料於該些焊墊上之前，對該高分子膠體進行一預固化製程，以使該高分子膠體呈現一半固化狀態。
  8. 如申請專利範圍第7項所述的封裝結構的製作方法，其中該預固化製程包括對該高分子膠體進行加熱。
  9. 如申請專利範圍第8項所述的封裝結構的製作方法，其中對該高分子膠體進行加熱的一加熱溫度實質上介於攝氏50度至80度之間。
  10. 如申請專利範圍第1項所述的封裝結構的製作方法，其中分別設置該些焊料於該些焊墊上的方法包括網板印刷。
  11. 如申請專利範圍第1項所述的封裝結構的製作方法，其中設置該高分子膠體於該圖案化防焊層的該頂面的方法包括網板印刷。
  12. 如申請專利範圍第1項所述的封裝結構的製作方法，其中該基板包括軟性電路板。
  13. 一種封裝結構，包括：一基板，包括多個焊墊；一圖案化防焊層，設置於該基板上並包括多個階梯狀開口，該些階梯狀開口分別暴露該些焊墊；多個焊料，設置於該些焊墊上並位於該些階梯狀開口內；一晶片，設置於該基板上並包括一主動表面以及多個接墊，該些接墊設置於該主動表面並透過該些焊料而與該些焊墊連接；以及一高分子膠體，填充於該圖案化防焊層的一頂面與該主動表面之間，其中該高分子膠體至少環繞該些焊料的一設置區域並填充於兩相鄰焊料之間，且該頂面為該圖案化防焊層最遠離該基板的表面。
  14. 如申請專利範圍第13項所述的封裝結構，其中該圖案化防焊層包括：一第一圖案化防焊層，設置於該基板上並包括多個第一開 口，該些第一開口分別暴露該些焊墊；以及一第二圖案化防焊層，設置於該第一圖案化防焊層上並包括多個第二開口，該些第二開口分別暴露該些第一開口及環繞該些第一開口的部分該第一圖案化防焊層，其中各該第一開口及對應的第二開口共同定義出各該階梯狀開口。
  15. 如申請專利範圍第14項所述的封裝結構，其中該高分子膠體填充於該第二圖案化防焊層與該晶片之間。
  16. 如申請專利範圍第13項所述的封裝結構，其中該高分子膠體環繞各該階梯狀開口。
  17. 如申請專利範圍第13項所述的封裝結構，其中該些焊料分別填充該些階梯狀開口。
  18. 如申請專利範圍第13項所述的封裝結構，其中該高分子膠體的材料包括合成聚酯樹脂。
  19. 如申請專利範圍第13項所述的封裝結構，其中該基板包括軟性電路板。
  20. 如申請專利範圍第13項所述的封裝結構，其中各該接墊的尺寸實質上大於各該焊墊的尺寸。
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