TWI559363B - 極低矽損失高劑量植入剝離 - Google Patents
極低矽損失高劑量植入剝離 Download PDFInfo
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- TWI559363B TWI559363B TW099143367A TW99143367A TWI559363B TW I559363 B TWI559363 B TW I559363B TW 099143367 A TW099143367 A TW 099143367A TW 99143367 A TW99143367 A TW 99143367A TW I559363 B TWI559363 B TW I559363B
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Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/302—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
- H01L21/306—Chemical or electrical treatment, e.g. electrolytic etching
- H01L21/3065—Plasma etching; Reactive-ion etching
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
- H01L21/3105—After-treatment
- H01L21/311—Etching the insulating layers by chemical or physical means
- H01L21/31127—Etching organic layers
- H01L21/31133—Etching organic layers by chemical means
- H01L21/31138—Etching organic layers by chemical means by dry-etching
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- G—PHYSICS
- G03—PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
- G03F—PHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
- G03F7/00—Photomechanical, e.g. photolithographic, production of textured or patterned surfaces, e.g. printing surfaces; Materials therefor, e.g. comprising photoresists; Apparatus specially adapted therefor
- G03F7/26—Processing photosensitive materials; Apparatus therefor
- G03F7/42—Stripping or agents therefor
- G03F7/427—Stripping or agents therefor using plasma means only
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
- H01L21/3105—After-treatment
- H01L21/311—Etching the insulating layers by chemical or physical means
- H01L21/31105—Etching inorganic layers
- H01L21/31111—Etching inorganic layers by chemical means
- H01L21/31116—Etching inorganic layers by chemical means by dry-etching
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
- H01L21/3105—After-treatment
- H01L21/311—Etching the insulating layers by chemical or physical means
- H01L21/31144—Etching the insulating layers by chemical or physical means using masks
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
- H01L21/3205—Deposition of non-insulating-, e.g. conductive- or resistive-, layers on insulating layers; After-treatment of these layers
- H01L21/321—After treatment
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Description
本發明係關於自一工件表面移除或剝離光阻材料並且移除相關殘留物之方法及裝置。在某些實施例中,此說明書係關於在離子植入或電漿輔助摻雜植入之後用於剝離光阻(低劑量或高劑量植入光阻)之方法及裝置。
此說明書主張自2009年12月11日申請之美國專利申請案第12/636,582號之優先權,並以引用方式併入本文。
光阻係於處理期間在一工件(例如一半導體晶圓)上形成一圖案化塗佈之某些製造製程中所使用之一感光材料。在使該光阻塗佈表面曝露於高能量輻射之一圖案之後,移除該光阻之一部分以顯露下表面,並使剩餘表面得以保護。在未經遮蓋表面及該剩餘光阻上執行半導體製程(諸如蝕刻、沈積及離子植入)。在執行一或多個半導體製程之後,以一剝離操作移除該剩餘光阻。
在離子植入期間,摻雜離子(例如硼離子、二氟化硼離子、銦離子、鎵離子、鉈離子、磷離子、砷離子、銻離子、鉍離子或鍺離子)被加速朝向一工件目標。該等離子植入於該工件之所曝露區域以及該剩餘光阻表面中。該製程可形成井區域(源極/汲極)及輕微摻雜汲極(LDD)區域及雙擴散汲極(DDD)區域。該離子植入用植入物種浸漬該光阻並使該表面耗乏氫。該光阻之外層或結殼形成碳化層,該碳化層之密度可能比下伏塊體光阻層更大。此等兩個層具有不同熱膨脹速率並在不同速率下對剝離製程作出反應。
在後高劑量離子植入光阻中介於該外層與該塊體層之間的差別係極顯著的。在高劑量植入中,離子劑量可大於1 x 1015個離子/平方公分,且能量可自10 Kev至大於100 Kev。習知高劑量植入剝離(HDIS)製程採用氧氣化學,其中遠離製程腔室形成單價氧氣電漿且使該單價氧氣電漿指向該工件表面處。反應性氧與該光阻組合以形成用一真空幫浦移除之氣態副產物。對於HDIS,需要額外氣體來移除具有氧氣之該等植入離子。
主要的HDIS考慮包含剝離速率、殘餘物量及所曝露且下伏薄膜層之薄膜損失。通常在HDIS及剝離之後於基板表面上發現殘留物。該光阻中之高能量植入、結殼之不完全移除及/或植入原子之氧化期間之濺鍍可產生該等殘留物。在剝離之後,該表面應無殘留物或實質上無殘留物以確保高良率並消除對額外殘留物移除處理之需要。可藉由過剝離(即,超過移除所有光阻標稱上所需的剝離製程之一繼續)移除殘留物。不幸的是,在習知HDIS操作中,過剝離有時移除一些下伏功能器件結構。在該器件層處,甚至來自電晶體源極/汲極區域之矽損失極小,仍可不利地影響器件效能及良率,尤其對於在<32奈米設計規則或更小之條件下製造之極淺接面器件而言。
因此需要剝離光阻及離子植入相關殘留物之改良方法及裝置,尤其對於HDIS而言,該等方法及該裝置最小化矽損失並使殘留物較少或無殘留物,並維持一可接受剝離速率。
本發明提供用於自一工件表面剝離光阻並移除離子植入相關殘留物之方法及裝置。根據各種實施例,使用元素氫、含氟氣體及保護劑氣體來產生電漿。活化電漿氣體與高劑量植入光阻發生化學反應,移除結殼及塊體光阻層兩者,並同時保護該工件表面之所曝露部分。在低矽損失之情況中,該工件表面實質上係無殘留物。
以下將參考關聯圖式更詳細地描述本發明之此等及其他特徵及優點。
在本發明之下列詳細描述中,描述數種具體實施例以提供本發明之全文理解。然而,熟習此項技術者將瞭解,本發明可在無此等具體細節之情況下或藉由使用替代元件或製程執行。在其他情況中,並未詳細描述熟習的製程、步驟及組件,以免不必要混淆本發明之諸態樣。
在此說明書中,將交替使用術語「工件」、「半導體晶圓」、「晶圓」及「部分所製造積體電路」。熟習此項技術者將瞭解到該術語「部分所製造積體電路」在其上多個積體電路製造階之任一階期間可指代一矽圓晶。下列詳細描述假設在一晶圓上執行本發明。然而,本發明並無如此限制。該工件可為各種形狀、大小及材料。除半導體晶圓之外,可利用本發明之其他工件包含各種物件(諸如顯示器、印刷電路板及類似物)。
如前所提及,本發明之該等方法及該裝置可用以在高劑量離子植入之後有效率並有效移除光阻材料。本發明並不限於高劑量植入剝離(HDIS)。本發明亦並不限於任何種類的植入離子。舉例而言,所描述方法及裝置可在中等或低劑量植入之後與剝離一起有效地使用。雖然已討論具體摻雜離子(諸如硼離子、砷離子及磷離子),但是該等所描述方法及該等所描述裝置可有效地用以剝離經其他摻雜物(諸如氮、氧、碳、鍺及鋁)浸漬之光阻。
本發明之該等方法及該裝置使用產自含有氫之氣體之電漿。在某些實施例中,該等氣體亦含有弱氧化劑、含氟氣體及保護劑氣體(諸如CF4)。熟習此項技術者將認識到該電漿中存在的實際物種可為衍生自氫、弱氧化劑、含氟氣體及保護劑氣體之不同離子、基團及分子之一混合物。應注意到,隨著該電漿與有機光阻及其他殘留物發生化學反應並將其等分解,反應腔室中可存在其他物種(諸如小碳氫化合物、二氧化碳、水蒸氣及其他揮發性組分)。熟習此項技術者亦將認識到引入至該電漿中之該(該等)初始氣體通常係不同於該電漿中存在的該(該等)氣體以及在剝離期間接觸該工件表面之該(該等)氣體。
圖1A至圖1D描繪離子植入及剝離操作前後的各種半導體製造階。圖1A展示經光阻材料103塗佈之一半導體基板101。該基板101可包含一或多層沈積薄膜(例如,氧化物膜、矽化物接觸件及/或多晶矽薄膜),或可為包含例如一絕緣體上覆矽型基板之一裸矽基板。最初,該光阻材料塗佈整個基板表面。接著使該光阻曝露於通過一遮罩所產生之圖案化輻射並且進一步移除該材料之一部分(例如,圖1A中所展示介於剩餘光阻材料103之間的開口104)。
接著,使該基板曝露於一離子植入製程。在離子植入期間,該工件或該晶圓之表面被植入摻雜離子。該製程可為(例如)一電漿浸漬離子植入(PIII)或離子束植入。該等離子衝擊包含該所曝露矽層101及該光阻103之該基板表面。隨著高能量離子植入,可使少量下伏材料107濺鍍至光阻側壁。參見圖1B。此材料可包含一些植入物種、該電漿或該離子束中之其他材料及該植入之副產物。其等包含矽、鋁、碳、氟、鈦、其他接觸材料(諸如鈷)及元素與化合物形式兩者之氧氣。實際物種取決於在離子植入之前的基板之組合物、光阻及植入物種。
在該所曝露矽層101處,產生一摻雜區域109。離子能量或衝擊強度決定該摻雜區域之深度或厚度。離子通量密度決定摻雜程度。
該等離子亦浸漬產生一結殼層105之該光阻表面。該結殼層105可被碳化並且高度地交聯聚合物鏈。該結殼通常係耗乏氫並經植入物種浸漬。該結殼層105之密度比該塊體光阻層103之密度更密集。相對密度取決於離子通量,同時結殼層之厚度取決於離子能量。
此結殼層105比下方之該塊體光阻103更難以剝離。該結殼層105之移除速率可比該下伏塊體光阻慢50%或75%。該塊體光阻含有相對較高位準經化學鍵合的氮及一些其初始澆鑄溶劑。在提高之晶圓溫度下(例如,高於150℃至高於200℃),該塊體光阻可脫氣並相對於該結殼層膨脹。接著,該整個光阻可隨著該下伏塊體光阻在該結殼下增強壓力而「爆裂(pop)」。光阻爆裂係微粒及製程缺陷之一原因,這係因為該等殘留物尤其難以自該晶圓表面及腔室內部部件清除。隨著高劑量離子植入,介於該結殼層與該下伏塊體光阻層之間的密度差甚至更高。該結殼亦可較厚。
圖1C展示未能完全移除該光阻103及該側壁濺鍍殘留物107之一剝離之後的基板。該側壁濺鍍殘留物107可包含在習知剝離化學下並未形成一揮發性化合物之微粒。此等微粒在一習知剝離操作之後可保留下來。該殘留物亦可包含由習知剝離化學中所使用之反應性氧形成之植入物種之氧化物(諸如氧化硼及氧化砷)。該結殼105之部分亦可保留於該基板上。由於幾何形狀,光阻介層孔之下伏處之結殼側壁及拐角可難以剝離。
在一些情況中,可藉由過剝離、使用含氟化學或濕式清洗該晶圓來移除此等殘留物微粒。已發現習知氧化學中之過剝離導致多餘的矽氧化,但是仍未移除(若存在)氧化硼及氧化砷。在根據本發明所產生的電漿中使用含氟化合物產生可形成揮發性氟化硼及氟化砷之氟基團。這有助於移除殘留物,但是不幸的是,其亦可蝕刻來自該基板之下伏矽及氧化矽。根據本發明之實施例之特定剝離含氟化學之使用緩和此問題。
矽損失係光阻厚度、結殼厚度及百分比過剝離之一函數。移除較厚的光阻之較長並更多具有侵蝕性的過剝離亦可移除更多的矽。對於具有較厚的結殼之光阻,結殼層與塊體光阻層之間的差別甚至係更明顯的。較厚的結殼側壁及拐角甚至更難以剝離。因此,經設計以移除厚的結殼之剝離製程亦易於移除更多的矽。除殘留物移除之外,過剝離亦可用以解決製程均勻性及幾何形狀問題。過剝離係超過移除所有光阻標稱上所需的剝離製程之一繼續。若在該晶圓(但非其它)之一些區域中完全移除該光阻,則該剝離製程之繼續將引起自已剝離之區域移除之額外材料(通常係矽及氧化矽)。典型的過剝離係大約100%。
圖1D展示移除所有殘留物之後的基板。根據各種實施例,在無額外矽損失或氧化及最小延遲之情況下移除該殘留物。在某些實施例中,該剝離製程使其無殘留物並因此減小製程步驟之數目。
圖2A至圖2D描繪針對該器件包含一金屬閘極之一特定實施例之離子植入及剝離操作前後之各種半導體製造階。圖2A展示離子植入之前包含半導體基板201上之金屬閘極堆疊210及圖案化光阻203之部分製造的器件。注意到,在所繪示圖式中,該圖案化光阻203部分掩蓋金屬閘極堆疊210之視圖。在某些實施例中,基板201係一絕緣體上覆矽型基板。淺溝渠隔離(STI)區域205係內嵌入基板201且大致上係用一絕緣材料(諸如氧化矽)填充之溝渠。圖2B展示包含離子束通量214及重新濺鍍通量216之植入期間之器件。該重新濺鍍通量216使基板材料(Si、STI及氮化矽(SiN))沈積於側壁上。植入之後,在如圖2C所示之該塊體光阻203頂部(215a)及側壁(215b)上形成一結殼215。歸因於該離子植入束通量214之角度以及來自該重新濺鍍通量216之側壁沈積,在植入期間可使該頂部結殼215a及該側面結殼215b經歷不同環境。使用本文所描述的該等製程,移除該塊體光阻203及該等結殼構形215a及215b,並使金屬閘極210未損壞且使來自基板201及STI區域205之表面之表面材料之損失最小,如圖2D所示。
本文所描繪的該等方法移除光阻及殘留物,同時最小化矽損失及對閘極堆疊之損壞。根據各種實施例,金屬閘極堆疊可包含氮化鈦(TiN)、鉭、氮化鉭或鎢之一或多者。一高k閘極介電質(諸如氧化鉿、氧化鋯、氧化鈦)可沈積於基板與金屬閘極之間。不同於多晶矽閘極,金屬閘極與習知基於氧氣剝離化學不相容。而且,習知基於氧氣化學導致高矽損失。
本發明之一態樣係關於限制矽損失之高劑量植入光阻及殘留物移除之新穎剝離化學。根據各種實施例,光阻及殘留物係曝露於由分子氫、弱氧化劑、含氟化合物及保護劑化合物形成之一電漿。所揭示之製程達成一實質上無殘留物剝離製程並使矽損失最小,且與金屬閘極相容。在並未藉由任意特定理論或反應機制限制之情況下,據信該電漿中之氟基團與製程氣體中之氫氣組合以形成氟化氫(HF)而非保留為氟基團。據信矽損失減小,部分係因為保護劑化合物與表面矽發生化學反應以形成保護聚合薄膜、碳化物、氮化物或其他非氧化物保護層,其等具有低於HF中之氧化物之蝕刻速率。
製程化學
如所指示,剝離製程涉及自包含各種組分氣體之一氣體產生一電漿。本文所描述的剝離化學係基於氫氣而非基於氧氣。分子氫(H2)係產生電漿之氣體之主要組分,其中1,000至40,000 sccm(例如,1,000至6,000 sccm)H2在幕後運行,該產生電漿氣體之其他組分之例示性流速係至少一數量級。根據各種實施例,該等其他組分氣體包含含氟化合物及保護劑化合物。在許多實施例中,包含二氧化碳或其他弱氧化劑,但是在某些實施例中並未包含二氧化碳或其他弱氧化劑。
弱氧化劑之實例包含碳氧化物(諸如二氧化碳(CO2)、一氧化碳(CO))、氮氧化物(諸如一氧化二氮(N2O)、一氧化氮(NO)、二氧化氮(NO2))及硫氧化物(諸如氧化硫(SO)及二氧化硫(NO2))。其他弱氧化物之實例包含任意含氧碳氫化合物(CXHYQZ)及水(H2O)。在某些實施例中,該弱氧化劑係含碳化合物。在特定實施例中,二氧化碳係用作該弱氧化劑,這係因為二氧化碳便宜、安全且有效。
該含氟氣體可為三氟化氮(NF3)、六氟化硫(SF6)、六氟乙烷(C2F6)、四氟甲烷(CF4)、三氟甲烷(CHF3)、二氟甲烷(CH2F2)、八氟丙烷(C3F8)、八氟環丁烷(C4F8)、八氟[1-]丁烷(C4F8)、八氟[2-]丁烷(C4F8)、八氟異丁烯(C4F8)、氟(F2)及類似物。在特定實施例中,該含氟氣體係NF3、SF6、F2或HF汽。如下所描述,已發現此等氣體係比某些含碳蝕刻劑(諸如CF4)品質更高之剝離氣體。在某些實施例中,該含氟化合物係不含碳化合物。在一特定實施例中,NF3係用作該含氟氣體。如上所討論,據信在該剝離期間該腔室中之主要蝕刻劑組分係HF汽。因此,在某些實施例中,可使用易於轉化為HF汽之任意含氟氣體。
該保護劑化合物大致上係含碳化合物,但是在某些實施例中,其可為含氮化合物。在某些實施例中,該保護劑氣體亦可為含氟化合物。舉例而言,在某些實施例中,該保護劑化合物係CF4。應注意到該製程化學大致上包含含氟化合物(例如,NF3)及保護劑化合物(CF4)兩者,其中此等化合物係相異的。即,甚至在該保護劑化合物含有氟之情況中,同樣亦提供一相異含氟化合物。在某些實施例中,該含氟化合物與該保護劑化合物相比係一明顯更強的蝕刻劑。在某些實施例中,該保護劑化合物係含碳化合物,其中實例包含CF4及CH4。在某些實施例中,該保護劑化合物係含氮化合物。在並未由一特定理論或機制限制之情況下,據信該保護劑化合物與形成對蝕刻更具有抵抗力之(例如)碳化物及氮化物之矽/氧化矽表面發生化學反應或提供反應物物種,以與形成對蝕刻更具有抵抗力之(例如)碳化物及氮化物之矽/氧化矽表面發生化學反應。舉例而言,HF中之氮化物之蝕刻速率比氧化物之蝕刻速率小大約50倍之一數量級,其中碳化物之蝕刻速率大約比氮化物之蝕刻速率小至少大約一數量級。在某些實施例中,含氧化合物可用作保護劑化合物,前提係該等化合物並非強氧化劑。
在一特定實施例中,該剝離化學係H2/CO2/NF3/CF4,其中例示性相對體積比率係100/0.1-1/.5-4/2-5。在一實施例中,一比率係3000/32/15/100。總氣體流速、弱氧化劑、含氟氣體、保護劑氣體之相對含量及該剝離腔室中之其他條件可取決於(其他因素之中)電漿類型(下游對直接)、射頻(RF)功率、腔室壓力、基板(晶圓)大小及所使用之弱氧化劑、含氟氣體及保護劑之類型變化。基於Novellus GammaTM系統中之一300毫米晶圓,該總氣體流速可在大約1,000 sccm與大約40,000 sccm之間變化,其中二氧化碳之流速係大約1 sccm及大約400 sccm,且RF功率將較佳地在大約300瓦特至5,000瓦特之間變化。腔室壓力將通常在大約300毫托與大約2托之間變化(例如,大約800毫托與大約1.6托之間)。
如下進一步討論,在某些實施例中,含氟氣體與保護劑氣體之比率在某些製程序列中變化,以提供完全的光阻及殘留物移除及低矽損失。而且如下進一步討論,控制二氧化碳或其他弱氧化劑以降低矽損失。
製程序列
在某些實施例中,提供有效地移除該高劑量植入結殼之製程序列及殘留物移除。在某些實施例中,該等製程序列涉及在製程序列期間改變含氟氣體與保護劑氣體之比率以提供必要移除。在某些實施例中,該等製程序列涉及使該晶圓曝露於產自包括含氟氣體及保護劑氣體之一氣體之一電漿之一操作,接下來係使該晶圓曝露於產自僅含氟氣體之一電漿之一操作。在某些實施例中,此等操作可顛倒。
圖3A及圖3B展示指示含氟氣體(NF3)及保護劑氣體(CF4)可用以減少殘留物並降低矽損失之實驗結果。圖3A展示一殘留物計分,其依據NF3及CF4流速(其他化合物保持恆定流速)指示殘留物含量。隨著流速增加,該殘留物歸因於所增加的氟存在而降低。注意到,在該保護劑氣體並非含氟化合物之情況中,該保護劑之曲線可變平。圖3B展示依據NF3及CF4流速之矽損失。矽損失隨增加NF3流速而增加,這係歸因於藉由該電漿中之活化氟物種及/或含氟化合物蝕刻該表面。然而,矽損失在一固定NF3流速下(諸如如圖3B上所指示之60 sccm)隨著增加CF4流速而降低。CF4回應之斜率取決於NF3流速而較高或較低,該斜率闡釋具有正確比率之重要性。如上所示,據信矽損失隨著較高CF4流速(與增加氟氣通常所期望的CF4流速相比)降低可能係由於該基板表面處之含碳保護膜之形成。該保護膜可藉由介於碳物種與該矽表面材料之間的一聚合反應而形成。含氟保護氣體之使用容許該保護劑氣體同時提供一保護效應以及(連同該含氟氣體)提供殘留物移除。
若單獨使用NF3(例如,在H2/CO2/NF3製程中),則可全部移除該殘留物,但是會導致一不可接受的高矽損失。若單獨使用CF4(例如,在H2/CO2/CF4製程中),則移除製程可明顯較慢,且可能不能導致完全移除。根據各種實施例,該製程包含使用NF3與CF4之一組合之至少一操作。舉例而言,在一實施例中,一後高植入劑量(post-HDI)晶圓可被置入一剝離腔室中。在預熱該晶圓之後,引入H2/CO2/CF4/NF3氣體於該腔室中並撞擊一電漿。該晶圓係曝露於該電漿持續足以清洗該結殼、塊體光阻及其他殘留物之一段時間。
在某些實施例中,該製程序列改變NF3(或其他含氟氣體)及CF4(或其他保護劑氣體)之相對含量。取決於該光阻之類型、植入離子及植入參數,可採用不同製程序列。以下描述可用以移除該塊體光阻、該結殼及該濺鍍殘留物之部分之序列或序列之部分,連同用於剝離各種後植入光阻及殘留物形成之製程序列之實例。為簡單起見,以下描述引用NF3及CF4,然而,應注意到,其他含氟氣體及保護劑氣體可分別被用於此等組分氣體之任一者。在某些實施例中,採用用於移除側面及頂部結殼之兩步驟製程,該製程涉及NF3+CF4,接下來係僅NF3。(H2及視需要CO2係在幕後運行用於所有剝離操作)。該兩步驟製程係用以移除該側面結殼(NF3+CF4),接下來移除該頂部結殼(僅NF3)。該NF3僅操作可涉及一氟「加料(spike)」或「叢發(burst)」,其中該NF3流速係增加兩倍或兩倍以上。舉例而言,可應用下列每站台流速:第一操作(側面結殼):2至3公升/每分鐘(lpm)H2;32 sccm CO2;100 sccm CF4;15 sccm NF3。第二操作(頂部結殼):2至3公升/每一分鐘(lpm)H2;32 sccm CO2;0 Sccm CF4;50 sccm NF3。應注意到,可取決於反應器之大小及組態、晶圓大小及劑量時間按比例增加或降低所描述之該等流速。已發現在某些情況中僅使用NF3,對於矽損失之一可接受位準,移除該頂部結殼,但是並不移除該側面結殼。而且已發現在某些情況中使用NF3+CF4,對於矽損失之一可接受位準,移除該側面結殼但是並不移除該頂部結殼。因此,使用如上之兩步驟處理容許移除側面結殼及頂部結殼兩者。
圖4描述移除根據各種實施例之光阻及結殼之一製程流程400。首先在一操作401中,預熱該晶圓至足夠低以阻止爆裂之一溫度,但是預熱該晶圓至足夠高以提供一可接受的蝕刻速率之一溫度。根據各種實施例,該溫度可介於200℃至400℃之間,更特定言之介於240℃至350℃之間(例如,285℃)。在操作403處,使該晶圓曝露於產自氫氣、二氧化碳、三氟化氮及四氟化碳(H2/CO2/NF3/CF4)之一電漿。產生該電漿大致上涉及引入該等組分氣體(其等可預混合或並未預混合)至一電漿源中。根據本發明可使用各種類型的電漿源,包含射頻(RF)、直流(DC)及基於微波之電漿源。在某些實施例中,該電漿係一遠端電漿源,但是該電漿亦可係原位電漿源(即,在該剝離腔室中)。此第一操作可移除該側面結殼及該塊體光阻,同時使該表面免受矽損失。接著在一操作405中,關閉該CF4流動,且使該晶圓曝露於僅產自氫氣、二氧化碳及三氟化氮(H2/CO2/NF3)之一電漿。此操作移除該頂部結殼殘留物。在移除副產物(未展示)之後,於一操作407處結束該製程,且可移除該所清洗之晶圓。
在某些實施例中,除關閉該CF4之外或替代關閉該CF4,必要時可藉由增加或降低該等流速來改變CF4/NF3比率。舉例而言,在某些實施例中,CF4與NF3之一組合係用以移除塊體光阻及/或側面結殼。將NF3加料於該製程中之各點處以提供用於並不容易移除之殘留物之額外移除。加料NF3可(或不可)涉及減小或改變該CF4流動。圖5展示根據各種實施例之此一製程500之一實例。如同該先前實例,首先在一操作501中預熱該晶圓。接著使該晶圓曝露於產自H2/CO2/NF3/CF4之一電漿,並在一操作503中加料NF3。此操作可移除結殼並免受矽損失。在某些實施例中,頂部結殼及側面結殼兩者可被移除。接著,在一操作505中,該NF3流速降低且晶圓被曝露於產自H2/CO2/NF3/CF4之一電漿以用於該塊體光阻之移除。在一操作507中,關閉該CF4流動並使該晶圓曝露於產自H2/CO2/NF3之一電漿。視需要在該操作期間加料該NF3。此操作可為完全移除任意剩餘殘留物之一過剝離操作。過剝離指代超過移除所有光阻標稱上所需的剝離製程之一繼續,且可涉及自已清洗表面剝離材料。在移除副產物(未展示)之後,於一操作509處結束該製程,且可移除該所清洗晶圓。
如所指示,取決於形成於該晶圓或其他工件上之特定後植入光阻及殘留物,可在該製程中之不同階處完成加料NF3。舉例而言,可在該移除製程之開始處加料NF3以促進困難的頂部結殼移除。可在該製程之開始處移除該頂部結殼以防止爆裂之可能性。接著可使用與CF4組合之一較低NF3流速執行塊體光阻移除。在某些實施例中,在移除該塊體光阻之後加料NF3以促進鏈帶(stringer)移除。鏈帶係藉由兩個鄰近曝露區域之間的非曝露區域保留之長的、窄光阻殘留物片段。
在某些實施例中,在移除所有或部分該塊體光阻期間該NF3與該CF4比率可視為一「基本(base)」比率,並相對於此比率量測加料。因此舉例而言,將塊體光阻移除期間之一NF3:CF4當作一「基本(base)」,根據各種製程序列,可在該塊體光阻移除之前及/或之後使該比率上升。在一實例中,該基本比率係3:20(例如,15 sccm NF3,100 sccm CF4),其中一加料使該比率上升為1:2(50 sccm NF3,100 sccm CF4),或在CF4並不存在之情況中,該基本比率係無限大。用於任意特定製程之實際流速及比率可變化;然而,藉由改變該等相對流速及該比率,使用展示於圖3A及3B中之效應可控制該移除製程。在某些實施例中,針對一或多個操作僅可存在CF4且不存在NF3,然而,在許多實施例中,已發現CF4提供容許該製程利用NF3之較高的移除速率之充足保護。根據各種實施例,可採用1:50至1:2之一基本比率,其中一加料高於該基本比率。在某些實施例中,一NF3加料可涉及至少兩倍於比率NF3:CF4。
如上所示,在某些實施例中,一CO2排放氣體被採用並且在任何時候連同H2運行。已發現對於一300毫米晶圓,使用10至15 lpm H2(每站台2至3 lpm),運行於大約100 sccm-300 sccm CO2之間(每一站台20至60 sccm)導致少於超出此範圍之外的矽損失。這係展示於圖6中。圖6中之流速經由一5站台腔室反映總的CO2;基於每一站台,該晶圓經歷20 sccm至60 sccm CO2,更特定言之32 sccm。
入口氣體
將通常包含分子氫之含氫氣體引入至該電漿源中。引入至該電漿源之該氣體含有將被電離或以其他方式存在於該電漿源中以形成一電漿之化學活性物種。引入至該電漿源之該氣體包含含氟氣體(諸如元素氟、三氟化氫及六氟化硫)。引入至該電漿源之該氣體包含保護劑氣體,通常係含碳保護劑氣體。在某些實施例中,該保護劑氣體係碳氟化合物氣體(諸如四氟化碳、C2F6或氫氟碳)。
在某些特定實施例中,引入至該電漿源之該氣體包括體積比大約0.1%至大約3%之間的四氟化碳及體積比大約0.3%至2%之間的三氟化氮。引入至該電漿源之該氣體可包含弱氧化劑(諸如二氧化碳、一氧化碳、二氧化氮、氮氧化物及/或水)。在某些實施例中,該弱氧化劑係二氧化碳。根據各種實施例,入口氣體可包含大約1體積百分比與99體積百分比之間、大約80體積百分比與99.9體積百分比之間或大約95體積百分比分子氫;大約0體積百分比與25體積百分比之間的CO2或其他弱氧化劑;大約0.1體積百分比與3體積百分比之間的三氟化氮或其他不含碳含氟化合物;及大約0.1體積百分比與6體積百分比之間的四氟化碳或其他保護劑化合物。
在某些實施例中,進入該電漿源之該氣體基本上由分子氫、二氧化碳或其他弱氧化劑、不含碳含氟化合物及保護劑化合物所組成。在某些實施例中,其中在一製程序列中之一或多個操作下關閉該保護劑氣體流動,進入該電漿源之該氣體基本上由分子氫、二氧化碳或其他弱氧化劑及不含碳含氟化合物所組成。在其他實施例中,可將一額外一或多個氣體添加至製程氣體。舉例而言,可添加一惰性氣體。
引入至該電漿源之該氣體可被預混合、部分混合或不混合。個別氣源在被引入至該電漿源之前可流動進入一混合增壓室。在其他實施例中,不同氣體可單獨進入該電漿源。當在一多站台腔室之不同反應站台中使用引入至該電漿源之該氣體時,該氣體可具有不同組合物。舉例而言,在一6站台腔室中,站台1(或站台2,若站台1係用於預熱)或站台6可分別採用具有相對較高NF3含量之製程氣體以移除該結殼或該殘留物。該等其他站台之一或多個可採用具有少量或不含保護劑氣體之製程氣體。亦可使用不含二氧化碳或弱氧化劑之製程氣體。
使用具有弱氧化劑之基於氫之電漿剝離光阻及蝕刻材料之方法係揭示於美國專利第7,288,484號中,其全部內容以引用方式及針對所有目的併入本文。剝離光阻及蝕刻殘留物之後HDI方法係描述於美國專利公開案第US-2009-0053901號,其全部內容以引用方式及針對所有目的併入本文。
電漿產生
根據本發明可使用各種類型的電漿源,其包含RF、DC及基於微波之電漿源。在一較佳實施例中,使用一下游RF電漿源。通常,一300毫米晶圓之RF電漿功率在大約300瓦特至大約10千瓦特之間變化。在一些實施例中,RF電漿功率係在大約2000瓦特與5000瓦特之間(例如,3500瓦特)。
噴淋頭總成
根據本發明之各種實施例,電漿氣體係經由一噴淋頭總成分佈於加工表面。該噴淋頭總成可經接地或具有一經施加電壓(例如,0至1000瓦特偏壓)以吸引某些帶電物種,同時不影響中性物種至該晶圓之流動。該電漿中之許多帶電物種在該噴淋頭處再組合。該總成包含該噴淋頭自身,該噴淋頭可為具有引導該電漿及惰性氣體混合物進入該反應腔室之孔之一金屬板。該噴淋頭經由一較大區域重新分佈來自該電漿之活性氫,並容許使用一較小的電漿源。噴淋頭孔之數目及配置可經設定以最佳化剝離速率及剝離速率均勻性。若該電漿源係位於該晶圓中心上方,則在該噴淋頭之中心的該等噴淋頭孔係較佳地較小且較少以將活性氣體推向外部區域。該噴淋頭可具有至少100個孔。合適的噴淋頭包含可購自美國加州聖荷西市(San Jose,CA)Novellus Systems,Inc.之Gamma xPR噴淋頭或GxT插入噴淋頭。在不存在噴淋頭總成之實施例中,該電漿直接進入製程腔室。
製程腔室
製程腔室可為用於經執行之剝離操作之任意適合的反應腔室。製程腔室可為一多腔室裝置之一腔室或製程腔室可僅為一單一腔室裝置。該腔室亦可包含多個站台,在該等多個站台中同時處理不同晶圓。製程腔室可為發生植入、蝕刻或其他介入光阻處理之相同腔室。在其他實施例中,一個別腔室係專供剝離之用。製程腔室壓力可自大約600毫托至2托變化。在某些實施例中,該壓力自大約0.9托至1.5托變化。
該製程腔室包含上面執行剝離操作之一或多個處理站台。在某些實施例中,該一或多個處理站台包含一預熱站台、至少一剝離站台及一過灰化站台。晶圓支撐件係經組態以在處理期間支撐晶圓。晶圓支撐件亦可在處理期間將熱量傳送至晶圓並自晶圓將熱量傳送出去以調整必要的晶圓溫度。在某些實施例中,晶圓係支撐於複數個最小接觸件上,且並未實體地接觸晶圓支撐件表面平面。一轉軸揀取晶圓並將晶圓自一站台傳送至另一站台。圖8係展示適合用於在晶圓上執行本發明之一下游電漿裝置800之態樣之一示意圖。裝置800具有藉由一噴淋頭總成817分隔之一電漿產生部分811及一曝露腔室801。在曝露腔室801內部,一晶圓803置放於一平台(或置物台)805上。平台805係裝配有一加熱/冷卻元件。在一些實施例中,平台805亦係經組態用於對晶圓803施加一偏壓。在曝露腔室801中經由一真空幫浦經由導管807得到低壓。氣態氫氣源(具有或不具有稀釋/載流氣體)及二氧化碳(或其他弱氧化劑)經由入口809提供一氣體流進該裝置之電漿產生部分811。電漿產生部分811係部分藉由電感線圈813圍繞,該等電感線圈813繼而係連接至一電源815。在操作期間,將氣體混合物引入至電漿產生部分811中;給電感線圈813通電;並在電漿產生部分811中產生一電漿。噴淋頭總成817可具有一經施加電壓或經接地以指引物種流入至曝露腔室801中。如所提及,晶圓803可受控於溫度及/或可被施加一RF偏壓。
可使用各種組態及幾何形狀的該電漿源811及電感線圈813。舉例而言,電感線圈813可依一交錯型樣環繞該電漿源811。在另一實例中,該電漿源811可塑形為一半球形而非一圓柱形。一控制器850可連接至該製程腔室之組件,且控制製程氣體組合物、該剝離操作之壓力、溫度及晶圓分度(wafer indexing)。機器可讀型媒體可耦合至該控制器並含有控制此等操作之製程條件之指令。
合適的電漿腔室及系統包含美國加州聖荷西市(San Jose,CA)Novellus Systems公司提供之Gamma 2100、2130 I2CP(交叉電感耦合電漿)、G400及GxT。其他系統包含來自美國馬里蘭州Rockville市Axcelis Technologies公司之Fusion線;來自韓國PSK Tech公司之TERA21;及來自美國加州Fremont市Mattson Technology公司之Aspen。此外,各種剝離腔室可經組態於叢集工具上。舉例而言,一剝離腔室可添加至可購自美國加州聖克拉拉市(Santa Clara,CA)之Applied Materials之Centura叢集工具。
工件
在較佳實施例中,根據本發明之方法及裝置之工件係一半導體晶圓。可使用任意大小的晶圓。大部分現代晶圓製造設施使用200毫米或300毫米晶圓。如上所揭示,本文所揭示之製程及裝置在一處理操作(諸如蝕刻、離子植入或沈積)之後剝離光阻。本發明係適合用於具有極小特徵或臨界尺寸(例如,100奈米以下,65奈米或45奈米或小於45奈米)之晶圓。所揭示之HDIS之低矽損失特徵尤其適合用於極淺接面的先進邏輯器件。本發明亦尤其適合用於經歷前段工程(FEOL)離子植入(尤其係高劑量離子植入)之晶圓。
活化電漿物種與晶圓上之光阻及濺鍍殘留物發生化學反應。在晶圓處,反應性氣體可包含數目個活化電漿物種、惰性氣體、基團、帶電物種及氣體副產物。各種氫物種之體積濃度可為大約20%至80%於該晶圓處之氣體。各種氟物種之體積濃度可為0.01%至大約2%或小於1%。來自弱氧化劑之各種物種之體積濃度可為0.05%至大約5%或大約1.2%。此等材料可包含H2 *、H2 +、H+、H*、e-、OH、O*、CO、CO2、H2O、HF、F*、F-、CF、CF2及CF3。
製程條件可取決於晶圓大小變化。在本發明之一些實施例中,期望使工件在對其表面施加電漿期間保持在一特定溫度。晶圓溫度可在大約110℃與大約500℃之間變化。為減小上述光阻爆裂之可能性,晶圓溫度係較佳地緩慢增加直到移除足夠多結殼且光阻爆裂不再受關注。初始站台溫度可為大約110℃至大約260℃,(例如)大約240℃。愈後站台可成功使用愈高溫度(諸如285℃及大約350℃)及良好的剝離速率。在某些實施例中,在NF3加料期間增加該溫度以減小與此等加料關聯之矽損失。
例示性製程
如上所指示,在某些實施例中,一多站台剝離裝置係用以執行本文所描述之光阻及殘留物剝離製程。圖7係展示包含站台1、2、3、4、5及6之此一裝置之一俯視圖之一簡單示意圖。晶圓經由腔室701進入該裝置站台1處;依序將該等晶圓傳送至每一站台用於此站台處之一處理操作;且該等晶圓在完成該製程之後經由腔室702自站台6退出。架構在無高劑量植入剝離製程且低矽損失及TiN金屬閘極相容性之情況下容許基於殘留物之氫氣。
例示性製程1
上述製程係包含站台6中之一NF3加料之一製程序列之一實例。
例示性製程2
上述製程係包含於結殼移除期間在站台2中持續曝露時間之一半之一NF3加料之一製程序列之一實例。舉例而言,一晶圓可在該站台中持續18秒,其中NF3加料持續9秒。
例示性製程3
上述製程係在該站台2曝露時間期間之一點處關閉CF4(例如)以輔助結殼移除一處理之一實例。
例示性製程4
上述製程序列提供展示藉由修改相對NF3與CF4流率可如何控制剝離之實例。
雖然已就少數較佳實施例描述本發明,但是其應並不限於上述具體細節。可使用該等上述較佳實施例上之許多變化。因此,應參考下列專利申請範圍大致解譯本發明。
1...站台
2...站台
3...站台
4...站台
5...站台
6...站台
101...半導體基板
103...光阻
104...開口
105...結殼層
107...下伏材料
109...摻雜區域
201...基板
203...塊體光阻
205...淺溝渠隔離區域
210...金屬閘極
214...離子植入波束通量
215a...頂部結殼
215b...側面結殼
216...重新濺鍍通量
701...腔室
702...腔室
800...下游電漿裝置
801...曝露腔室
803...晶圓
805...平台
807...真空幫浦通孔導管
809...氣體通孔入口
811...電漿產生部分
813...電感線圈
815...電源
817...噴淋頭總成
850...控制器
圖1A至圖1D描繪離子植入及剝離操作前後之各種半導體器件製造階;
圖2A至圖2D描繪根據該器件包含一金屬閘極之某些實施例之離子植入及剝離操作前後之各種半導體器件製造階;
圖3A展示依據NF3流率及CF4流率之殘留物;
圖3B展示依據NF3流率及CF4流率之矽損失;
圖4及圖5係展示根據本發明之某些實施例之各種操作之一程序製程流程圖;
圖6展示依據CO2流率之矽損失;
圖7展示適合用於執行本發明之態樣之一多站台循序架構;及
圖8係展示適合用於執行本發明之諸態樣之一裝置之一示意說明圖。
(無元件符號說明)
Claims (26)
- 一種在一反應腔室中自一工件(work piece)表面移除材料之方法,該方法包括:自包括分子氫(molecular hydrogen)、一不含碳含氟氣體及一保護劑(protectant)化合物之一製程氣體混合物形成一第一電漿,其中該不含碳含氟氣體及該保護劑化合物係以一第一體積(volumetric)流量比率提供,其中該製程氣體係基於氫氣以使得該分子氫係該製程氣體之主要組分且該分子氫之體積流量比率比該不含碳含氟氣體及該保護劑化合物之體積流量比率大至少一數量級(an order of magnitude);使該工件表面曝露於該第一電漿以藉此自該工件表面移除材料之一第一部分;改變該不含碳含氟氣體與該保護劑化合物之體積流量比率以形成一第二電漿;及使該工件表面曝露於該第二電漿以藉此自該工件表面移除材料之一第二部分。
- 如請求項1之方法,其中該保護劑化合物係為一含氮化合物。
- 如請求項1之方法,其中該保護劑化合物係為一碳氟保護劑化合物。
- 如請求項3之方法,其中該碳氟保護劑化合物係CF4、C2F6、CHF3、CH2F2、C3F8之一者。
- 如請求項4之方法,其中該碳氟保護劑化合物係CF4。
- 如請求項1之方法,其中該不含碳含氟氣體係NF3、F2、HF、或SF6之一者。
- 如請求項6之方法,其中該不含碳含氟氣體係NF3。
- 如請求項1之方法,其中自該工件表面移除之該材料包括一高劑量植入光阻。
- 如請求項1及4-8任一項之方法,其中該不含碳含氟氣體與該保護劑化合物之該第一體積流量比率係介於大約1:20至1:5之間,且改變該體積流量比率包括改變該比率為大約1:4至1:2之間。
- 如請求項1及4-8任一項之方法,其中該不含碳含氟氣體與該保護劑化合物之該第一體積流量比率係介於大約1:20至1:5之間。
- 如請求項1及4-8任一項之方法,其中改變該不含碳含氟氣體與該保護劑化合物之該體積流量比率以形成一第二電漿包括:關閉該保護劑化合物之一流動。
- 如請求項1及4-8任一項之方法,其中該製程氣體混合物進一步包括二氧化碳。
- 如請求項1及4-8任一項之方法,其中在移除之後該工件實質上並無高劑量植入光阻之殘留物,且其中該工件之一矽表面損失少於大約2埃矽。
- 如請求項13之方法,其中在移除之後該工件實質上並無該高劑量植入光阻之殘留物,且其中該工件之一矽表面損失少於大約1埃矽。
- 如請求項1之方法,其中該第一電漿之一主要蝕刻劑組 分係HF汽(vapor)。
- 一種在一反應腔室中自一工件表面移除材料之方法,該方法包括:自包括分子氫、一不含碳含氟氣體及一保護劑化合物之一製程氣體混合物形成一第一電漿,其中該製程氣體係基於氫氣以使得該分子氫係該製程氣體之主要組分且該分子氫之體積流量比率比該不含碳含氟氣體及該保護劑化合物之體積流量比率大至少一數量級,及使該工件表面曝露於該第一電漿以藉此自該工件表面移除材料之一第一部分,且同時於該工件之一含矽表面上形成一保護層。
- 如請求項16之方法,其中該保護劑化合物係為一含氮化合物。
- 如請求項16之方法,其中該保護劑化合物係為一碳氟保護劑化合物。
- 如請求項18之方法,其中該碳氟保護劑化合物係CF4、C2F6、CHF3、CH2F2、C3F8之一者。
- 如請求項16之方法,其中該不含碳含氟氣體係NF3、F2,、HF、或SF6之一者。
- 如請求項16之方法,其中該保護劑化合物係CF4且該不含碳含氟氣體係NF3。
- 如請求項16及19-21任一項之方法,其中該製程氣體混合物進一步包括二氧化碳。
- 如請求項16及19-21任一項之方法,其中在移除之後該工 件實質上並無高劑量植入光阻之殘留物,且其中該工件之一矽表面損失少於大約2埃矽。
- 如請求項23之方法,其中在移除之後該工件實質上並無該高劑量植入光阻之殘留物,且其中該工件之一矽表面損失少於大約1埃矽。
- 一種在一反應腔室中自一工件表面移除高劑量植入光阻之方法,該方法包括:移除該材料之一第一部分,包括:將包括分子氫、一弱氧化劑、一不含碳含氟氣體及一保護劑氣體之一第一氣體引入至一電漿源中,其中該第一氣體係基於氫氣以使得該分子氫係該第一氣體之主要組分且該分子氫之體積流量比率比該不含碳氣體、該保護劑氣體、及該弱氧化劑之體積流量比率大至少一數量級;自引入至該電漿源中之該第一氣體產生一第一電漿;及使該工件曝露於該第一電漿以移除該材料之一第一部分;及藉由下列步驟移除該材料之一第二部分:將包括分子氫、一弱氧化劑、一不含碳含氟氣體且實質上無保護劑氣體之一第二氣體引入至一電漿源中;自引入至該電漿源中之該第二氣體產生一第二電漿;及 使該工件曝露於該第二電漿以移除該材料之一第二部分。
- 一種用於自一工件表面移除材料之裝置,其包括:一反應腔室,其包括:一電漿源,置於該電漿源之下游之一噴淋頭(showerhead),及位於該噴淋頭之下游之一工件支撐件,該工件支撐件包括一基座(pedestal)及控制支撐於該工件支撐件上之一工件之一溫度之溫度控制機構;及用於執行一組指令之一控制器,該組指令包括自包括分子氫、一不含碳含氟氣體及一保護劑化合物之一製程氣體混合物形成一第一電漿之指令,其中該不含碳含氟氣體及該保護劑化合物係以一第一體積流量比率提供,其中該製程氣體係基於氫氣以使得該分子氫係該製程氣體之主要組分且該分子氫之體積流量比率比該不含碳氣體及該保護劑化合物之體積流量比率大至少一數量級;使該工件表面曝露於該第一電漿以藉此自該工件表面移除材料之一第一部分;改變該不含碳含氟氣體與該保護劑化合物之該體積流量比率以形成一第二電漿;及使該工件表面曝露於該第二電漿以藉此自該工件表面移除材料之一第二部分。
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Also Published As
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US9564344B2 (en) | 2017-02-07 |
JP2013513946A (ja) | 2013-04-22 |
WO2011071980A3 (en) | 2011-09-01 |
TW201137936A (en) | 2011-11-01 |
US20150332933A1 (en) | 2015-11-19 |
KR20110100196A (ko) | 2011-09-09 |
WO2011071980A2 (en) | 2011-06-16 |
US20110143548A1 (en) | 2011-06-16 |
KR101226411B1 (ko) | 2013-01-24 |
CN102870198B (zh) | 2017-05-31 |
SG171962A1 (en) | 2011-07-28 |
JP5888652B2 (ja) | 2016-03-22 |
CN102870198A (zh) | 2013-01-09 |
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