JP2005268312A - レジスト除去方法及びそれを用いて製造した半導体装置 - Google Patents
レジスト除去方法及びそれを用いて製造した半導体装置 Download PDFInfo
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- JP2005268312A JP2005268312A JP2004074868A JP2004074868A JP2005268312A JP 2005268312 A JP2005268312 A JP 2005268312A JP 2004074868 A JP2004074868 A JP 2004074868A JP 2004074868 A JP2004074868 A JP 2004074868A JP 2005268312 A JP2005268312 A JP 2005268312A
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- G—PHYSICS
- G03—PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
- G03F—PHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
- G03F7/00—Photomechanical, e.g. photolithographic, production of textured or patterned surfaces, e.g. printing surfaces; Materials therefor, e.g. comprising photoresists; Apparatus specially adapted therefor
- G03F7/26—Processing photosensitive materials; Apparatus therefor
- G03F7/42—Stripping or agents therefor
- G03F7/427—Stripping or agents therefor using plasma means only
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
- H01L21/3105—After-treatment
- H01L21/311—Etching the insulating layers by chemical or physical means
- H01L21/31127—Etching organic layers
- H01L21/31133—Etching organic layers by chemical means
- H01L21/31138—Etching organic layers by chemical means by dry-etching
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76801—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
- H01L21/76802—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing by forming openings in dielectrics
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76801—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
- H01L21/76802—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing by forming openings in dielectrics
- H01L21/76807—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing by forming openings in dielectrics for dual damascene structures
- H01L21/7681—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing by forming openings in dielectrics for dual damascene structures involving one or more buried masks
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/027—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34
- H01L21/0271—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising organic layers
- H01L21/0273—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising organic layers characterised by the treatment of photoresist layers
- H01L21/0274—Photolithographic processes
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
- H01L21/3105—After-treatment
- H01L21/311—Etching the insulating layers by chemical or physical means
- H01L21/31144—Etching the insulating layers by chemical or physical means using masks
Abstract
【解決手段】 レジストマスク6をエッチングマスクとして、被処理基板表面の層間絶縁膜8を構成する保護絶縁膜5/MSQ膜4/シリコン酸化膜3を順次に反応性イオンエッチング(RIE)でドライエッチングし、シリコン基板1表面の拡散層2に達するヴィアホール9を形成する。そして、レジストマスク6の除去では、はじめに、このドライエッチングでレジストマスク6表面部に形成された変質層6aを、NH3ガスのプラズマ励起で生成したプラズマガス10によりエッチング除去する。次に、残ったレジストマスク6は水素ラジカル11を照射してエッチング除去する
【選択図】 図1
Description
(実施の形態1)
図1乃至3は、本発明の第1の実施の形態にかかるレジスト除去方法を適用した半導体装置の製造を示す工程別素子断面図である。図4,5は、上記レジスト除去において用いたレジスト除去装置の模式的な略断面図である。
図7,8は、本発明の第2の実施の形態にかかるレジスト除去方法を適用した半導体装置の製造を示す工程別素子断面図である。第2の実施の形態はデュアルダマシン配線構造を形成する場合について説明する。
2 拡散層
3 シリコン酸化膜
4 MSQ膜
5 保護絶縁膜
6,15,60 レジストマスク
6a,15a,60a 変質層
7,61 レジスト開口部
8 層間絶縁膜
9,63 ヴィアホール
10,17 プラズマガス
11,64 水素ラジカル
12 導電体膜
13 ヴィアプラグ
14 アルミ合金膜
16 配線
20,30 レジスト除去装置
21,31 チャンバ
22,32 回転テーブル
23,34 プラズマ発生部
24,39 ガス供給系
25,40 排気系
26,41 ウエハ
27,42 ガス導入口
28,43 ガス排出口
29,44 基板加熱系
33 ガス輸送管
35 放電管
36 耐プラズマ部材
37 μ波
38 導波管
51 下層絶縁膜
52 第1バリア層
53 下層配線
54 第2バリア層
55 第1MSQ膜
56 第1保護絶縁膜
57 開口部
58 第2MSQ膜
59 第2保護絶縁膜
62 配線溝
65 第3バリア層
66 Cu膜
67 デュアルダマシン配線
Claims (8)
- 被処理基板の加工でマスクとして用いたレジスト膜をエッチング除去するレジスト除去方法において、
前記加工で変質した前記レジスト膜の表面部をエッチング除去する工程と、
前記表面部をエッチング除去した後に残存するレジスト膜を、水素ガスを含む原料ガスのプラズマ励起により生成した水素活性種を用いてエッチング除去する工程と、
を有するレジスト除去方法。 - 前記水素活性種は水素ラジカルであることを特徴とする請求項1に記載のレジスト除去方法。
- 前記原料ガスは水素ガスと不活性ガスの混合ガスであることを特徴とする請求項1又は2に記載のレジスト除去方法。
- 前記水素活性種を用いるエッチング除去において、前記被処理基板の温度を200℃〜400℃の範囲に設定することを特徴とする請求項1,2又は3に記載のレジスト除去方法。
- 前記加工で変質した前記レジスト膜の表面部のエッチング除去は、アンモニア(NH3)ガス、窒素ガス、酸素ガス、四弗化炭素(CF4)ガス、水素ガスあるいはこれらの混合ガスのプラズマ励起により生成した活性種を前記表面部に照射して行うことを特徴とする請求項1〜4のいずれか一項に記載のレジスト除去方法。
- 前記加工で変質した前記レジスト膜の表面部のエッチング除去は、有機溶剤を含む化学薬液に前記被処理基板を浸漬して行うことを特徴とする請求項1〜4のいずれか一項に記載のレジスト除去方法。
- 前記レジスト膜の表面部は、前記被処理基板表面の比誘電率が3以下の低誘電率絶縁膜のエッチング加工によって変質したものである請求項1〜6のいずれか一項に記載のレジスト除去方法。
- 前記レジスト膜の表面部は、前記被処理基板表面の比誘電率が3以下の低誘電率絶縁膜上にある金属膜のエッチング加工によって変質したものである請求項1〜6のいずれか一項に記載のレジスト除去方法。
Priority Applications (3)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2004074868A JP2005268312A (ja) | 2004-03-16 | 2004-03-16 | レジスト除去方法及びそれを用いて製造した半導体装置 |
TW093136959A TW200532766A (en) | 2004-03-16 | 2004-11-30 | Method of removing resist, semiconductor device manufactured by the method |
US11/052,987 US7538038B2 (en) | 2004-03-16 | 2005-02-09 | Method of removing resist, semiconductor device thereby and method of manufacturing a semiconductor device |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
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JP2004074868A JP2005268312A (ja) | 2004-03-16 | 2004-03-16 | レジスト除去方法及びそれを用いて製造した半導体装置 |
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Publication Number | Publication Date |
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JP2005268312A true JP2005268312A (ja) | 2005-09-29 |
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Application Number | Title | Priority Date | Filing Date |
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JP2004074868A Pending JP2005268312A (ja) | 2004-03-16 | 2004-03-16 | レジスト除去方法及びそれを用いて製造した半導体装置 |
Country Status (3)
Country | Link |
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US (1) | US7538038B2 (ja) |
JP (1) | JP2005268312A (ja) |
TW (1) | TW200532766A (ja) |
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---|---|---|---|---|
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US8440513B2 (en) | 2008-06-30 | 2013-05-14 | Hitachi High-Technologies Corporation | Method of semiconductor processing |
US9173291B2 (en) | 2012-12-28 | 2015-10-27 | Samsung Electro-Mechanics Co., Ltd. | Circuit board and method for manufacturing the same |
US9514954B2 (en) | 2014-06-10 | 2016-12-06 | Lam Research Corporation | Peroxide-vapor treatment for enhancing photoresist-strip performance and modifying organic films |
US9564344B2 (en) | 2009-12-11 | 2017-02-07 | Novellus Systems, Inc. | Ultra low silicon loss high dose implant strip |
US9613825B2 (en) | 2011-08-26 | 2017-04-04 | Novellus Systems, Inc. | Photoresist strip processes for improved device integrity |
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Families Citing this family (38)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2005260060A (ja) * | 2004-03-12 | 2005-09-22 | Semiconductor Leading Edge Technologies Inc | レジスト除去装置及びレジスト除去方法、並びにそれを用いて製造した半導体装置 |
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US20070184666A1 (en) * | 2006-02-08 | 2007-08-09 | Texas Instruments Inc. | Method for removing residue containing an embedded metal |
US7785753B2 (en) * | 2006-05-17 | 2010-08-31 | Lam Research Corporation | Method and apparatus for providing mask in semiconductor processing |
US20080299780A1 (en) * | 2007-06-01 | 2008-12-04 | Uv Tech Systems, Inc. | Method and apparatus for laser oxidation and reduction |
US8280525B2 (en) | 2007-11-16 | 2012-10-02 | Vivant Medical, Inc. | Dynamically matched microwave antenna for tissue ablation |
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US20090258487A1 (en) * | 2008-04-14 | 2009-10-15 | Keng-Chu Lin | Method for Improving the Reliability of Low-k Dielectric Materials |
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US8202270B2 (en) | 2009-02-20 | 2012-06-19 | Vivant Medical, Inc. | Leaky-wave antennas for medical applications |
US9277969B2 (en) | 2009-04-01 | 2016-03-08 | Covidien Lp | Microwave ablation system with user-controlled ablation size and method of use |
US8463396B2 (en) | 2009-05-06 | 2013-06-11 | Covidien LLP | Power-stage antenna integrated system with high-strength shaft |
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US8235981B2 (en) | 2009-06-02 | 2012-08-07 | Vivant Medical, Inc. | Electrosurgical devices with directional radiation pattern |
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US8871639B2 (en) | 2013-01-04 | 2014-10-28 | Taiwan Semiconductor Manufacturing Company, Ltd. | Semiconductor devices and methods of manufacture thereof |
US20140273525A1 (en) * | 2013-03-13 | 2014-09-18 | Intermolecular, Inc. | Atomic Layer Deposition of Reduced-Leakage Post-Transition Metal Oxide Films |
WO2017034645A2 (en) | 2015-06-09 | 2017-03-02 | ARIZONA BOARD OF REGENTS, a body corporate for THE STATE OF ARIZONA for and on behalf of ARIZONA STATE UNIVERSITY | Method of providing an electronic device and electronic device thereof |
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JP6438831B2 (ja) * | 2015-04-20 | 2018-12-19 | 東京エレクトロン株式会社 | 有機膜をエッチングする方法 |
US9460959B1 (en) * | 2015-10-02 | 2016-10-04 | Applied Materials, Inc. | Methods for pre-cleaning conductive interconnect structures |
US10269574B1 (en) * | 2017-10-03 | 2019-04-23 | Mattson Technology, Inc. | Surface treatment of carbon containing films using organic radicals |
CN109994375A (zh) * | 2018-01-03 | 2019-07-09 | 联华电子股份有限公司 | 去除图案化光致抗蚀剂的方法 |
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Family Cites Families (17)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH02226722A (ja) | 1989-02-28 | 1990-09-10 | Fujitsu Ltd | 有機膜の処理方法 |
JP3533583B2 (ja) | 1994-07-25 | 2004-05-31 | 富士通株式会社 | 水素プラズマダウンフロー装置の洗浄方法 |
US5792672A (en) * | 1996-03-20 | 1998-08-11 | Chartered Semiconductor Manufacturing Ltd. | Photoresist strip method |
US6379576B2 (en) | 1997-11-17 | 2002-04-30 | Mattson Technology, Inc. | Systems and methods for variable mode plasma enhanced processing of semiconductor wafers |
US6107192A (en) | 1997-12-30 | 2000-08-22 | Applied Materials, Inc. | Reactive preclean prior to metallization for sub-quarter micron application |
US6281135B1 (en) | 1999-08-05 | 2001-08-28 | Axcelis Technologies, Inc. | Oxygen free plasma stripping process |
WO2002001300A1 (fr) * | 2000-06-28 | 2002-01-03 | Nec Corporation | Composition d'agent de demontage |
US6486082B1 (en) | 2001-06-18 | 2002-11-26 | Applied Materials, Inc. | CVD plasma assisted lower dielectric constant sicoh film |
US6635409B1 (en) * | 2001-07-12 | 2003-10-21 | Advanced Micro Devices, Inc. | Method of strengthening photoresist to prevent pattern collapse |
US6583046B1 (en) * | 2001-07-13 | 2003-06-24 | Advanced Micro Devices, Inc. | Post-treatment of low-k dielectric for prevention of photoresist poisoning |
JP2003092287A (ja) * | 2001-09-19 | 2003-03-28 | Nec Corp | アッシング方法 |
JP2003188151A (ja) | 2001-12-19 | 2003-07-04 | Hitachi Ltd | 半導体集積回路装置の製造方法 |
US6774037B2 (en) * | 2002-05-17 | 2004-08-10 | Intel Corporation | Method integrating polymeric interlayer dielectric in integrated circuits |
JP2004103747A (ja) | 2002-09-09 | 2004-04-02 | Renesas Technology Corp | 半導体装置の製造方法 |
US6905333B2 (en) | 2002-09-10 | 2005-06-14 | Axcelis Technologies, Inc. | Method of heating a substrate in a variable temperature process using a fixed temperature chuck |
US20040237997A1 (en) | 2003-05-27 | 2004-12-02 | Applied Materials, Inc. ; | Method for removal of residue from a substrate |
US7029992B2 (en) * | 2004-08-17 | 2006-04-18 | Taiwan Semiconductor Manufacturing Company | Low oxygen content photoresist stripping process for low dielectric constant materials |
-
2004
- 2004-03-16 JP JP2004074868A patent/JP2005268312A/ja active Pending
- 2004-11-30 TW TW093136959A patent/TW200532766A/zh unknown
-
2005
- 2005-02-09 US US11/052,987 patent/US7538038B2/en not_active Expired - Fee Related
Cited By (9)
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---|---|---|---|---|
US9941108B2 (en) | 2004-12-13 | 2018-04-10 | Novellus Systems, Inc. | High dose implantation strip (HDIS) in H2 base chemistry |
US8440513B2 (en) | 2008-06-30 | 2013-05-14 | Hitachi High-Technologies Corporation | Method of semiconductor processing |
TWI485771B (zh) * | 2008-06-30 | 2015-05-21 | Hitachi High Tech Corp | Semiconductor processing methods |
JP2012531053A (ja) * | 2009-08-25 | 2012-12-06 | シルバーブルック リサーチ ピーティワイ リミテッド | フォトレジストおよびエッチング残留物をビアから除去する方法 |
JP2013513948A (ja) * | 2009-12-11 | 2013-04-22 | ノベルス・システムズ・インコーポレーテッド | low−k誘電体について損傷を低く抑えつつフォトレジストをストリッピングする方法 |
US9564344B2 (en) | 2009-12-11 | 2017-02-07 | Novellus Systems, Inc. | Ultra low silicon loss high dose implant strip |
US9613825B2 (en) | 2011-08-26 | 2017-04-04 | Novellus Systems, Inc. | Photoresist strip processes for improved device integrity |
US9173291B2 (en) | 2012-12-28 | 2015-10-27 | Samsung Electro-Mechanics Co., Ltd. | Circuit board and method for manufacturing the same |
US9514954B2 (en) | 2014-06-10 | 2016-12-06 | Lam Research Corporation | Peroxide-vapor treatment for enhancing photoresist-strip performance and modifying organic films |
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US7538038B2 (en) | 2009-05-26 |
US20050208756A1 (en) | 2005-09-22 |
TW200532766A (en) | 2005-10-01 |
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