TWI494920B - 半導體記憶體裝置及其更新控制方法 - Google Patents
半導體記憶體裝置及其更新控制方法 Download PDFInfo
- Publication number
- TWI494920B TWI494920B TW098125092A TW98125092A TWI494920B TW I494920 B TWI494920 B TW I494920B TW 098125092 A TW098125092 A TW 098125092A TW 98125092 A TW98125092 A TW 98125092A TW I494920 B TWI494920 B TW I494920B
- Authority
- TW
- Taiwan
- Prior art keywords
- update
- signal
- source
- write
- data
- Prior art date
Links
- 239000004065 semiconductor Substances 0.000 title claims description 69
- 238000000034 method Methods 0.000 title claims description 25
- 230000015654 memory Effects 0.000 claims description 77
- 230000004044 response Effects 0.000 claims description 51
- 230000003321 amplification Effects 0.000 claims description 28
- 238000003199 nucleic acid amplification method Methods 0.000 claims description 28
- 230000001939 inductive effect Effects 0.000 claims description 7
- 230000005540 biological transmission Effects 0.000 claims description 6
- 230000006698 induction Effects 0.000 claims description 2
- 230000006870 function Effects 0.000 claims 2
- 238000010586 diagram Methods 0.000 description 17
- 239000003990 capacitor Substances 0.000 description 5
- 239000000758 substrate Substances 0.000 description 5
- 238000005516 engineering process Methods 0.000 description 4
- 239000013078 crystal Substances 0.000 description 3
- 230000010354 integration Effects 0.000 description 3
- 210000000746 body region Anatomy 0.000 description 2
- 239000012535 impurity Substances 0.000 description 2
- 239000000463 material Substances 0.000 description 2
- 238000009413 insulation Methods 0.000 description 1
Classifications
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
- G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
- G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
- G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
- G11C11/406—Management or control of the refreshing or charge-regeneration cycles
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
- G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
- G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
- G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
- G11C11/4063—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing
- G11C11/407—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing for memory cells of the field-effect type
- G11C11/408—Address circuits
- G11C11/4085—Word line control circuits, e.g. word line drivers, - boosters, - pull-up, - pull-down, - precharge
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
- G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
- G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
- G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
- G11C11/4063—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing
- G11C11/407—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing for memory cells of the field-effect type
- G11C11/408—Address circuits
- G11C11/4087—Address decoders, e.g. bit - or word line decoders; Multiple line decoders
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
- G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
- G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
- G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
- G11C11/4063—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing
- G11C11/407—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing for memory cells of the field-effect type
- G11C11/409—Read-write [R-W] circuits
- G11C11/4091—Sense or sense/refresh amplifiers, or associated sense circuitry, e.g. for coupled bit-line precharging, equalising or isolating
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
- G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
- G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
- G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
- G11C11/4063—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing
- G11C11/407—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing for memory cells of the field-effect type
- G11C11/409—Read-write [R-W] circuits
- G11C11/4094—Bit-line management or control circuits
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
- G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
- G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
- G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
- G11C11/4063—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing
- G11C11/407—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing for memory cells of the field-effect type
- G11C11/409—Read-write [R-W] circuits
- G11C11/4096—Input/output [I/O] data management or control circuits, e.g. reading or writing circuits, I/O drivers or bit-line switches
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C2211/00—Indexing scheme relating to digital stores characterized by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C2211/401—Indexing scheme relating to cells needing refreshing or charge regeneration, i.e. dynamic cells
- G11C2211/4016—Memory devices with silicon-on-insulator cells
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C2211/00—Indexing scheme relating to digital stores characterized by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C2211/401—Indexing scheme relating to cells needing refreshing or charge regeneration, i.e. dynamic cells
- G11C2211/406—Refreshing of dynamic cells
- G11C2211/4065—Low level details of refresh operations
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Computer Hardware Design (AREA)
- Databases & Information Systems (AREA)
- Dram (AREA)
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| KR1020090032364A KR101080200B1 (ko) | 2009-04-14 | 2009-04-14 | 반도체 메모리 장치 및 그 리프레쉬 제어 방법 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| TW201037705A TW201037705A (en) | 2010-10-16 |
| TWI494920B true TWI494920B (zh) | 2015-08-01 |
Family
ID=42934283
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| TW098125092A TWI494920B (zh) | 2009-04-14 | 2009-07-24 | 半導體記憶體裝置及其更新控制方法 |
Country Status (5)
| Country | Link |
|---|---|
| US (1) | US8169847B2 (enExample) |
| JP (1) | JP2010250921A (enExample) |
| KR (1) | KR101080200B1 (enExample) |
| CN (1) | CN101866684B (enExample) |
| TW (1) | TWI494920B (enExample) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US12159664B2 (en) | 2019-10-14 | 2024-12-03 | Arm Limited | Concurrent memory access operations |
Families Citing this family (19)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN103093807B (zh) * | 2011-11-02 | 2015-08-26 | 华邦电子股份有限公司 | 随机存取存储器及其刷新控制器 |
| CN104217746B (zh) * | 2013-05-30 | 2017-04-12 | 华邦电子股份有限公司 | 参考存储胞的偏压产生器及偏压提供方法 |
| US9123414B2 (en) | 2013-11-22 | 2015-09-01 | Micron Technology, Inc. | Memory systems and memory programming methods |
| US9336875B2 (en) | 2013-12-16 | 2016-05-10 | Micron Technology, Inc. | Memory systems and memory programming methods |
| KR102381046B1 (ko) * | 2015-10-26 | 2022-03-31 | 에스케이하이닉스 주식회사 | 비휘발성 메모리 장치 |
| US10714166B2 (en) * | 2018-08-13 | 2020-07-14 | Micron Technology, Inc. | Apparatus and methods for decoding memory access addresses for access operations |
| US11069424B2 (en) * | 2018-11-07 | 2021-07-20 | Arm Limited | Sensor for performance variation of memory read and write characteristics |
| US10885967B2 (en) * | 2019-01-14 | 2021-01-05 | Micron Technology, Inc. | Systems and methods for improving power efficiency in refreshing memory banks |
| US10770127B2 (en) * | 2019-02-06 | 2020-09-08 | Micron Technology, Inc. | Apparatuses and methods for managing row access counts |
| US11158364B2 (en) | 2019-05-31 | 2021-10-26 | Micron Technology, Inc. | Apparatuses and methods for tracking victim rows |
| US11158373B2 (en) | 2019-06-11 | 2021-10-26 | Micron Technology, Inc. | Apparatuses, systems, and methods for determining extremum numerical values |
| US10950290B2 (en) * | 2019-07-05 | 2021-03-16 | Macronix International Co., Ltd. | Memory device and operating method thereof that reduce off current to reduce errors in reading and writing data which have plurality of memory cell blocks and a source voltage generator |
| US11462291B2 (en) | 2020-11-23 | 2022-10-04 | Micron Technology, Inc. | Apparatuses and methods for tracking word line accesses |
| KR102860712B1 (ko) * | 2021-01-12 | 2025-09-17 | 에스케이하이닉스 주식회사 | 그룹 제어 회로 및 이를 포함하는 반도체 메모리 장치 |
| US11482275B2 (en) | 2021-01-20 | 2022-10-25 | Micron Technology, Inc. | Apparatuses and methods for dynamically allocated aggressor detection |
| US12597459B2 (en) | 2021-12-29 | 2026-04-07 | Micron Technology, Inc. | Apparatuses and methods for row hammer counter mat |
| US12165687B2 (en) | 2021-12-29 | 2024-12-10 | Micron Technology, Inc. | Apparatuses and methods for row hammer counter mat |
| US12592271B2 (en) | 2022-12-22 | 2026-03-31 | Micron Technology, Inc. | Apparatuses and methods for increased reliability row hammer counts |
| US12550318B2 (en) * | 2023-04-06 | 2026-02-10 | Taiwan Semiconductor Manufacturing Company Limited | Data storage node voltage monitor circuit and methods for forming the same |
Citations (10)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6633500B1 (en) * | 2002-04-26 | 2003-10-14 | Macronix International Co., Ltd. | Systems and methods for refreshing a non-volatile memory using a token |
| TWI235459B (en) * | 2002-09-18 | 2005-07-01 | Toshiba Corp | Semiconductor memory device and the control method |
| US20070285982A1 (en) * | 2006-04-07 | 2007-12-13 | Eric Carman | Memory array having a programmable word length, and method of operating same |
| US20080062793A1 (en) * | 2004-12-13 | 2008-03-13 | Waller William K | Sense amplifier circuitry and architecture to write data into and/or read from memory cells |
| US20080144403A1 (en) * | 2005-09-19 | 2008-06-19 | Philippe Bauser | Method and circuitry to generate a reference current for reading a memory cell, and device implementing same |
| US20080316848A1 (en) * | 2007-06-20 | 2008-12-25 | Kabushiki Kaisha Toshiba | Semiconductor memory device and driving method therefor |
| TWI308390B (en) * | 2006-08-07 | 2009-04-01 | Univ Nat Sun Yat Sen | Mos device with ritds and method for making the same |
| TWI308371B (enExample) * | 2003-02-25 | 2009-04-01 | Hitachi High Tech Corp | |
| TWI308606B (en) * | 2005-02-09 | 2009-04-11 | Kobe Steel Ltd | Semiconductor device and method for manufacturing multilayered substrate for semiconductor device |
| TWI308779B (enExample) * | 2005-04-14 | 2009-04-11 | Sharp Kk |
Family Cites Families (11)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6856568B1 (en) * | 2000-04-25 | 2005-02-15 | Multi Level Memory Technology | Refresh operations that change address mappings in a non-volatile memory |
| JP2002140890A (ja) * | 2000-10-31 | 2002-05-17 | Hitachi Ltd | 半導体装置 |
| JP2002260381A (ja) * | 2001-02-28 | 2002-09-13 | Toshiba Corp | 半導体メモリ装置 |
| JP4354663B2 (ja) * | 2001-03-15 | 2009-10-28 | 株式会社東芝 | 半導体メモリ装置 |
| EP1355316B1 (en) | 2002-04-18 | 2007-02-21 | Innovative Silicon SA | Data storage device and refreshing method for use with such device |
| JP3913709B2 (ja) * | 2003-05-09 | 2007-05-09 | 株式会社東芝 | 半導体記憶装置 |
| US20040228168A1 (en) * | 2003-05-13 | 2004-11-18 | Richard Ferrant | Semiconductor memory device and method of operating same |
| JP4195427B2 (ja) * | 2004-08-31 | 2008-12-10 | 株式会社東芝 | 半導体記憶装置 |
| JP2007207358A (ja) | 2006-02-02 | 2007-08-16 | Toshiba Corp | 半導体記憶装置 |
| KR100776737B1 (ko) * | 2006-02-10 | 2007-11-19 | 주식회사 하이닉스반도체 | 반도체 메모리의 액티브 싸이클 제어장치 및 방법 |
| KR100861301B1 (ko) | 2007-05-10 | 2008-10-01 | 주식회사 하이닉스반도체 | 반도체 소자 및 그의 제조방법 |
-
2009
- 2009-04-14 KR KR1020090032364A patent/KR101080200B1/ko not_active Expired - Fee Related
- 2009-06-30 US US12/494,857 patent/US8169847B2/en active Active
- 2009-07-24 TW TW098125092A patent/TWI494920B/zh not_active IP Right Cessation
- 2009-07-30 JP JP2009178341A patent/JP2010250921A/ja active Pending
- 2009-09-04 CN CN200910171086.3A patent/CN101866684B/zh not_active Expired - Fee Related
Patent Citations (10)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6633500B1 (en) * | 2002-04-26 | 2003-10-14 | Macronix International Co., Ltd. | Systems and methods for refreshing a non-volatile memory using a token |
| TWI235459B (en) * | 2002-09-18 | 2005-07-01 | Toshiba Corp | Semiconductor memory device and the control method |
| TWI308371B (enExample) * | 2003-02-25 | 2009-04-01 | Hitachi High Tech Corp | |
| US20080062793A1 (en) * | 2004-12-13 | 2008-03-13 | Waller William K | Sense amplifier circuitry and architecture to write data into and/or read from memory cells |
| TWI308606B (en) * | 2005-02-09 | 2009-04-11 | Kobe Steel Ltd | Semiconductor device and method for manufacturing multilayered substrate for semiconductor device |
| TWI308779B (enExample) * | 2005-04-14 | 2009-04-11 | Sharp Kk | |
| US20080144403A1 (en) * | 2005-09-19 | 2008-06-19 | Philippe Bauser | Method and circuitry to generate a reference current for reading a memory cell, and device implementing same |
| US20070285982A1 (en) * | 2006-04-07 | 2007-12-13 | Eric Carman | Memory array having a programmable word length, and method of operating same |
| TWI308390B (en) * | 2006-08-07 | 2009-04-01 | Univ Nat Sun Yat Sen | Mos device with ritds and method for making the same |
| US20080316848A1 (en) * | 2007-06-20 | 2008-12-25 | Kabushiki Kaisha Toshiba | Semiconductor memory device and driving method therefor |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US12159664B2 (en) | 2019-10-14 | 2024-12-03 | Arm Limited | Concurrent memory access operations |
| TWI886159B (zh) * | 2019-10-14 | 2025-06-11 | 英商Ａｒｍ股份有限公司 | 行多工技術 |
Also Published As
| Publication number | Publication date |
|---|---|
| KR101080200B1 (ko) | 2011-11-07 |
| US8169847B2 (en) | 2012-05-01 |
| CN101866684B (zh) | 2014-07-23 |
| JP2010250921A (ja) | 2010-11-04 |
| CN101866684A (zh) | 2010-10-20 |
| TW201037705A (en) | 2010-10-16 |
| KR20100113842A (ko) | 2010-10-22 |
| US20100260003A1 (en) | 2010-10-14 |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| MM4A | Annulment or lapse of patent due to non-payment of fees |