KR101080200B1 - 반도체 메모리 장치 및 그 리프레쉬 제어 방법 - Google Patents

반도체 메모리 장치 및 그 리프레쉬 제어 방법 Download PDF

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Publication number
KR101080200B1
KR101080200B1 KR1020090032364A KR20090032364A KR101080200B1 KR 101080200 B1 KR101080200 B1 KR 101080200B1 KR 1020090032364 A KR1020090032364 A KR 1020090032364A KR 20090032364 A KR20090032364 A KR 20090032364A KR 101080200 B1 KR101080200 B1 KR 101080200B1
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South Korea
Prior art keywords
refresh
signal
source
write
data
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KR1020090032364A
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English (en)
Korean (ko)
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KR20100113842A (ko
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오영훈
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주식회사 하이닉스반도체
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Priority to KR1020090032364A priority Critical patent/KR101080200B1/ko
Priority to US12/494,857 priority patent/US8169847B2/en
Priority to TW098125092A priority patent/TWI494920B/zh
Priority to JP2009178341A priority patent/JP2010250921A/ja
Priority to CN200910171086.3A priority patent/CN101866684B/zh
Publication of KR20100113842A publication Critical patent/KR20100113842A/ko
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Publication of KR101080200B1 publication Critical patent/KR101080200B1/ko
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    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
    • G11C11/406—Management or control of the refreshing or charge-regeneration cycles
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
    • G11C11/4063—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing
    • G11C11/407—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing for memory cells of the field-effect type
    • G11C11/408—Address circuits
    • G11C11/4085—Word line control circuits, e.g. word line drivers, - boosters, - pull-up, - pull-down, - precharge
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
    • G11C11/4063—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing
    • G11C11/407—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing for memory cells of the field-effect type
    • G11C11/408—Address circuits
    • G11C11/4087—Address decoders, e.g. bit - or word line decoders; Multiple line decoders
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
    • G11C11/4063—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing
    • G11C11/407—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing for memory cells of the field-effect type
    • G11C11/409—Read-write [R-W] circuits 
    • G11C11/4091—Sense or sense/refresh amplifiers, or associated sense circuitry, e.g. for coupled bit-line precharging, equalising or isolating
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
    • G11C11/4063—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing
    • G11C11/407—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing for memory cells of the field-effect type
    • G11C11/409—Read-write [R-W] circuits 
    • G11C11/4094—Bit-line management or control circuits
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
    • G11C11/4063—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing
    • G11C11/407—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing for memory cells of the field-effect type
    • G11C11/409—Read-write [R-W] circuits 
    • G11C11/4096—Input/output [I/O] data management or control circuits, e.g. reading or writing circuits, I/O drivers or bit-line switches 
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C2211/00—Indexing scheme relating to digital stores characterized by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C2211/401—Indexing scheme relating to cells needing refreshing or charge regeneration, i.e. dynamic cells
    • G11C2211/4016—Memory devices with silicon-on-insulator cells
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C2211/00—Indexing scheme relating to digital stores characterized by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C2211/401—Indexing scheme relating to cells needing refreshing or charge regeneration, i.e. dynamic cells
    • G11C2211/406—Refreshing of dynamic cells
    • G11C2211/4065—Low level details of refresh operations

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  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)
  • Databases & Information Systems (AREA)
  • Dram (AREA)
KR1020090032364A 2009-04-14 2009-04-14 반도체 메모리 장치 및 그 리프레쉬 제어 방법 Expired - Fee Related KR101080200B1 (ko)

Priority Applications (5)

Application Number Priority Date Filing Date Title
KR1020090032364A KR101080200B1 (ko) 2009-04-14 2009-04-14 반도체 메모리 장치 및 그 리프레쉬 제어 방법
US12/494,857 US8169847B2 (en) 2009-04-14 2009-06-30 Semiconductor memory apparatus and refresh control method of the same
TW098125092A TWI494920B (zh) 2009-04-14 2009-07-24 半導體記憶體裝置及其更新控制方法
JP2009178341A JP2010250921A (ja) 2009-04-14 2009-07-30 半導体メモリ装置及びそのリフレッシュ制御方法
CN200910171086.3A CN101866684B (zh) 2009-04-14 2009-09-04 半导体存储器装置及其刷新控制方法

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1020090032364A KR101080200B1 (ko) 2009-04-14 2009-04-14 반도체 메모리 장치 및 그 리프레쉬 제어 방법

Publications (2)

Publication Number Publication Date
KR20100113842A KR20100113842A (ko) 2010-10-22
KR101080200B1 true KR101080200B1 (ko) 2011-11-07

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KR1020090032364A Expired - Fee Related KR101080200B1 (ko) 2009-04-14 2009-04-14 반도체 메모리 장치 및 그 리프레쉬 제어 방법

Country Status (5)

Country Link
US (1) US8169847B2 (enExample)
JP (1) JP2010250921A (enExample)
KR (1) KR101080200B1 (enExample)
CN (1) CN101866684B (enExample)
TW (1) TWI494920B (enExample)

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CN103093807B (zh) * 2011-11-02 2015-08-26 华邦电子股份有限公司 随机存取存储器及其刷新控制器
CN104217746B (zh) * 2013-05-30 2017-04-12 华邦电子股份有限公司 参考存储胞的偏压产生器及偏压提供方法
US9123414B2 (en) 2013-11-22 2015-09-01 Micron Technology, Inc. Memory systems and memory programming methods
US9336875B2 (en) 2013-12-16 2016-05-10 Micron Technology, Inc. Memory systems and memory programming methods
KR102381046B1 (ko) * 2015-10-26 2022-03-31 에스케이하이닉스 주식회사 비휘발성 메모리 장치
US10714166B2 (en) * 2018-08-13 2020-07-14 Micron Technology, Inc. Apparatus and methods for decoding memory access addresses for access operations
US11069424B2 (en) * 2018-11-07 2021-07-20 Arm Limited Sensor for performance variation of memory read and write characteristics
US10885967B2 (en) * 2019-01-14 2021-01-05 Micron Technology, Inc. Systems and methods for improving power efficiency in refreshing memory banks
US10770127B2 (en) * 2019-02-06 2020-09-08 Micron Technology, Inc. Apparatuses and methods for managing row access counts
US11158364B2 (en) 2019-05-31 2021-10-26 Micron Technology, Inc. Apparatuses and methods for tracking victim rows
US11158373B2 (en) 2019-06-11 2021-10-26 Micron Technology, Inc. Apparatuses, systems, and methods for determining extremum numerical values
US10950290B2 (en) * 2019-07-05 2021-03-16 Macronix International Co., Ltd. Memory device and operating method thereof that reduce off current to reduce errors in reading and writing data which have plurality of memory cell blocks and a source voltage generator
US12159664B2 (en) * 2019-10-14 2024-12-03 Arm Limited Concurrent memory access operations
US11462291B2 (en) 2020-11-23 2022-10-04 Micron Technology, Inc. Apparatuses and methods for tracking word line accesses
KR102860712B1 (ko) * 2021-01-12 2025-09-17 에스케이하이닉스 주식회사 그룹 제어 회로 및 이를 포함하는 반도체 메모리 장치
US11482275B2 (en) 2021-01-20 2022-10-25 Micron Technology, Inc. Apparatuses and methods for dynamically allocated aggressor detection
US12597459B2 (en) 2021-12-29 2026-04-07 Micron Technology, Inc. Apparatuses and methods for row hammer counter mat
US12165687B2 (en) 2021-12-29 2024-12-10 Micron Technology, Inc. Apparatuses and methods for row hammer counter mat
US12592271B2 (en) 2022-12-22 2026-03-31 Micron Technology, Inc. Apparatuses and methods for increased reliability row hammer counts
US12550318B2 (en) * 2023-04-06 2026-02-10 Taiwan Semiconductor Manufacturing Company Limited Data storage node voltage monitor circuit and methods for forming the same

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US20080316848A1 (en) * 2007-06-20 2008-12-25 Kabushiki Kaisha Toshiba Semiconductor memory device and driving method therefor

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US6856568B1 (en) * 2000-04-25 2005-02-15 Multi Level Memory Technology Refresh operations that change address mappings in a non-volatile memory
JP2002140890A (ja) * 2000-10-31 2002-05-17 Hitachi Ltd 半導体装置
JP2002260381A (ja) * 2001-02-28 2002-09-13 Toshiba Corp 半導体メモリ装置
JP4354663B2 (ja) * 2001-03-15 2009-10-28 株式会社東芝 半導体メモリ装置
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Also Published As

Publication number Publication date
US8169847B2 (en) 2012-05-01
CN101866684B (zh) 2014-07-23
JP2010250921A (ja) 2010-11-04
TWI494920B (zh) 2015-08-01
CN101866684A (zh) 2010-10-20
TW201037705A (en) 2010-10-16
KR20100113842A (ko) 2010-10-22
US20100260003A1 (en) 2010-10-14

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