TWI493622B - 改善電漿輔助化學氣相沈積（ｐｅｃｖｄ）膜的程序控制及膜保形性之方法 - Google Patents

改善電漿輔助化學氣相沈積（ｐｅｃｖｄ）膜的程序控制及膜保形性之方法 Download PDF

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TWI493622B
TWI493622B TW098135283A TW98135283A TWI493622B TW I493622 B TWI493622 B TW I493622B TW 098135283 A TW098135283 A TW 098135283A TW 98135283 A TW98135283 A TW 98135283A TW I493622 B TWI493622 B TW I493622B
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power
plasma
frequency
high frequency
ruthenium
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TW201027623A (en
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Dennis Hausmann
James S Sims
Andrew Antonelli
Sesha Varadarajan
Schravendijk Bart Van
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Novellus Systems Inc
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Description

改善電漿輔助化學氣相沈積(PECVD)膜的程序控制及膜保形性之方法
本發明係關於在半導體加工中形成以矽為主的介電薄膜。
本申請案主張於2008年10月17日申請之美國專利申請案第12/253,807號，名為「改善PECVD膜的程序控制及膜保形性之方法(METHOD FOR IMPROVING PROCESS CONTROL AND FILM CONFORMALITY OF PECVD FILM)」的優先權，其全文以引用之方式併入本文並用於各種目的。
薄且保形的以矽為主的介電薄膜被使用在大量積體電路應用中，包括間隔物應用、襯墊應用及雙重圖案化應用。現行用於利用以矽烷為主的前驅物沈積此等膜的電漿輔助化學氣相沈積(PECVD)法通常具有超過120nm/分鐘的沈積速率。該沈積速率需要約1秒鐘的極短沈積時間以完成5nm標稱厚度之薄膜。短的沈積時間會使得再現性(包括在晶圓間與在設備間)更具挑戰性。另外，以習知方式沈積之以矽烷為主的氧化物之階梯覆蓋率差。
本發明藉由提供一種以更可控制之沈積形成經電漿輔助化學氣相沈積(PECVD)沈積之以矽為主的介電薄膜之方法，而解決該需求。包括氧化矽及氮化矽之以矽為主的介電薄膜使用PECVD製程來製造，其中脈衝激發電漿之高頻射頻(RF)功率。該方法允許於單一脈衝電漿沈積製程操作中製造薄膜及具有優良保形性(或階梯覆蓋率)的膜。
本發明提供利用脈衝式PECVD製程製得之以矽為主的介電薄膜。在脈衝式PECVD製程中，脈衝激發電漿之高頻射頻功率。該脈衝特性可藉由改變脈衝重複頻率(導通高頻RF功率之頻率)及工作循環(高頻RF功率導通之時間分率)而改變。例如，針對頻率500Hz及工作循環15%之脈衝，一個脈衝週期為2毫秒，其中高頻RF功率斷開1.7毫秒及導通0.3毫秒。
在另一態樣中，本發明係關於一種經配置用來實行PECVD製程的半導體加工裝置，其中脈衝激發電漿之高頻RF功率。該半導體加工裝置包括至少一腔室、一能脈衝激發電漿之高頻射頻功率之高頻RF發生器及一控制器。該腔室包括一基板支架、一處理氣體入口及一至真空源之連接。該控制器可經配置成執行一組指令，而實行脈衝式PECVD製程。該組指令可包括向腔室內注入一或多種前驅物氣體及脈衝激發電漿之高頻RF功率。
本發明之此等及其他態樣與優勢將在下文並參考圖示進一步加以敍述。
現將詳細參考本發明之特定實施例。特定實施例之實例在附圖中說明。儘管本發明連同此等特定實施例加以敍述，但應理解本發明不欲受限於該等特定實施例。相反地，其欲涵蓋如由隨附申請專利範圍所定義之本發明精神與範圍內可包括之替換物、修改及等效物。在下列描述中，闡明許多特定細節以提供對本發明的徹底瞭解。但本發明可在不存在一些或所有此等特定細節的情況下實施。在其他實例中，未詳述熟知的方法操作，以免不必要地混淆本發明。
導論
薄且保形的以矽為主的介電薄膜被使用在大量積體電路應用中，包括間隔物應用、襯墊應用及雙重圖案化應用。此等以矽為主的介電薄膜一般為厚度通常係5至10nm的氮化矽或氧化矽。氮化矽與氧化矽均可利用化學氣相沈積(CVD)或其之一種變型(諸如電漿輔助化學氣相沈積(PECVD))沈積於表面上。
PECVD提供能在較低溫度下實行CVD製程的優勢。在CVD中，基板係暴露於一或多種揮發性前驅物，其在基板表面上反應及/或分解，而產生期望的沈積物。CVD製程需要能源來提高前驅物的化學反應速率。一般而言，CVD的能源是熱；即，高溫可提高前驅物的化學反應速率。使用PECVD，電漿可增加前驅物的反應性，使沈積可在較低溫度下進行。
用於積體電路應用之PECVD的一項缺點為隨著前驅物反應性的增加，所需之膜可能沈積得太快，以致難於控制程序。這可導致以矽為主之介電薄膜之晶圓間與設備間的不良再現性。另外，此等薄膜(尤其係以矽烷為主的氧化物)的階梯覆蓋率是差的。
本發明為一種提供能沈積得比利用習知PECVD製造的膜更薄且更保形之以矽為主之介電薄膜之改良程序控制的方法。在PECVD製程中，導通及斷開電漿之高頻射頻(RF)功率，或脈衝激發該高頻RF功率可減少膜厚度/沈積時間(稱為「厚度/沈積時間」)。本文中之沈積時間為基板暴露於脈衝電漿的時間，與電漿工作循環無關。在該脈衝PECVD製程中，減小該厚度/沈積時間，使得沈積製程更可獲控制，從而使該製程更可再現(包括晶圓間與設備間)，並產生薄且保形的膜。沈積速率係計算為測得厚度除以總沈積時間(即，在沈積製程期間高頻RF功率導通並脈衝激發的時間)的比。
本發明之特定應用包括在供矽導通孔用之裸矽上及在供雙重圖案化(微影技術)用之光阻劑上沈積以矽為主的介電薄膜。
可利用能脈衝激發電漿之高頻RF功率的高頻RF發生器，以現有的半導體加工設備來實行脈衝式PECVD。特定言之，PECVD反應器(諸如可獲自Novellus Systems,Inc.(San Jose,California)之VectorTM 反應器室)可用於脈衝式PECVD。因此，可以最小的硬體變更製得改良之以矽為主的介電薄膜。
脈衝式PECVD沈積製程
本發明提供包括氧化矽、氮化矽與其變體(包括經摻雜變體)之以矽為主的介電薄膜，其係利用脈衝式電漿輔助化學氣相沈積(PECVD)法以單一沈積脈衝式電漿製程操作製得。脈衝激發電漿之高頻RF功率可減小以矽為主的介電薄膜之厚度/沈積時間。這使得沈積製程更易控制，產生薄且均一的膜及具有較佳保形性(或階梯覆蓋率)的膜。
脈衝特性可藉由改變脈衝重複頻率(導通及斷開高頻RF功率之頻率)及工作循環(高頻RF功率導通之時間分率)而改變。100%之工作循環係指不脈衝激發高頻RF功率。例如，針對頻率500Hz及工作循環15%之脈衝，一個脈衝週期為2毫秒，其中斷開高頻RF功率1.7毫秒及導通0.3毫秒。下文論述脈衝特性之進一步變化。
圖1描述一種根據本發明形成以矽為主的介電薄膜之方法的一般方法流程中之重要階段。方法(100)包括在沈積室中提供半導體裝置基板(102)並利用脈衝激發電漿之高頻RF功率之PECVD製程在基板上沈積以矽為主的介電薄膜(104)。
利用單一脈衝PECVD沈積製程操作沈積以矽為主的介電薄膜可藉由具有不同脈衝變化之沈積製程完成。圖2描述一種根據本發明此態樣之特定實施例形成以矽為主的介電薄膜之方法的方法流程。方法(200)再次包括在沈積室中提供半導體裝置基板(202)。藉由脈衝激發電漿之高頻RF功率之PECVD製程，在基板上沈積以矽為主的介電薄膜(204)。下文論述204a及204b中之脈衝特性變化。
在脈衝式PECVD製程中，高頻RF功率一般具有2至60MHz之頻率；在一較佳實施例中，高頻RF功率具有13.56MHz之頻率。在製程期間可導通或斷開脈衝式PECVD製程中之低頻RF功率。當導通低頻RF功率時，其一般具有50至500kHz之頻率；在一較佳實施例中，低頻RF功率具有約400kHz之頻率。
根據本發明在脈衝式PECVD中用於沈積以矽為主的介電薄膜的適當前驅物一般可與沒有脈衝激發高頻RF功率而實行之PECVD(即習知之PECVD)中所使用之前驅物相同。該等前驅物一般為用於氮化矽之矽前驅物與氮前驅物或用於氧化矽之氧前驅物。矽前驅物之特定實例包括矽烷與原矽酸四乙酯(TEOS)。矽烷在許多應用中為較佳前驅物。氮前驅物之特定實例包括氨、氮及肼。氧前驅物之特定實例包括一氧化二氮、氧、臭氧及水。經摻雜之以矽為主的介電薄膜(即，含有微量其他元素諸如碳及氫之以矽為主的介電薄膜)可經由將含於前驅物中之其他元素併入膜中而形成。亦可使用其他前驅物，諸如擅長技藝者根據文中提供之教示所顯而易見或易於辨別者。
圖3描繪本發明之一特定實施例的時序圖，其中藉由具有500Hz高脈衝頻率及15%工作循環的單一脈衝式PECVD製程操作形成以矽為主的介電質。此產生2毫秒之脈衝寬度，其中高頻RF功率導通時間0.3毫秒/斷開時間1.7毫秒。圖中顯示3個脈衝。在其他實施例中，脈衝頻率可在1Hz至10kHz之間變化。在又其他實施例中，脈衝頻率可在75至500Hz之間變化及工作循環可在約15%至99%之間變化。
再參考圖2，亦可視需要改變其他脈衝特性。例如：可降低電漿之高頻RF功率並在脈衝期間不斷開(204a)。例如，當脈衝導通時，高頻RF功率脈衝可為高頻RF功率之100%，及當脈衝斷開時，其為高頻RF功率之50%。另外，又或者，替代導通及斷開，電漿之高頻RF功率可在一段時間內增加及在一段時間內減少(204b)。
圖4描繪本發明其他特定實施例之時序圖，其中藉由具有以上參考圖2(204a及204b)所述之脈衝特性變化的單一脈衝式PECVD製程操作形成以矽為主的介電薄膜。圖4a描繪藉由如以上在圖2(204a)中所述之脈衝式PECVD製程形成以矽為主的介電薄膜的時序圖。脈衝頻率為500Hz，其中工作循環為15%，及當脈衝斷開時，高頻RF功率為50%，而非關閉。圖中顯示三個脈衝。在其他實施例中，可改變當斷開脈衝時高頻RF功率之功率值(即，0%至100%)。
圖4b描繪藉由如在圖2(204b)中所述之單一脈衝式PECVD製程操作形成以矽為主的介電薄膜的時序圖。高頻RF功率脈衝頻率為500Hz。另外，高頻RF功率在1毫秒時段內從0%增加至100%，然後在1毫秒時段內從100%減至0%。此係與其中高頻RF功率不從0%至100%及從100%至0%勻變，而係導通及斷開之圖3中描繪之時序形成對比。圖中顯示3個脈衝。在其他實施例中，可改變增減高頻RF功率之時段。另外，參考圖2(204a)敍述之脈衝特性變化可與以上參考圖2(204b)敍述之變化組合；即，其中高頻RF功率從不斷開，但例如從50%至100%然後從100%至50%勻變之高頻RF功率時序。
儘管本發明不受任何特定理論限制，但咸信脈衝式PECVD製程可減少如下所述在導通電漿之高頻RF功率時每單位時間的沈積膜厚度(稱為「厚度/沈積時間」)。在CVD製程期間存在電漿可藉由在前驅物中產生反應性物種(自由基)來降低CVD製程的活化能，因此降低可實行CVD製程的溫度。此等自由基反應性高，並具有高黏著係數。這會增加膜沈積速率而使沈積難以控制，產生不保形的膜。在根據本發明之單一脈衝式PECVD製程操作中，點燃電漿一小段時間，其間產生自由基。接著熄滅電漿，從而減少自由基數目及降低前驅物之反應性。在一段時間內，藉由利用電漿產生自由基，然後熄滅電漿以減少反應性，厚度/沈積時間減小並改良程序控制，從而產生薄膜及保形薄膜。
例如，以500Hz與15%之工作循環脈衝激發高頻RF電漿功率可大大地改良以矽烷為主之PECVD膜的階梯覆蓋率並減小厚度/沈積時間。應注意，對於以矽烷為主的膜，工作循環對階梯覆蓋率及厚度/沈積時間具有最重要影響。利用當前製造的高頻RF功率發生器，可以75-500Hz脈衝激發電漿的高頻RF功率。此等發生器不能維持工作循環小於15%或脈衝頻率大於500Hz的電漿。當可取得可產生更高頻率及更小工作循環的發生器時，利用進一步減小工作循環的脈衝式PECVD製程，可觀察到以矽為主之介電薄膜的進一步改進。然而，隨著脈衝頻率之增加及工作循環之減小，導通電漿之高頻RF功率的時間必須至少足以產生反應性物種。如未產生反應性物種，將無法實現脈衝式PECVD的優勢。
亦應注意根據本發明之膜形成法可採用單一沈積製程操作來進行。脈衝式電漿沈積技術之先前的方法涉及多個沈積製程操作，例如在電漿沈積之前的初始熱膜沈積(例如，循環重複的CVD及PECVD步驟)。該多個沈積製程操作技術顯然引進額外的複雜性，而減損程序的效率及可控制性，尤其係就形成薄的均一膜而言。根據本發明之方法藉由提供單一製程操作中之脈衝式電漿輔助化學氣相沈積膜形成技術，而避免多個沈積製程操作之缺點。
裝置
本發明較佳係在電漿輔助化學氣相沈積(PECVD)反應器中實施。該反應器可呈許多不同型式。一般而言，該裝置將包括可容納一或多個晶圓及適於晶圓處理的一或多個腔室或「反應器」(有時包括多個處理站)。每一腔室可容納一或多個供處理晶圓。該一或多個腔室保持晶圓在一或多個一定位置(在該位置內有或者沒有移動，例如轉動、振動或其他攪動)。在一實施例中，經歷以矽為主的介電薄膜沈積的晶圓在處理期間於反應器室內從一個站轉移到另一站。例如，根據本發明，針對40nm介電薄膜沈積，可在四個站中之每一個沈積10nm之膜。當然，整個膜沈積可全部發生在單一站，或可在任何數目的站中沈積總膜厚度之任何比率。
當處理時，每一晶圓經基座、晶圓夾頭及/或其他晶圓夾持裝置固定位。針對某些加熱晶圓之操作，該裝置可包括加熱器諸如加熱板。在本發明之一較佳實施例中，可使用由Novellus Systems(San Jose,CA)製造之VectorTM 反應器來實施本發明。
圖5提供描繪經配置用來實施本發明之各種反應器組件的簡單方塊圖。如圖所示，反應器500包括處理室524，其封圍反應器之其他組件並用來容納由包括連同接地加熱器組塊520操作之噴淋頭514的電容器型系統所產生的電漿。連接到匹配網路506之高頻射頻(RF)發生器504及低頻RF發生器502連至噴淋頭514。高頻RF發生器504之功率能被脈衝激發。由匹配網路506提供之功率及頻率足以從處理氣體產生電漿，例如400-700W總功率。在實施本發明中，脈衝激發高頻RF發生器及可導通或斷開低頻RF發生器。
在反應器內，晶圓基座518支持基板516。基座一般包括在沈積及/或電漿處理反應期間及介於其間用於固定及轉移基板之基板支架，諸如夾盤、叉架或升降銷。夾盤可為靜電夾盤、機械夾盤或在工業及/或研究中可利用之其他各種類型的夾盤。
處理氣體係經入口512導入。多源氣體管線510連接至歧管508。氣體可預先混合或不預先混合。使用適宜的閥件及質量流量控制機構以確保在沈積製程期間傳送正確的氣體。在傳送呈液態的化學前驅物時，使用液體流量控制機構。然後使液體在到達沈積室之前在其於歧管中輸送期間於其氣化點以上加熱蒸發並與其他處理氣體混合。
處理氣體經出口522排出腔室524。一般利用真空泵526(例如，一階段或兩階段機械乾燥泵及/或渦輪分子泵)將處理氣體抽出，並藉由閉環控制節流裝置(諸如節流閥或鐘擺式閥)保持反應器內適宜的低壓(例如，0.01至10托；經常約1至10托)。
該裝置亦可包括經配置執行一組指令之控制器528。該組指令可包括向腔室內注入一或多種處理氣體及脈衝激發電漿之高頻RF功率的指令。此等指令用於執行在本發明之方法實施例中之操作。該組指令亦可包括執行習知PECVD沈積之指令。
本發明可於多站或單一站設備中實施。在特定實施例中，使用具有四站沈積模式之300mm Novellus VectorTM 設備。在每一沈積處理後可給出晶圓指標直至完成全部所需沈積，或者可在單一站進行多個沈積，然後給出晶圓指標。
實例
提供下列實例以進一步說明本發明之態樣及優勢。此等實例係用於例證並更清楚說明本發明之態樣且不欲以任何方式限制本發明。
此等實例之膜沈積係在以13.56MHz之頻率及對氧化物沈積約2托及對氮化物沈積約9托之反應器壓力操作之具有HFRF源的Novellus VectorTM 設備中進行。
參考圖6，其說明改變脈衝式電漿輔助化學氣相沈積(PECVD)製程之工作循環的效果。圖6a及6b為導通電漿之高頻RF功率時每單位時間的沈積膜厚度(稱為「厚度/沈積時間」)對工作循環的圖。圖6a說明氮化矽沈積之效果，及圖6b說明氧化矽沈積之效果。針對利用脈衝式PECVD之氮化矽沈積，可達成小於10nm/分鐘之厚度/沈積時間。同樣地，針對氧化矽，可達成小於30nm/分鐘之沈積時間。注意100%工作循環表示無脈衝激發且應視為基線性質(即，習知之PECVD)。厚度/沈積時間隨工作循環的減少而減小，從而改良對沈積製程之控制。
參考圖7，其說明脈衝式PECVD製程對氧化矽之階梯覆蓋率的效果。圖7比較在具有140nm特徵深度之基板上，氧化矽之脈衝式PECVD及習知PECVD(即，不脈衝激發高頻RF功率)之階梯覆蓋率。階梯覆蓋率為針對給定階梯，側壁厚度與底部厚度的比。如圖所示，針對氧化矽，脈衝式PECVD一般使階梯覆蓋率增加約15%。在針對氮化矽之脈衝式PECVD中可見類似結果。
圖8為具有接近100%階梯覆蓋率之脈衝式PECVD沈積氮化矽膜的掃描電子顯微圖。利用習知之PECVD，將約5nm非晶矽之裝飾帽804沈積在具有特徵802之矽晶圓800上。然後，經由脈衝式PECVD將約20nm氮化矽806沈積在裝飾帽上。氮化矽係利用矽烷與氨作為前驅物，在脈衝頻率500Hz及工作循環15%之Novellus VectorTM 設備中沈積。將另一約5nm的非晶矽裝飾帽808沈積在氮化矽上。然後，分開矽晶圓並將其邊緣浸入1% HF溶液中以突顯不同層。注意非晶矽裝飾帽對PECVD製程並不關鍵。裝飾帽藉係藉由在氮化矽之上方及下方提供對比層，而有助於理解掃描電子顯微術(SEM)圖像。
結論
儘管上述發明出於清楚理解之目的已在一些細節上加以敍述，但當明白可在隨附申請專利範圍之範疇內作出某些改變及修改。應注意存在許多實施本發明之方法與組合物的替代性方法。因此，本實施例應視為係說明性而非限制性，且本發明不受文中出示之細節限制。
本文所有引用參考文獻係因各種目的以引用之方式併入。
500．．．反應器
502．．．低頻RF發生器
504．．．高頻RF發生器
506．．．匹配網路
508．．．歧管
510．．．多源氣體管線
512．．．入口
514．．．噴淋頭
516．．．基板
518．．．晶圓基座
520．．．接地加熱器組塊
522．．．出口
524．．．處理室
526．．．真空泵
528．．．控制器
800．．．矽晶圓
802．．．特徵
804．．．裝飾帽
806．．．氮化矽
808．．．裝飾帽
圖1描繪一種根據本發明形成以矽為主的介電薄膜之方法的一般方法流程中之重要階段。
圖2描繪一種根據本發明特定實施例形成以矽為主的介電薄膜之方法的一般方法流程中之重要階段。
圖3描繪本發明一特定實施例之時序圖。
圖4，包括圖4a及4b，描繪本發明其他特定實施例之時序圖。
圖5為描繪經配置用於實施本發明之反應器的簡單方塊圖。
圖6描繪顯示根據本發明一態樣在脈衝式PECVD沈積氮化矽(圖6a)及氧化矽(圖6b)期間改變電漿之高頻RF功率之工作循環的效果圖。
圖7描繪顯示根據本發明一態樣脈衝式PECVD與習知PECVD對氧化矽沈積之階梯覆蓋率的效果圖。
圖8為以脈衝式PECVD沈積之具有接近100%階梯覆蓋率之氮化矽膜的掃描電子顯微圖。
(無元件符號說明)

Claims (23)

  1. 一種形成以矽為主之介電薄膜的方法，其包含：在沈積室中提供半導體裝置基板；及利用脈衝式電漿輔助化學氣相沈積，藉由單一製程操作，在基板上沈積以矽為主的介電薄膜，其中以1Hz至10kHz之頻率脈衝激發電漿之高頻射頻功率。
  2. 如請求項1之方法，其中以75至500Hz之頻率與15%至99%之工作循環脈衝激發電漿之高頻射頻功率。
  3. 如請求項1之方法，其中以500Hz之頻率與15%之工作循環脈衝激發電漿之高頻射頻功率。
  4. 如請求項1之方法，其中以至少夠長而足以在前驅物中產生反應性物種之工作循環來脈衝激發電漿之高頻射頻功率。
  5. 如請求項1之方法，其中該電漿之高頻射頻功率具有2至60MHz之頻率。
  6. 如請求項1之方法，其中該電漿之高頻射頻功率具有13.56MHz之頻率。
  7. 如請求項1之方法，其中存在電漿之低頻射頻功率。
  8. 如請求項7之方法，其中該電漿之低頻射頻功率具有50至500kHz之頻率。
  9. 如請求項7之方法，其中該電漿之低頻射頻功率具有400kHz之頻率。
  10. 如請求項1之方法，其中該以矽為主之介電薄膜係沈積在半導體裝置基板上之光阻劑上。
  11. 如請求項1之方法，其中該以矽為主之介電薄膜係沈積在半導體裝置基板上之裸矽上。
  12. 如請求項1之方法，其中該以矽為主之介電薄膜係使用矽前驅物與氮前驅物形成之氮化矽。
  13. 如請求項12之方法，其中該氮化矽之厚度/沈積時間係小於每分鐘10nm。
  14. 如請求項12之方法，其中該矽前驅物係選自由矽烷與原矽酸四乙酯(TEOS)組成之群，且該氮前驅物係選自由氨、氮及肼組成之群。
  15. 如請求項12之方法，其中該矽前驅物為矽烷，且該氮前驅物為一氧化二氮。
  16. 如請求項1之方法，其中該以矽為主之介電薄膜係使用矽前驅物與氧前驅物形成之氧化矽。
  17. 如請求項16之方法，其中該厚度/沈積時間係小於每分鐘30nm。
  18. 如請求項16之方法，其中該矽前驅物係選自由矽烷與原矽酸四乙酯(TEOS)組成之群，且該氧前驅物係選自由一氧化二氮、氧、臭氧及水組成之群。
  19. 如請求項16之方法，其中該矽前驅物為原矽酸四乙酯(TEOS)，且該氧前驅物為氧。
  20. 如請求項1之方法，其中脈衝激發電漿之高頻射頻功率，使得該高頻射頻功率在脈衝期間不斷開。
  21. 如請求項1之方法，其中脈衝激發電漿之高頻射頻功率，使得該高頻射頻功率不導通及斷開，而係在一段時 間內增加及在一段時間內減少。
  22. 如請求項1之方法，其中該以矽為主之介電薄膜的階梯覆蓋率優於藉由其中未脈衝激發電漿之高頻射頻功率之電漿輔助化學氣相沈積法製造之以矽為主之介電薄膜的階梯覆蓋率。
  23. 一種用於在基板上沈積以矽為主之介電薄膜的半導體加工裝置，其包括：一具有一基板支架、一處理氣體入口及一至真空源之連接的腔室，其包括：一能脈衝激發電漿之高頻射頻功率的高頻射頻發生器；及一經配置以執行一組指令之控制器，該組指令包括用於利用其中脈衝激發電漿之高頻射頻功率之脈衝式電漿輔助化學氣相沈積，藉由單一製程操作，於基板上沈積以矽為主之介電薄膜的指令，該等指令包括：向該腔室內注入一或多種前驅物氣體；及以1Hz至10kHz之頻率脈衝激發電漿之高頻射頻功率。
TW098135283A 2008-10-17 2009-10-19 改善電漿輔助化學氣相沈積（ｐｅｃｖｄ）膜的程序控制及膜保形性之方法 TWI493622B (zh)

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