TW504795B - Seed layers for interconnects and methods and apparatus for their fabrication - Google Patents

Seed layers for interconnects and methods and apparatus for their fabrication Download PDF

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Publication number
TW504795B
TW504795B TW089118841A TW89118841A TW504795B TW 504795 B TW504795 B TW 504795B TW 089118841 A TW089118841 A TW 089118841A TW 89118841 A TW89118841 A TW 89118841A TW 504795 B TW504795 B TW 504795B
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TW
Taiwan
Prior art keywords
seed layer
conformal
deposition
layer
copper
Prior art date
Application number
TW089118841A
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English (en)
Chinese (zh)
Inventor
Uri Cohen
Original Assignee
Uri Cohen
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Publication date
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First worldwide family litigation filed litigation Critical https://patents.darts-ip.com/?family=27021179&utm_source=google_patent&utm_medium=platform_link&utm_campaign=public_patent_search&patent=TW504795(B) "Global patent litigation dataset” by Darts-ip is licensed under a Creative Commons Attribution 4.0 International License.
Priority claimed from US09/410,898 external-priority patent/US6136707A/en
Application filed by Uri Cohen filed Critical Uri Cohen
Application granted granted Critical
Publication of TW504795B publication Critical patent/TW504795B/zh

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Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
    • H01L21/76841—Barrier, adhesion or liner layers
    • H01L21/76843—Barrier, adhesion or liner layers formed in openings in a dielectric
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
    • H01L21/76841—Barrier, adhesion or liner layers
    • H01L21/76871—Layers specifically deposited to enhance or enable the nucleation of further layers, i.e. seed layers
    • H01L21/76873—Layers specifically deposited to enhance or enable the nucleation of further layers, i.e. seed layers for electroplating
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2221/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof covered by H01L21/00
    • H01L2221/10—Applying interconnections to be used for carrying current between separate components within a device
    • H01L2221/1068—Formation and after-treatment of conductors
    • H01L2221/1073—Barrier, adhesion or liner layers
    • H01L2221/1084—Layers specifically deposited to enhance or enable the nucleation of further layers, i.e. seed layers
    • H01L2221/1089—Stacks of seed layers

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Electrodes Of Semiconductors (AREA)
  • Electroplating Methods And Accessories (AREA)
  • Magnetic Heads (AREA)
TW089118841A 1999-10-02 2000-09-14 Seed layers for interconnects and methods and apparatus for their fabrication TW504795B (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US09/410,898 US6136707A (en) 1999-10-02 1999-10-02 Seed layers for interconnects and methods for fabricating such seed layers
US09/563,733 US6610151B1 (en) 1999-10-02 2000-05-03 Seed layers for interconnects and methods and apparatus for their fabrication

Publications (1)

Publication Number Publication Date
TW504795B true TW504795B (en) 2002-10-01

Family

ID=27021179

Family Applications (1)

Application Number Title Priority Date Filing Date
TW089118841A TW504795B (en) 1999-10-02 2000-09-14 Seed layers for interconnects and methods and apparatus for their fabrication

Country Status (5)

Country Link
US (8) US6610151B1 (enExample)
JP (1) JP2003511858A (enExample)
KR (1) KR20020043604A (enExample)
TW (1) TW504795B (enExample)
WO (1) WO2001026145A1 (enExample)

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US20070117379A1 (en) 2007-05-24
US20040087171A1 (en) 2004-05-06
US20090233440A1 (en) 2009-09-17
US6903016B2 (en) 2005-06-07
US6518668B2 (en) 2003-02-11
US7199052B2 (en) 2007-04-03
US20090239372A1 (en) 2009-09-24
US20010005056A1 (en) 2001-06-28
US7550386B2 (en) 2009-06-23
US20080026569A1 (en) 2008-01-31
US9673090B2 (en) 2017-06-06

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