KR20020043604A - 인터커넥터용 시드층 및 이것을 형성하기 위한 방법 및 장치 - Google Patents

인터커넥터용 시드층 및 이것을 형성하기 위한 방법 및 장치 Download PDF

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Publication number
KR20020043604A
KR20020043604A KR1020027004251A KR20027004251A KR20020043604A KR 20020043604 A KR20020043604 A KR 20020043604A KR 1020027004251 A KR1020027004251 A KR 1020027004251A KR 20027004251 A KR20027004251 A KR 20027004251A KR 20020043604 A KR20020043604 A KR 20020043604A
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South Korea
Prior art keywords
seed layer
conformal
layer
deposition
seed
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KR1020027004251A
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English (en)
Korean (ko)
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우리 코헨
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우리 코헨
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First worldwide family litigation filed litigation Critical https://patents.darts-ip.com/?family=27021179&utm_source=google_patent&utm_medium=platform_link&utm_campaign=public_patent_search&patent=KR20020043604(A) "Global patent litigation dataset” by Darts-ip is licensed under a Creative Commons Attribution 4.0 International License.
Priority claimed from US09/410,898 external-priority patent/US6136707A/en
Application filed by 우리 코헨 filed Critical 우리 코헨
Publication of KR20020043604A publication Critical patent/KR20020043604A/ko
Withdrawn legal-status Critical Current

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
    • H01L21/76841—Barrier, adhesion or liner layers
    • H01L21/76843—Barrier, adhesion or liner layers formed in openings in a dielectric
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
    • H01L21/76841—Barrier, adhesion or liner layers
    • H01L21/76871—Layers specifically deposited to enhance or enable the nucleation of further layers, i.e. seed layers
    • H01L21/76873—Layers specifically deposited to enhance or enable the nucleation of further layers, i.e. seed layers for electroplating
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2221/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof covered by H01L21/00
    • H01L2221/10—Applying interconnections to be used for carrying current between separate components within a device
    • H01L2221/1068—Formation and after-treatment of conductors
    • H01L2221/1073—Barrier, adhesion or liner layers
    • H01L2221/1084—Layers specifically deposited to enhance or enable the nucleation of further layers, i.e. seed layers
    • H01L2221/1089—Stacks of seed layers

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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Electrodes Of Semiconductors (AREA)
  • Electroplating Methods And Accessories (AREA)
  • Magnetic Heads (AREA)
KR1020027004251A 1999-10-02 2000-09-25 인터커넥터용 시드층 및 이것을 형성하기 위한 방법 및 장치 Withdrawn KR20020043604A (ko)

Applications Claiming Priority (5)

Application Number Priority Date Filing Date Title
US09/410,898 1999-10-02
US09/410,898 US6136707A (en) 1999-10-02 1999-10-02 Seed layers for interconnects and methods for fabricating such seed layers
US09/563,733 2000-05-03
US09/563,733 US6610151B1 (en) 1999-10-02 2000-05-03 Seed layers for interconnects and methods and apparatus for their fabrication
PCT/US2000/040983 WO2001026145A1 (en) 1999-10-02 2000-09-25 Seed layers for interconnects and methods and apparatus for their fabrication

Publications (1)

Publication Number Publication Date
KR20020043604A true KR20020043604A (ko) 2002-06-10

Family

ID=27021179

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1020027004251A Withdrawn KR20020043604A (ko) 1999-10-02 2000-09-25 인터커넥터용 시드층 및 이것을 형성하기 위한 방법 및 장치

Country Status (5)

Country Link
US (8) US6610151B1 (enExample)
JP (1) JP2003511858A (enExample)
KR (1) KR20020043604A (enExample)
TW (1) TW504795B (enExample)
WO (1) WO2001026145A1 (enExample)

Families Citing this family (118)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6482734B1 (en) * 1998-01-20 2002-11-19 Lg Semicon Co., Ltd. Diffusion barrier layer for semiconductor device and fabrication method thereof
JP2000138201A (ja) * 1998-10-29 2000-05-16 Ulvac Seimaku Kk ハーフトーン位相シフト膜のドライエッチング方法および装置、ハーフトーン位相シフトフォトマスクおよびその作製方法、ならびに半導体回路およびその製作方法
US6610151B1 (en) * 1999-10-02 2003-08-26 Uri Cohen Seed layers for interconnects and methods and apparatus for their fabrication
US7105434B2 (en) * 1999-10-02 2006-09-12 Uri Cohen Advanced seed layery for metallic interconnects
KR100338112B1 (ko) * 1999-12-22 2002-05-24 박종섭 반도체 소자의 구리 금속 배선 형성 방법
WO2001048800A1 (en) * 1999-12-24 2001-07-05 Ebara Corporation Semiconductor wafer processing apparatus and processing method
KR100407680B1 (ko) * 2000-06-20 2003-12-01 주식회사 하이닉스반도체 반도체 소자의 금속 배선 형성방법
US6368954B1 (en) * 2000-07-28 2002-04-09 Advanced Micro Devices, Inc. Method of copper interconnect formation using atomic layer copper deposition
US6800554B2 (en) * 2000-12-18 2004-10-05 Intel Corporation Copper alloys for interconnections having improved electromigration characteristics and methods of making same
US6737740B2 (en) * 2001-02-08 2004-05-18 Micron Technology, Inc. High performance silicon contact for flip chip
US6764940B1 (en) 2001-03-13 2004-07-20 Novellus Systems, Inc. Method for depositing a diffusion barrier for copper interconnect applications
US6869515B2 (en) * 2001-03-30 2005-03-22 Uri Cohen Enhanced electrochemical deposition (ECD) filling of high aspect ratio openings
US9076843B2 (en) 2001-05-22 2015-07-07 Novellus Systems, Inc. Method for producing ultra-thin tungsten layers with improved step coverage
US6842659B2 (en) * 2001-08-24 2005-01-11 Applied Materials Inc. Method and apparatus for providing intra-tool monitoring and control
US6936906B2 (en) * 2001-09-26 2005-08-30 Applied Materials, Inc. Integration of barrier layer and seed layer
US6503824B1 (en) * 2001-10-12 2003-01-07 Mosel Vitelic, Inc. Forming conductive layers on insulators by physical vapor deposition
US6916398B2 (en) 2001-10-26 2005-07-12 Applied Materials, Inc. Gas delivery apparatus and method for atomic layer deposition
JP3727277B2 (ja) * 2002-02-26 2005-12-14 Ｎｅｃエレクトロニクス株式会社 半導体装置の製造方法
US6620724B1 (en) * 2002-05-09 2003-09-16 Infineon Technologies Ag Low resistivity deep trench fill for DRAM and EDRAM applications
US6724087B1 (en) * 2002-07-31 2004-04-20 Advanced Micro Devices, Inc. Laminated conductive lines and methods of forming the same
US6790773B1 (en) * 2002-08-28 2004-09-14 Novellus Systems, Inc. Process for forming barrier/seed structures for integrated circuits
US20040096586A1 (en) * 2002-11-15 2004-05-20 Schulberg Michelle T. System for deposition of mesoporous materials
KR20040060562A (ko) * 2002-12-30 2004-07-06 동부전자 주식회사 반도체 소자 제조시 배리어 메탈 산화방지방법
US6806192B2 (en) * 2003-01-24 2004-10-19 Taiwan Semiconductor Manufacturing Company, Ltd. Method of barrier-less integration with copper alloy
US6943111B2 (en) * 2003-02-10 2005-09-13 Taiwan Semiconductor Manufacturing Company, Ltd. Barrier free copper interconnect by multi-layer copper seed
JP4188125B2 (ja) * 2003-03-05 2008-11-26 Ｔｄｋ株式会社 磁気記録媒体の製造方法及び製造装置
US7842605B1 (en) 2003-04-11 2010-11-30 Novellus Systems, Inc. Atomic layer profiling of diffusion barrier and metal seed layers
US8298933B2 (en) 2003-04-11 2012-10-30 Novellus Systems, Inc. Conformal films on semiconductor substrates
EP1482069A1 (en) * 2003-05-28 2004-12-01 Interuniversitair Microelektronica Centrum Vzw Method for producing polycrystalline silicon germanium suitable for micromachining
KR100560666B1 (ko) * 2003-07-07 2006-03-16 삼성전자주식회사 반도체 소자 제조용 금속막 증착 시스템 및 그 운용 방법
US6900127B2 (en) * 2003-08-27 2005-05-31 Texas Instruments Incorporated Multilayer integrated circuit copper plateable barriers
US7081647B2 (en) * 2003-09-29 2006-07-25 Matsushita Electric Industrial Co., Ltd. Microelectromechanical system and method for fabricating the same
US20050082606A1 (en) * 2003-10-20 2005-04-21 Stephan Grunow Low K dielectric integrated circuit interconnect structure
US7265038B2 (en) * 2003-11-25 2007-09-04 Taiwan Semiconductor Manufacturing Co., Ltd. Method for forming a multi-layer seed layer for improved Cu ECP
KR100587658B1 (ko) * 2003-12-31 2006-06-08 동부일렉트로닉스 주식회사 이씨피공정에서의 터미날 효과 최소화 방법
US20050184288A1 (en) * 2004-02-25 2005-08-25 Tien-I Bao Semiconductor device having a second level of metallization formed over a first level with minimal damage to the first level and method
US7732326B2 (en) 2004-02-25 2010-06-08 Taiwan Semiconductor Manufacturing Company, Ltd. Semiconductor device having a second level of metallization formed over a first level with minimal damage to the first level and method
US7067409B2 (en) * 2004-05-10 2006-06-27 Taiwan Semiconductor Manufacturing Company, Ltd. Plasma treatment at film layer to reduce sheet resistance and to improve via contact resistance
US7378744B2 (en) * 2004-05-10 2008-05-27 Taiwan Semiconductor Manufacturing Company, Ltd. Plasma treatment at film layer to reduce sheet resistance and to improve via contact resistance
US7306962B2 (en) * 2004-06-17 2007-12-11 Sharp Laboratories Of America, Inc. Electroformed metallization
US7112470B2 (en) * 2004-09-15 2006-09-26 International Business Machines Corporation Chip dicing
US7704368B2 (en) 2005-01-25 2010-04-27 Taiwan Semiconductor Manufacturing Co. Ltd. Method and apparatus for electrochemical plating semiconductor wafers
RU2364498C2 (ru) * 2005-03-09 2009-08-20 АйЭйчАй КОРПОРЕЙШН Зажимное устройство
EP1909320A1 (en) * 2006-10-05 2008-04-09 ST Microelectronics Crolles 2 SAS Copper diffusion barrier
US20070080455A1 (en) * 2005-10-11 2007-04-12 International Business Machines Corporation Semiconductors and methods of making
US7863183B2 (en) * 2006-01-18 2011-01-04 International Business Machines Corporation Method for fabricating last level copper-to-C4 connection with interfacial cap structure
US7645696B1 (en) * 2006-06-22 2010-01-12 Novellus Systems, Inc. Deposition of thin continuous PVD seed layers having improved adhesion to the barrier layer
JP2008028058A (ja) 2006-07-20 2008-02-07 Tokyo Electron Ltd 半導体装置の製造方法、半導体装置の製造装置、半導体装置及び記憶媒体
US7605078B2 (en) * 2006-09-29 2009-10-20 Tokyo Electron Limited Integration of a variable thickness copper seed layer in copper metallization
US7510634B1 (en) 2006-11-10 2009-03-31 Novellus Systems, Inc. Apparatus and methods for deposition and/or etch selectivity
KR100763136B1 (ko) 2006-12-11 2007-10-02 동부일렉트로닉스 주식회사 시스템 인 패키지의 웨이퍼 본딩 방법
DE102007004884A1 (de) * 2007-01-31 2008-08-14 Advanced Micro Devices, Inc., Sunnyvale Verfahren zur Herstellung einer Metallschicht über einem strukturierten Dielektrikum durch stromlose Abscheidung unter Anwendung einer selektiv vorgesehenen Aktivierungsschicht
US8058164B2 (en) * 2007-06-04 2011-11-15 Lam Research Corporation Methods of fabricating electronic devices using direct copper plating
JP2009016520A (ja) * 2007-07-04 2009-01-22 Tokyo Electron Ltd 半導体装置の製造方法及び半導体装置の製造装置
US7709370B2 (en) 2007-09-20 2010-05-04 International Business Machines Corporation Spin-on antireflective coating for integration of patternable dielectric materials and interconnect structures
US8618663B2 (en) 2007-09-20 2013-12-31 International Business Machines Corporation Patternable dielectric film structure with improved lithography and method of fabricating same
US8084862B2 (en) 2007-09-20 2011-12-27 International Business Machines Corporation Interconnect structures with patternable low-k dielectrics and method of fabricating same
US20090127097A1 (en) * 2007-11-16 2009-05-21 Kei-Wei Chen Forming Seed Layer in Nano-Trench Structure Using Net Deposition and Net Etch
US7727890B2 (en) 2007-12-10 2010-06-01 International Business Machines Corporation High aspect ratio electroplated metal feature and method
KR100924556B1 (ko) 2008-01-04 2009-11-02 주식회사 하이닉스반도체 반도체 소자의 금속배선 및 그 형성방법
US7704886B2 (en) * 2008-02-14 2010-04-27 Taiwan Semiconductor Manufacturing Company, Ltd. Multi-step Cu seed layer formation for improving sidewall coverage
US8252690B2 (en) * 2008-02-14 2012-08-28 Taiwan Semiconductor Manufacturing Company, Ltd. In situ Cu seed layer formation for improving sidewall coverage
US7879720B2 (en) * 2008-09-30 2011-02-01 Samsung Electronics Co., Ltd. Methods of forming electrical interconnects using electroless plating techniques that inhibit void formation
US9159571B2 (en) 2009-04-16 2015-10-13 Lam Research Corporation Tungsten deposition process using germanium-containing reducing agent
US20100267230A1 (en) * 2009-04-16 2010-10-21 Anand Chandrashekar Method for forming tungsten contacts and interconnects with small critical dimensions
KR20100133834A (ko) * 2009-06-12 2010-12-22 웅진케미칼 주식회사 저융점사를 포함하는 원단
US10256142B2 (en) 2009-08-04 2019-04-09 Novellus Systems, Inc. Tungsten feature fill with nucleation inhibition
US7956463B2 (en) * 2009-09-16 2011-06-07 International Business Machines Corporation Large grain size conductive structure for narrow interconnect openings
JP5498751B2 (ja) * 2009-10-05 2014-05-21 ルネサスエレクトロニクス株式会社 半導体装置の製造方法
US8900663B2 (en) * 2009-12-28 2014-12-02 Gvd Corporation Methods for coating articles
US9714474B2 (en) * 2010-04-06 2017-07-25 Tel Nexx, Inc. Seed layer deposition in microscale features
WO2012039932A2 (en) * 2010-09-21 2012-03-29 Applied Materials, Inc. Methods for forming layers on a substrate
TWI413468B (zh) * 2010-12-29 2013-10-21 Unimicron Technology Corp 製造內嵌式細線路之方法
US8399353B2 (en) * 2011-01-27 2013-03-19 Tokyo Electron Limited Methods of forming copper wiring and copper film, and film forming system
US8524599B2 (en) 2011-03-17 2013-09-03 Micron Technology, Inc. Methods of forming at least one conductive element and methods of forming a semiconductor structure
JP2012231096A (ja) * 2011-04-27 2012-11-22 Elpida Memory Inc 半導体装置及びその製造方法
US8525339B2 (en) 2011-07-27 2013-09-03 International Business Machines Corporation Hybrid copper interconnect structure and method of fabricating same
US8946082B2 (en) * 2011-09-16 2015-02-03 GlobalFoundries, Inc. Methods for forming semiconductor devices
US20130140688A1 (en) * 2011-12-02 2013-06-06 Chun-Hung Chen Through Silicon Via and Method of Manufacturing the Same
US10381266B2 (en) 2012-03-27 2019-08-13 Novellus Systems, Inc. Tungsten feature fill with nucleation inhibition
US11437269B2 (en) 2012-03-27 2022-09-06 Novellus Systems, Inc. Tungsten feature fill with nucleation inhibition
JP6273257B2 (ja) 2012-03-27 2018-01-31 ノベラス・システムズ・インコーポレーテッドＮｏｖｅｌｌｕｓ Ｓｙｓｔｅｍｓ Ｉｎｃｏｒｐｏｒａｔｅｄ タングステンによるフィーチャ充填
US20140046475A1 (en) * 2012-08-09 2014-02-13 Applied Materials, Inc. Method and apparatus deposition process synchronization
US8853080B2 (en) 2012-09-09 2014-10-07 Novellus Systems, Inc. Method for depositing tungsten film with low roughness and low resistivity
US8729702B1 (en) 2012-11-20 2014-05-20 Stmicroelectronics, Inc. Copper seed layer for an interconnect structure having a doping concentration level gradient
US9153486B2 (en) 2013-04-12 2015-10-06 Lam Research Corporation CVD based metal/semiconductor OHMIC contact for high volume manufacturing applications
US9589808B2 (en) 2013-12-19 2017-03-07 Lam Research Corporation Method for depositing extremely low resistivity tungsten
US9748137B2 (en) 2014-08-21 2017-08-29 Lam Research Corporation Method for void-free cobalt gap fill
US9349637B2 (en) 2014-08-21 2016-05-24 Lam Research Corporation Method for void-free cobalt gap fill
US9997405B2 (en) 2014-09-30 2018-06-12 Lam Research Corporation Feature fill with nucleation inhibition
US9768060B2 (en) * 2014-10-29 2017-09-19 Applied Materials, Inc. Systems and methods for electrochemical deposition on a workpiece including removing contamination from seed layer surface prior to ECD
US9953984B2 (en) 2015-02-11 2018-04-24 Lam Research Corporation Tungsten for wordline applications
US10170320B2 (en) 2015-05-18 2019-01-01 Lam Research Corporation Feature fill with multi-stage nucleation inhibition
US9613818B2 (en) 2015-05-27 2017-04-04 Lam Research Corporation Deposition of low fluorine tungsten by sequential CVD process
US9978605B2 (en) 2015-05-27 2018-05-22 Lam Research Corporation Method of forming low resistivity fluorine free tungsten film without nucleation
US9754824B2 (en) 2015-05-27 2017-09-05 Lam Research Corporation Tungsten films having low fluorine content
US10276397B2 (en) * 2015-06-30 2019-04-30 Taiwan Semiconductor Manufacturing Co., Ltd. CVD metal seed layer
US9754891B2 (en) 2015-09-23 2017-09-05 International Business Machines Corporation Low-temperature diffusion doping of copper interconnects independent of seed layer composition
US9735051B2 (en) 2015-12-14 2017-08-15 International Business Machines Corporation Semiconductor device interconnect structures formed by metal reflow process
BR122022007763B1 (pt) 2016-02-05 2023-03-14 Board Of Regents Of The University Of Texas System Método para a preparação de um acionador de polímero eletroativo iônico de um dispositivo médico tubular
BR122022007761B1 (pt) 2016-02-05 2023-01-31 Board Of Regents Of The University Of Texas System Aparelho cirúrgico
US10573522B2 (en) 2016-08-16 2020-02-25 Lam Research Corporation Method for preventing line bending during metal fill process
US9716063B1 (en) 2016-08-17 2017-07-25 International Business Machines Corporation Cobalt top layer advanced metallization for interconnects
US9859215B1 (en) 2016-08-17 2018-01-02 International Business Machines Corporation Formation of advanced interconnects
US9852990B1 (en) 2016-08-17 2017-12-26 International Business Machines Corporation Cobalt first layer advanced metallization for interconnects
US10115670B2 (en) 2016-08-17 2018-10-30 International Business Machines Corporation Formation of advanced interconnects including set of metal conductor structures in patterned dielectric layer
US9941212B2 (en) 2016-08-17 2018-04-10 International Business Machines Corporation Nitridized ruthenium layer for formation of cobalt interconnects
US10211099B2 (en) 2016-12-19 2019-02-19 Lam Research Corporation Chamber conditioning for remote plasma process
WO2019036292A1 (en) 2017-08-14 2019-02-21 Lam Research Corporation METHOD FOR METAL CASTING FOR THREE-DIMENSIONAL NAND AND VERTICAL WORDS LINE
US11195748B2 (en) 2017-09-27 2021-12-07 Invensas Corporation Interconnect structures and methods for forming same
JP2021523292A (ja) 2018-05-03 2021-09-02 ラム リサーチ コーポレーションＬａｍ Ｒｅｓｅａｒｃｈ Ｃｏｒｐｏｒａｔｉｏｎ ３ｄ ｎａｎｄ構造内にタングステンおよび他の金属を堆積させる方法
US10937960B2 (en) * 2018-08-14 2021-03-02 Newport Fab, Llc Concurrent fabrication of and structure for capacitive terminals and ohmic terminals in a phase-change material (PCM) radio frequency (RF) switch
KR102828798B1 (ko) 2018-12-05 2025-07-02 램 리써치 코포레이션 보이드 프리 (void free) 저응력 (low stress) 충진
CN113424300B (zh) 2018-12-14 2025-05-09 朗姆研究公司 在3d nand结构上的原子层沉积
WO2020210260A1 (en) 2019-04-11 2020-10-15 Lam Research Corporation High step coverage tungsten deposition
WO2020236749A1 (en) 2019-05-22 2020-11-26 Lam Research Corporation Nucleation-free tungsten deposition
CN112103242B (zh) * 2019-06-18 2024-12-20 中芯国际集成电路制造(上海)有限公司 半导体结构及其形成方法
KR20220047333A (ko) 2019-08-12 2022-04-15 램 리써치 코포레이션 텅스텐 증착

Family Cites Families (103)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US121608A (en) * 1871-12-05 Improvement in animal-traps
US57527A (en) * 1866-08-28 Bronzing-machine
US147104A (en) * 1874-02-03 Improvement in machines for making cotton-laps
US110147A (en) * 1870-12-13 Improvement in side-saddle trees
US116427A (en) * 1871-06-27 Improvement in dentists and barbers chairs
US140196A (en) * 1873-06-24 Abbaham t
US129828A (en) * 1872-07-23 Improvement in lamps
US45485A (en) * 1864-12-20 Improved car-replacer
US157431A (en) * 1874-12-01 Improvement in bottle-stoppers
US188850A (en) * 1877-03-27 Improvement in clothes-pounders
US241321A (en) * 1881-05-10 Charles h
JPH02296324A (ja) * 1989-05-11 1990-12-06 Nec Corp 半導体装置の製造方法
JP2856782B2 (ja) 1989-10-12 1999-02-10 レール・リキード・ソシエテ・アノニム・プール・レテユード・エ・レクスプロワタシオン・デ・プロセデ・ジョルジュ・クロード 低温ｃｖｄによる銅薄膜の形成方法
US5173442A (en) 1990-07-23 1992-12-22 Microelectronics And Computer Technology Corporation Methods of forming channels and vias in insulating layers
US5219787A (en) 1990-07-23 1993-06-15 Microelectronics And Computer Technology Corporation Trenching techniques for forming channels, vias and components in substrates
US5151168A (en) * 1990-09-24 1992-09-29 Micron Technology, Inc. Process for metallizing integrated circuits with electrolytically-deposited copper
US5612254A (en) 1992-06-29 1997-03-18 Intel Corporation Methods of forming an interconnect on a semiconductor substrate
US5403620A (en) 1992-10-13 1995-04-04 Regents Of The University Of California Catalysis in organometallic CVD of thin metal films
US5354712A (en) 1992-11-12 1994-10-11 Northern Telecom Limited Method for forming interconnect structures for integrated circuits
JPH06349952A (ja) * 1993-06-14 1994-12-22 Oki Electric Ind Co Ltd 配線形成方法
JP2616402B2 (ja) * 1993-10-18 1997-06-04 日本電気株式会社 半導体装置の製造方法
US5549808A (en) * 1995-05-12 1996-08-27 International Business Machines Corporation Method for forming capped copper electrical interconnects
JP3979687B2 (ja) 1995-10-26 2007-09-19 アプライド マテリアルズ インコーポレイテッド ハロゲンをドープした酸化珪素膜の膜安定性を改良する方法
JPH11510219A (ja) * 1995-12-19 1999-09-07 エフエスアイ インターナショナル インコーポレイテッド スプレー・プロセッサを用いる金属膜の無電解めっき
US6188136B1 (en) * 1996-06-26 2001-02-13 Kabushiki Kaisha Toshiba Semiconductor device including a wiring layer having a non-doped or high resistivity polycrystal silicon portion
US5693563A (en) 1996-07-15 1997-12-02 Chartered Semiconductor Manufacturing Pte Ltd. Etch stop for copper damascene process
US6110828A (en) * 1996-12-30 2000-08-29 Applied Materials, Inc. In-situ capped aluminum plug (CAP) process using selective CVD AL for integrated plug/interconnect metallization
US5913147A (en) 1997-01-21 1999-06-15 Advanced Micro Devices, Inc. Method for fabricating copper-aluminum metallization
US6139697A (en) * 1997-01-31 2000-10-31 Applied Materials, Inc. Low temperature integrated via and trench fill process and apparatus
US5908813A (en) * 1997-02-14 1999-06-01 Micron Technology, Inc. Method making integrated circuit metallization with superconductor BEOL wiring
US6139905A (en) * 1997-04-11 2000-10-31 Applied Materials, Inc. Integrated CVD/PVD Al planarization using ultra-thin nucleation layers
US6387805B2 (en) * 1997-05-08 2002-05-14 Applied Materials, Inc. Copper alloy seed layer for copper metallization
US6605197B1 (en) * 1997-05-13 2003-08-12 Applied Materials, Inc. Method of sputtering copper to fill trenches and vias
US5969422A (en) * 1997-05-15 1999-10-19 Advanced Micro Devices, Inc. Plated copper interconnect structure
US5897752A (en) * 1997-05-20 1999-04-27 Applied Materials, Inc. Wafer bias ring in a sustained self-sputtering reactor
US6069068A (en) * 1997-05-30 2000-05-30 International Business Machines Corporation Sub-quarter-micron copper interconnections with improved electromigration resistance and reduced defect sensitivity
US5913145A (en) * 1997-08-28 1999-06-15 Texas Instruments Incorporated Method for fabricating thermally stable contacts with a diffusion barrier formed at high temperatures
US6042700A (en) * 1997-09-15 2000-03-28 Applied Materials, Inc. Adjustment of deposition uniformity in an inductively coupled plasma source
US5882498A (en) * 1997-10-16 1999-03-16 Advanced Micro Devices, Inc. Method for reducing oxidation of electroplating chamber contacts and improving uniform electroplating of a substrate
US5897368A (en) * 1997-11-10 1999-04-27 General Electric Company Method of fabricating metallized vias with steep walls
KR100273989B1 (ko) * 1997-11-25 2001-01-15 윤종용 반도체장치의콘택형성방법
JP4947834B2 (ja) * 1997-11-26 2012-06-06 アプライド マテリアルズ インコーポレイテッド ダメージフリー被覆刻設堆積法
US6174811B1 (en) * 1998-12-02 2001-01-16 Applied Materials, Inc. Integrated deposition process for copper metallization
US6251528B1 (en) * 1998-01-09 2001-06-26 International Business Machines Corporation Method to plate C4 to copper stud
US6169030B1 (en) * 1998-01-14 2001-01-02 Applied Materials, Inc. Metallization process and method
JP3501937B2 (ja) * 1998-01-30 2004-03-02 富士通株式会社 半導体装置の製造方法
US6249055B1 (en) * 1998-02-03 2001-06-19 Advanced Micro Devices, Inc. Self-encapsulated copper metallization
US6281121B1 (en) * 1998-03-06 2001-08-28 Advanced Micro Devices, Inc. Damascene metal interconnects using highly directional deposition of barrier and/or seed layers including (III) filling metal
JPH11256318A (ja) * 1998-03-10 1999-09-21 Sony Corp 導電性薄膜及びその形成方法、並びに、半導体装置及びその製造方法
US6197181B1 (en) 1998-03-20 2001-03-06 Semitool, Inc. Apparatus and method for electrolytically depositing a metal on a microelectronic workpiece
US6130156A (en) 1998-04-01 2000-10-10 Texas Instruments Incorporated Variable doping of metal plugs for enhanced reliability
US6181012B1 (en) * 1998-04-27 2001-01-30 International Business Machines Corporation Copper interconnection structure incorporating a metal seed layer
US6015749A (en) * 1998-05-04 2000-01-18 Taiwan Semiconductor Manufacturing Company Method to improve adhesion between copper and titanium nitride, for copper interconnect structures, via the use of an ion implantation procedure
US6372633B1 (en) 1998-07-08 2002-04-16 Applied Materials, Inc. Method and apparatus for forming metal interconnects
US6461675B2 (en) * 1998-07-10 2002-10-08 Cvc Products, Inc. Method for forming a copper film on a substrate
JP3187011B2 (ja) * 1998-08-31 2001-07-11 日本電気株式会社 半導体装置の製造方法
US6080285A (en) 1998-09-14 2000-06-27 Applied Materials, Inc. Multiple step ionized metal plasma deposition process for conformal step coverage
US6251759B1 (en) * 1998-10-03 2001-06-26 Applied Materials, Inc. Method and apparatus for depositing material upon a semiconductor wafer using a transition chamber of a multiple chamber semiconductor wafer processing system
US6515343B1 (en) * 1998-11-19 2003-02-04 Quicklogic Corporation Metal-to-metal antifuse with non-conductive diffusion barrier
US6187670B1 (en) * 1998-12-02 2001-02-13 Advanced Micro Devices, Inc. Multi-stage method for forming optimized semiconductor seed layers
US6242349B1 (en) * 1998-12-09 2001-06-05 Advanced Micro Devices, Inc. Method of forming copper/copper alloy interconnection with reduced electromigration
US6261946B1 (en) 1999-01-05 2001-07-17 Advanced Micro Devices, Inc. Method for forming semiconductor seed layers by high bias deposition
US6258707B1 (en) * 1999-01-07 2001-07-10 International Business Machines Corporation Triple damascence tungsten-copper interconnect structure
EP1149416A1 (en) * 1999-01-08 2001-10-31 Applied Materials, Inc. Method of depositing a copper seed layer which promotes improved feature surface coverage
US6290825B1 (en) 1999-02-12 2001-09-18 Applied Materials, Inc. High-density plasma source for ionized metal deposition
US6440289B1 (en) * 1999-04-02 2002-08-27 Advanced Micro Devices, Inc. Method for improving seed layer electroplating for semiconductor
US6037258A (en) * 1999-05-07 2000-03-14 Taiwan Semiconductor Manufacturing Company Method of forming a smooth copper seed layer for a copper damascene structure
US6146517A (en) 1999-05-19 2000-11-14 Infineon Technologies North America Corp. Integrated circuits with copper metallization for interconnections
US6147404A (en) * 1999-05-24 2000-11-14 Advanced Micro Devices, Inc. Dual barrier and conductor deposition in a dual damascene process for semiconductors
US6258223B1 (en) * 1999-07-09 2001-07-10 Applied Materials, Inc. In-situ electroless copper seed layer enhancement in an electroplating system
US6627542B1 (en) * 1999-07-12 2003-09-30 Applied Materials, Inc. Continuous, non-agglomerated adhesion of a seed layer to a barrier layer
US6686280B1 (en) * 1999-07-22 2004-02-03 Taiwan Semiconductor Manufacturing Company Sidewall coverage for copper damascene filling
US6410418B1 (en) * 1999-08-18 2002-06-25 Advanced Micro Devices, Inc. Recess metallization via selective insulator formation on nucleation/seed layer
US6433429B1 (en) * 1999-09-01 2002-08-13 International Business Machines Corporation Copper conductive line with redundant liner and method of making
US6184138B1 (en) * 1999-09-07 2001-02-06 Chartered Semiconductor Manufacturing Ltd. Method to create a controllable and reproducible dual copper damascene structure
US6136707A (en) * 1999-10-02 2000-10-24 Cohen; Uri Seed layers for interconnects and methods for fabricating such seed layers
US6610151B1 (en) * 1999-10-02 2003-08-26 Uri Cohen Seed layers for interconnects and methods and apparatus for their fabrication
US6924226B2 (en) * 1999-10-02 2005-08-02 Uri Cohen Methods for making multiple seed layers for metallic interconnects
US6395164B1 (en) * 1999-10-07 2002-05-28 International Business Machines Corporation Copper seed layer repair technique using electroless touch-up
US6398929B1 (en) * 1999-10-08 2002-06-04 Applied Materials, Inc. Plasma reactor and shields generating self-ionized plasma for sputtering
US20030116427A1 (en) 2001-08-30 2003-06-26 Applied Materials, Inc. Self-ionized and inductively-coupled plasma for sputtering and resputtering
US6458251B1 (en) * 1999-11-16 2002-10-01 Applied Materials, Inc. Pressure modulation method to obtain improved step coverage of seed layer
US6387800B1 (en) * 1999-12-20 2002-05-14 Taiwan Semiconductor Manufacturing Company Method of forming barrier and seed layers for electrochemical deposition of copper
US6395642B1 (en) * 1999-12-28 2002-05-28 Taiwan Semiconductor Manufacturing Company Method to improve copper process integration
US6403465B1 (en) * 1999-12-28 2002-06-11 Taiwan Semiconductor Manufacturing Company Method to improve copper barrier properties
US6277249B1 (en) 2000-01-21 2001-08-21 Applied Materials Inc. Integrated process for copper via filling using a magnetron and target producing highly energetic ions
US6251242B1 (en) 2000-01-21 2001-06-26 Applied Materials, Inc. Magnetron and target producing an extended plasma region in a sputter reactor
US6225221B1 (en) * 2000-02-10 2001-05-01 Chartered Semiconductor Manufacturing Ltd. Method to deposit a copper seed layer for dual damascene interconnects
US6228759B1 (en) 2000-05-02 2001-05-08 Advanced Micro Devices, Inc. Method of forming an alloy precipitate to surround interconnect to minimize electromigration
US6368954B1 (en) * 2000-07-28 2002-04-09 Advanced Micro Devices, Inc. Method of copper interconnect formation using atomic layer copper deposition
US6506668B1 (en) * 2001-06-22 2003-01-14 Advanced Micro Devices, Inc. Utilization of annealing enhanced or repaired seed layer to improve copper interconnect reliability
US6936906B2 (en) * 2001-09-26 2005-08-30 Applied Materials, Inc. Integration of barrier layer and seed layer
US6515368B1 (en) * 2001-12-07 2003-02-04 Advanced Micro Devices, Inc. Semiconductor device with copper-filled via includes a copper-zinc/alloy film for reduced electromigration of copper
US7910165B2 (en) * 2002-06-04 2011-03-22 Applied Materials, Inc. Ruthenium layer formation for copper film deposition
US20040140196A1 (en) * 2003-01-17 2004-07-22 Applied Materials, Inc. Shaping features in sputter deposition
US6806192B2 (en) * 2003-01-24 2004-10-19 Taiwan Semiconductor Manufacturing Company, Ltd. Method of barrier-less integration with copper alloy
US6943111B2 (en) * 2003-02-10 2005-09-13 Taiwan Semiconductor Manufacturing Company, Ltd. Barrier free copper interconnect by multi-layer copper seed
US7101790B2 (en) * 2003-03-28 2006-09-05 Taiwan Semiconductor Manufacturing Co., Ltd. Method of forming a robust copper interconnect by dilute metal doping
US20050045485A1 (en) * 2003-09-03 2005-03-03 Taiwan Semiconductor Manufacturing Co. Ltd. Method to improve copper electrochemical deposition
US7265038B2 (en) * 2003-11-25 2007-09-04 Taiwan Semiconductor Manufacturing Co., Ltd. Method for forming a multi-layer seed layer for improved Cu ECP
US7390329B2 (en) * 2004-05-07 2008-06-24 Usgi Medical, Inc. Methods for grasping and cinching tissue anchors
US8828054B2 (en) * 2008-04-02 2014-09-09 Liavatec Corporation Method and apparatus for meniscal repair
US9929006B2 (en) 2016-07-20 2018-03-27 Micron Technology, Inc. Silicon chalcogenate precursors, methods of forming the silicon chalcogenate precursors, and related methods of forming silicon nitride and semiconductor structures

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US7282445B2 (en) 2007-10-16
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TW504795B (en) 2002-10-01
WO2001026145A9 (en) 2002-08-15
US20050148172A1 (en) 2005-07-07
US20070117379A1 (en) 2007-05-24
US20040087171A1 (en) 2004-05-06
US20090233440A1 (en) 2009-09-17
US6903016B2 (en) 2005-06-07
US6518668B2 (en) 2003-02-11
US7199052B2 (en) 2007-04-03
US20090239372A1 (en) 2009-09-24
US20010005056A1 (en) 2001-06-28
US7550386B2 (en) 2009-06-23
US20080026569A1 (en) 2008-01-31
US9673090B2 (en) 2017-06-06

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