TW393678B - Use of deuterated materials in semiconduction processing - Google Patents

Use of deuterated materials in semiconduction processing Download PDF

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Publication number
TW393678B
TW393678B TW087109789A TW87109789A TW393678B TW 393678 B TW393678 B TW 393678B TW 087109789 A TW087109789 A TW 087109789A TW 87109789 A TW87109789 A TW 87109789A TW 393678 B TW393678 B TW 393678B
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Taiwan
Prior art keywords
deuterium
gate
silicon
hydrogen
deuterated
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TW087109789A
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English (en)
Inventor
William F Clark
Thomas G Ference
Terence B Hook
Dale W Martin
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Ibm
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Publication of TW393678B publication Critical patent/TW393678B/zh

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    • H01L21/28211Making the insulator on single crystalline silicon, e.g. using a liquid, i.e. chemical oxidation in a gaseous ambient using an oxygen or a water vapour, e.g. RTO, possibly through a layer
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  • Chemical Vapour Deposition (AREA)

Description

A7 A7 經濟部中央標準局舅工消費合作社印装 五、發明説明(1 ) 發明背景 發明範圍 本發明一般而言係關於半導體裝置製造之領域,且更特 定言之,係關於在半導體裝置製程中使用氘化材料。 相關技藝之描述 電子裝置,譬如使用於VSLI積體電路中之金屬氧化物半 導體(MOS)電晶體,係歷經許多磨耗機制,這會限制其口 被小型化(按比例縮小)之程度。此等機制之—係爲所謂Ζ (高能)電子作用。 ’' 例如,在熱氧化矽中,譬如在矽基材上形成之閘極氧化 物,在矽基材中因裝置作用而產生之電子(或空穴)能夠自 矽逃逸,且變成被注入及被捕獲在鄰接氧化矽中。依金氧 半場效電晶體(MOSFET)裝置之源極與汲極擴散之使用條件 與結構細節而定,將有較大或較低能量之較多或較少電子 在矽基材中產生,並被注入閘極氧化物中。 在VSLI裝置設計上之趨勢,已朝向増加之電場(垂直與水 平),其會使熱電子作用惡化。特別是,熱電子作用會造 成低限電壓上之緩慢長期改變,以及降低m〇sfet装置之跨 導。熱電子作用亦可導致在雙極電晶體之低程度電流增益 上衰退之已知現象,其發射體·基體接面已受到雪崩似地 崩溃。 關於熱電子如何對矽/氧化矽界面造成傷害之所接受理 論,係爲熱電子會刺激氫自矽/氧化矽界面之解吸附作用 ,其方式是使存在於矽表面上之—部份&_11键結斷裂,導 -4- 冬紙張尺度適用中國國家標準(CNS >八4规格(21〇χ297公嫠 (請先閲讀背面之注意事項异填寫本頁) 裝· 、*! 五、發明説明( 2 A7 B7 經濟部中央標準局員工消費合作社印製 致增加界面捕獲密度,及裝置性能上之減退。氫係在被引 進裝置中之後’存在於界面處,此係由於半導體製程之、名士 果所致,譬如在低溫下於氫環境中進行之晶圓之金屬鍍敷 後回火,其係經由使矽/氧化矽界面處之晶體缺陷鈍化以 改良裝置功能。"鈍化"一詞係意謂氫滿足矽/氧化矽界面 處之懸垂鍵結。但是,在此種回火程序期間,於硬/氧化 矽界面處形成之Si-H鈍化鍵結,係容易因熱電子激發而解 離。 最近已發現’熱電子作用可經由以氘取代使用於硬/ 二氧化碎界面處界面阱鈍化上之氫而被減輕(J w Lydi畔等 人,Appl. Phys. Lett. 68 (18),1996 年 4 月 29 曰,第 2526-2528 頁,·及 I. C. Kizilyalli 等人,IEEE Electron Device Letters,第 18 卷,第 3 期,1997 年3月,第81-83頁)。元素氫有三種已知同位素:一般氫或 良’ in ’重氫或氘’ ;及氚’。Lyding等人與Kizilyalli 等人陳述氘同位素在金屬後回火程序期間,會聚集在矽/ 二氧化矽界面處,譬如在氘化成形氣體(D2/N2)中,於400°C 溫度下所進行者。已發現於矽/二氧化矽界面處形成之矽 -氘(Si-D)鍵結,對於從熱電子激發應力解離,係比si_H键 結更具抵抗性。 但是’本發明之研究人員已測出被摻入矽/二氧化矽界 面處,以供回火程序鈍化用之氘,有漂移離開界面之傾向 ,此係由於在半導體裝置進一步加工處理中所招致之後續 熱循環之結果所造成,即使其中僅涉及相對較適度溫度亦 然,譬如約4〇〇。(:。特定言之,本發明之研究人員已以二次 -5 本紙張从適用中國國家標準(CNS ) A4鄕· ( 210X297公釐 (請先閲讀背面之注意事項再填寫本頁)
經濟部中央椟準局員工消費合作社印聚 Α7 Β7 五、發明説明(3 ) 離子質譜(SIMS)數據,確認在矽/二氧化矽界面處所掺入 之氘,在後續製程期間可以且確實會潛移離開界面,該後 續製程之種類係有效地使晶圓,,回火"作爲意欲之目的,或 作爲不同製程之附帶作用,譬如薄膜沈積。因此,任何藉 由先前技藝之氘回火所賦予之可能的性能增強,以本發明 研允人員已測定者爲基礎,在本性上是不穩定的。對本申 請案之目的而言,”回火"一詞及其變異方式,係意謂使半 導體晶片接受至少一次熱循環,其中係將其加熱及接著冷 卻。 因此,在先前技藝中,關於涉及含氫反應物及易於造成 矽/二氧化矽界面瓦解之環境之半導體製程之問題仍然未 解決。 發明摘述 本發明之一項目的,係爲提供獨特處理方式,以引進氘 至半導體裝置之發/二氧化硬界面中。 本發明之另一項目的,係爲提供—種技術,以保護及保 存氮化材料-旦在半導體裝置中形成時之說化狀態,以使 得孩氘化材料能夠更良好地容忍與存活於該裝置之任何後 績熱循環。 本發明之一項特殊目的,係爲提供—種技術,以保護及 保存藉由金屬後回火程序所賦予之先前經氣化之矽/1氧 化碎界西之氣化狀態,以使得該氣化材料能夠忍 後續熱循環。 本發明之又另-項目的,係爲取代在其他情況下备被引 CNS ) Α4^( ιιοΤ^τΤ) (請先閲讀背面之注意事項再填寫本頁}
4 發明説明( 進位於接近FET裝置中之閘極氧化物之各種 (氫含量,以避免氫若在其他_ 特徵内 種其他裝置元件潛移至妙/二氧冑機會從此 能會加重來自熱電子作用之傷害。 、處其可 本發明之前述及其他目的,係藉本發明達成。 ::發明之一項具體實施例中,使用於半導體製造上之 :反應物之氳含量,係被氣取代,以在形成薄膜期間 ,在原位產生氘化薄膜材料。在+ a 在項實施中,閘極氧化物 =熱解濕式氧化之獨特技術,使用“基礎之化學物種 :成。再者,半導體裝置之其他薄膜元件,除了開極氧化 物以外’譬如_、閘極側壁隔體及氮化物障壁薄膜等, 其在其他情況下係以氫爲基礎之反應物形成,其亦以氣取 代氫。因&,沒有氫來源可用以取代気,以使矽/二氧化 :界面純化,且萬一純化氣在後續製程期間以熱方式脱離 時,使得在此裝置…,氣之大儲槽可用以按需要供應 乱至矽/二氧化矽界面。 於本發明疋另一項具體實施例中,係提供半導體裝置之 經改良金屬後回火程序,其中I回火對於碎/二氧化梦界 面之有利作用,係有效地"被密封"且被保護而免於進一步 ,理。在此項具體實施例中,係首先施行說回火,以在藉 白用製程所製成之電晶體裝置之矽/二氧化矽界面處摻入 氘,達到該點,然後藉由在該裝置上形成高氘濃度儲槽層 ,使孩裝置密封。在另一選用步驟中,擴散障壁薄膜,譬 如喷射4氣沈積之氮化物或以氮與矽烷製成之低氫氮化物 -7- 本紙張從it财目目家辟(⑽)A4規格( ϋ〇Χ297公菱— (請先閲讀背面之注意事項再填寫本頁) 裝· -訂' 經濟部中夬榡準局員工消費合作杜印製 B7 五、發明説明(5 ) ,係在高氘濃度儲槽層上形成。 障壁層,有助於密封氛之有:作:有=密度之氣氮化衫 熱回火與處理,以在半導體裝、允許進一步在氫今 行,而不會以氮交換氣置…端邮叫製程" 在本發明之另一項精製中 理,意即在於或低於峨下之處% =後’採用低溫虡 .^Λ 卜又處理,以幫助保持氘在矽/ 依此以心熱干擾’係降低氫置換责 二半導體裝置之整體製程環境更強健,其方式 化來源,作爲使用於製程中之材料, t回火”,以確保較少氣自經回火之裝置損失,以及確 保在溥膜中之任何氫儲槽替代地以氮群集。 經濟部中央樣準局員工消費合作社印製 雖然涉及含氫反應物與環境之習用半導體製程,會有造 氧切界面瓦解之傾向,但本發㈣代地使此種 界面安…意即,根據本發明所製成之氣化裝置薄膜, 在梦/-乳切界面處,對於來自熱電子作用之降解更具 抵抗性。這提供高裝置性能之經改良料性,歷經半導體 裝置d用年限,且其使得半㈣裝置能夠以較高電流達 到較高速度,而不會經歷熱電子作用傷害問題。意即,較 多電流可被推送經過含有根據本發明E化薄膜之裝置,或 ^ ’以相同電流維持較切/二氧㈣界面傷害。而且, 藉由降低熱電子作用所需要之保護帶或邊際俊,則製造成 本可由於較高速揀選而顯著地降低。 附圖簡述 -8 - 本紙張 财關轉準(CNS) A4%jfe (·21()χ297 五、發明説明(6) A7 B7 鲤濟部中央榡準局員工消費合作社印製 前述及其他目的、方面與優點,從下文本發明較佳具體 實施例之詳述,並參考附圖,將更爲明瞭,其中: 圖1係以橫截面圖説明根據本發明具有各種氘化薄膜摻 入其中之MOSFET裝置。 圖2係以橫截面圖説明根據本發明之另一項具體實施例 之具有各種氘化薄膜摻入其中之M〇SFET裝置。 圖3係以橫截面圖説明根據本發明之又另一項具體實施 例之具有各種氘化薄膜掺入其中之M〇SFET裝置。 I發明較佳具體實施例之詳诚 在本發明之第一個具體實施例中,於半導體裝置之製造 上,最初係形成薄膜,其帶有大量氘。兩種作用伴随著·· 沒有反應性氫之來源以取代已經使界面鈍化之氘;並使大 儲槽之氘在鈍化之情況中可用以供應氘至矽/二氧化矽界 面,在後續製程期間氘變成以熱方式脱離。而且,在半導 體裝置中,用以形成許多薄膜之製程溫度,係足夠高(意 即,>400°C)以使矽/二氧化矽界面去鈍化,並產生氘/氫 交換機制。因此,在製程環境中,於材料沈積之最初部份 期間使用D2,係於加熱達到製程溫度時使已失去氘之狀態 純化。 更明確言之,在本發明之第一個具體實施例中,於半導 體製造上作爲成膜反應物與物種使用之含氫材料,其合影 嚮氫含量與製程背景’其係經改質以在薄膜形成期二 地使用其氘化類似物。此材科之種類包括例如氧化氘⑴ 使用於濕式氧化系統中,或氘化矽烷(SiD4)、二 燒 ---------*->裝— (請先閲讀背面之注意事項再填寫本頁) -訂 ^ .---^---^---- I I - I · _____9_ 本紙張尺度適用中國國家標準(CNS) A4規格( 210X297公董) A7 B7 經濟部中央梯準局員工消費合作社印製 五、發明説明(7 (SiCl^2)及氨(ND3),藉化學蒸氣沈積(CVD)方法用以提供薄 膜。此等氘化材料係使用於—或多種組件之沈積,譬如閘 極氧化物、多晶矽閘極、側壁隔體' 障壁氮化物及甚至是 氧化物鈍化薄膜等等。此項具體實施例之成拱形原理,係 爲薄膜製程之確認,其係提供含氫環境,其係使晶圓,,回 火"作爲沈積之副產物,或其係提供氫儲槽,其可在後續 製程期間被驅動進入閘極氧化物申。可應用之製程亦被定 義爲氘化之鈍化氮化物形成之前發生者,其會阻斷從任何 隨後形成薄膜之氫擴散至閘極氧化物中,惟氧化物純化薄 膜之製程亦可被本發明所涵蓋,其中障壁氮化物層未被氘 化。經濟考量或供料考量可能會限制可根據本發明氘化之 此等裝置層之數目,意即氘與氘化合物目前是很筇貴的, 及/或可取用性受到限制。理想上,在其他情況下將與氫 一起形成或於氫存在下形成之許多此等層,係替代地被氘 化以加強整體作用,惟著重於使閘極氧化物及矽氮化物障 壁層氘化,於此時係被認爲是最重要的,以緩和熱電子作 用及抑制氘與氫之潛移離開其在裝置中之最初掺入位置。
參考示於圖1中之MOSFET裝置1〇〇,其具有矽基材u與源 極/汲極區域12與13,可藉此具體實施例選址之薄膜,包 括閘極乳化物14、閘極多晶碎15、側壁隔體16、障壁氮化 矽層18及已沈積之氧化物鈍化層19 (例如si〇2、pSG ' BSG 、:BPSG)。自動對準之矽化物層17可在形成障壁氣化碎18 之前,於閘極15與源極/汲極區域Π/13上,藉習用方法提 供。矽基材,較佳爲單晶矽材料,可爲p_型或n_型,具有 -10- 私紙張尺度適用中國國家標準(CNS ) A4^格(210X297公釐) (請先閎讀背面之注意事項再填寫本頁) 、1T. 經濟部中央標準局舅工消費合作社印製 五、發明説明(8 按適當情況提供之井植入物,以提供最後所要PET操作型 式°任何習用種類之單離製程與井植入物,係用於此裝置 ,但爲了清楚起見,此等方面並未描繪於圖丨_3中,因其並 非特別地構成本發明之一部份。 本發明之一項重要目的,係爲若未防止即爲顯著地制止 在石夕/二氧化矽界面2〇處因熱電子作用所致之傷害。 使用氫化反應物之習用矽氧化系統,通常可用於本發明 ’以形成二氧化矽(矽石)薄膜,其係摻入氘,例如用以在 半導體基材上產生閘極氧化物14。使用水之濕式氧化方法 與使用碎虎之CVD系統,可根據本發明配合調整,以在矽 上供鼠化一·乳化政薄膜。 使用濕式氧化方法,以在半導體基材上產生閘極氧化物 14 ’係作爲本發明第一個具體實施例之一項特定應用。水 、HC1及TCA爲在使用於習用濕式氧化方法中,特別用以形 成熱氧化物之氣體。於本發明中,D2、DC1及氘化TCA係在 濕式氧化製程期間,用以取代在其他情況下使用之個別氫 類似物。 在一較佳具體實施例中,熱解水系統係用於濕式氧化程 序’以形成閘極氧化物。關於此點,氧與氘,代替其他習 用共反應物,意即氫,係被直接餵至擴散管件例如石英或 純矽之中,其中晶圓係被保持在700至1〇〇〇τ之溫度下,其 中係使氣體反應以形成氧化氘(D2〇)之蒸氣,意即重水蒸氣 ,其係爲氧化程序用之水來源。例如,約6 sLm (每分鐘標 準升)之〇2流率,與約3.6 sLm之流率,可歷經一段足夠時 -11 - 本紙張尺度適用中國國家標準(CNS ) A4規格(210X297公釐) (請先聞讀背面之注·意事項再填寫本頁) 裝- A7 B7 經濟部中央樣準局員工消費合作社印製 五、發明説明(9) 間,與〇_9〇/0 DC1當量一起用以形成約3〇A至約2〇〇入之氧化物 薄膜厚度。 於濕氧化程序期間,在閘極氧化物薄膜於矽上之生長期 間,當薄膜在矽基材上形成時,氘會聚集在閘極氧化物中 。氘在閘極氧化物形成期間之此種原位摻入,係提供強健 一氧化矽與矽/二氧化矽界面,其對熱電子作用更具抵抗 性〇 爲防止在閘極氧化物或其他半導體層中來自熱電子作用 t過早裝置失效所必須之氘摻入量,可由熟諳此藝者以經 驗万式測定。意即,雖然,理想上最佳係對半導體裝置製 造期間所採用之每一種氫化反應物種及/或系統氣層氣體 使用氘化類似物,但經濟與供料可取用性之限制,可能會 妨礙此種情事成爲不可行。因此,氘與氫反應物及氣體之 摻合物亦意欲涵蓋在内,只要小心使用足量氘化反應物以 達成本文中所述之本發明目的即可。亦且,不僅閘極氧化 物,而且在MOSFET裝置中發現之側壁隔體薄膜、多晶矽閘 極、障壁氮化矽障壁(若存在時)及氧化物鈍化薄膜,其在 其他情況下亦可含有可觀分率之氫,其可在線後端(be〇l) 回火期間被釋出進入其下方之氧化物中,譬如在55〇_6〇〇。匸 下進行I接點或内襯回火。因此,可有利地使用氘類似物 ,替代其使用於薄膜形成上之習用含氫反應物及/或稀釋 劑以形成之其他薄膜,係説明於下文。 例如,閘極多晶矽15可以氘化狀態藉CVD方法形成,其 中習用氫反應物係被其氘類似物取代。藉LpcVD經由SiH4 (請先閲讀背面之注意事項再填寫本頁) 裝. 訂- -12 經濟部中央標準局員工消費合作社印製 A7 B7五、發明説明(10 ) 分解之多晶矽薄膜之生長,爲了安全之理由,其係視情況 有時以h2稀釋,其係爲此領域中已知的。但是,於本發明 中,閘極多晶矽15可藉LPCVD形成,其中SiD4係用以取代 矽烷(SiH4),且D2用以取代任何H2稀釋劑載氣,用於形成 多晶矽。多晶矽閘極使用此種CVD製程之生長,可在系統 溫度約550至650°C下,於系統壓力150毫托下,使用350標 準立方公分(seem) SiD4與50 seem D2之來源氣體進行,其中此 生長係提供薄膜厚度約1000至4000 A。 閘極15用之側壁熱氧化物16,可經由以DC1取代HC1或說 化TCA取代習用TCA而形成。例如,側壁熱氧化物之生長 ,可藉CVD,使用650-900°C之系統溫度,15 sLm之02流率, 氘化TCA,在來源溫度20-30°C下,於N2載氣中,在0.1至 1.2 seem流率下達成,以提供薄膜厚度約60至3000A,依裝 置設計而定。或者,矽烷(SiH4)之習用氧化作用,於氧化 劑譬如02或N20存在下,在APCVD與LPCVD系統中,可經 修改以替代地使用SiD4取代矽烷,以生長氘化側壁矽石薄 膜。氘化側壁矽石亦可藉PECVD,經由SiD4/02、SiD4/C02及 SiD4/N20混合物之反應而生長。氧化物隔體16亦可藉由氘 化TEOS之分解,藉CVD或電漿加強CVD而形成。 氘化侧壁氮化矽隔體16可藉CVD,以M)3取代氨,及以 呂104取代矽烷,在CVD程序中形成。氮化矽,在其化學計 量形式中,具有由Si3N4所予之組成,惟在此領域中據瞭解 ,在已沈積之氮化矽薄膜中經常遭遇到相當大地偏離化學 計量,以致其因此有時僅被稱爲”SiN"薄膜。 __ _ 13_ 本紙張尺度適用中國國家標準(CNS ) A4規格(210X297公釐) (請先閱讀背面之注意事項再填寫本頁)
、1T A7 A7 經濟部中央標隼局員工消費合作杜印製 _______B7_____ 五、發明説明(11 ) 源極/汲極區域12/13係藉習用離子植入方法形成。根據 習用技術,氧化物(或氮化物)隔體層16,如就在上文所述 之步驟中所形成者,係在源極與汲極區域12/13位置,以各 向異性方式移除,留下氧化物(或氮化物)侧壁16在多晶矽 閘極15上。然後,藉習用技術,使自動對準矽化物層17在 多晶矽閘極15與源極/汲極區域12/13上形成。金屬係在原 位表面清理後沈積,且矽化物係藉回火形成,譬如藉快速 熱回火(RTA)。在RTA期間,任何所使用之氫,較佳係被氘 取代。於回火後,藉選擇性蝕刻移除未反應之金屬,以在 閘極源極/汲極區域12/13處及在閘極15上,留下自動對準 之矽化物17。自動對準矽化物17之類型未必受到限制,且 其可爲習用矽化物材料,譬如PtSi、Pd2 Si、CoSi2等等。熟 諳此藝者係十分熟悉此種用以在場效電晶體中形成自動對 準矽化物之步驟,因此關於使吾人對其瞭解之進_步細節 或説明,應該是沒有必要的。 在此第一個具體實施例中,障壁氮化矽層18可視情況經 氘化。例如,障壁氮化物層28可藉CVD以ND3取代氨及siD4 取代矽烷而形成。此氘化障壁氮化物會阻斷氫從覆蓋層之 隨後擴散至裝置10中。障壁氮化物層18之生長,可在系統 溫度約35〇至5〇〇τ下’使用ND3流率爲Usccm,SiI>4流率爲 60 seem及$流率爲4000 seem,在系統壓力爲5托下進行,以 提供範圍從約700至約1000A之薄膜厚度。 接者在裝置上形成乳化物純化薄膜19。氧化物純化薄膜 19可爲經摻雜或未經摻雜之氧化矽。例如,氧化物鈍化薄 —--------14 -____ 本紙張尺度適用中國國家梯準(CNS ) A4規格(2!Gx297公澧) ' ---------- C请先聞讀背面之注意事項再填寫本貢) 袈·
、1T 經濟部中央標準局員工消費合作社印製 A7 ---—_____B7 五、發明説明(12 ) 膜19可藉由氣化麵之分解,以形成沉化二氧化碎。或者 ,氧化物鈍化薄膜19,可藉由氘化之分解,於磷化氫 、二硼烷或砷化氫摻雜劑(意即p、B或As_氫化物)存在下 ,以形成例如乱化之PSG、BPS(^AsSG。氮化氧化物鈍化 層=之提供,特別可用於未具有障壁氮化矽層之技術。 氧化物鈍化層19係在多晶矽閘極15與標準頂部金屬鍍敷 層(未示出)之間形成絕緣體層。氧化矽純化薄膜19之生長 ,可在系統溫度約300至約50〇τ下,使用56〇sccmi氦流率 ,經過氘化TE0S之安瓿進行,且花⑽蒸氣係與8〇〇sccm〇2 流率合併,在系統壓力5至20托下,以提供約j微米之薄膜 厚度。 氧化物鈍化薄膜19亦可藉由在上述用以形成氧化物鈍化 薄膜19之相同基本反應系統中,加入鱗化氫、二棚燒或坤 化虱作爲摻雜劑’而被沈積爲氘化.PSg、bpsg或AsSG。氧 化物純化薄膜19之經摻雜變種’在需要優越再流動性質之 情況中,可能是所期望的。雖然不需要,但磷化氫、二硼 垸或神化氫掺雜劑本身可被氘化(意即在分子中之氮原子 被氘取代),以進一步精製其結果。 氧化物鈍化薄膜19亦可藉由SiD4與PH3 (磷化氫)使用〇2之 共氧化而形成。氘化BPSG薄膜亦可藉CVD方法,使用SiD4 ,ΒΑ或BA6,及PH3或PD3,利用02與N20,在氮載氣中 之共氧化而生長。 於本發明中使用之製程,係避免產生大量氫,其在其他 情況下若使用未經氘化之反應物時係存在於環境中,此氫 -15- 本紙張尺度適用中國國家標準(CNS ) A4規格(2丨0X297公釐) (請先閲讀背面之注意事項再填寫本頁} 裝. 訂 經濟部中央標準局員工消費合作社印繁 A7 ----------- B7 五、發明説明(13 ) ——- 易於擴散至閘極氧化物中,並置換一部份或全部任何在之 前回火中留在該處之氣。 在本發明之第二個具體實施例中,係提供一種方法作爲 在薄膜形成期間於原位氘化薄膜之一種替代方式,該薄膜 譬如閘極氧化物。替代地,氘化作用係藉由後回火處理達 成,然後使裝置以氘儲槽及/或障壁層密封。此方法可顯 著地降低製造成本,因氘化材料於本性上係比氫化材料較 昂貴,JL此具體實施例係有效地減少使用氘化之化學物種 時所需要之製程步驟數目。本發明之第二個具體實施例, 有兩種下文所述之變型。 在圖2所示之第一種變型中,基本概念是以裝置結構2〇〇 開始’其具有使用針對各個別薄膜之標準氫化反應物材料 所形成之薄膜。意即,閘極氧化物24、閘極25及閘極側壁 隔體26係在矽基材上藉習用技術形成。源極/汲極區域 22/23係藉習用離子植入方法形成。自動對準碎化物π係接 著在閘極25上及在源極/汲極區域22/23處形成。 然後,進行氘環境回火,以氘化先前形成之閘極氧化物 24、閘極25及閘極侧壁隔體26等。此氘回火係在4〇〇至600 °(:下,於D2環境中,在其他方面爲習用回火爐配置中進行 。氛回火係用以在砂'/二氧化秒界面20及在接近裝置薄膜 處,譬如閘極氧化物層24、多晶矽25及侧壁隔體26 ,實現 懸垂鍵結及/或取代(交換)儘可能多之氫。晶圓之此種回 火,典型上係在整體FEOL製程結束時,但在氘儲槽/障壁 層28被沈積在閘極25上之前進行。在後續處理步驟中,氘 -16- 本紙張尺度適用中國國家梯準(CNS ) A4規格(210X297公釐) ----·-------- f請先閲讀背面之注意事項再填寫本頁) -訂 經濟部中央樣準局員工消費合作社印製 A7 ________B7 五、發明説明(14) 化障壁氮化物28係在裝置上生長。 爲達成之,可將此單一氘化障壁/儲槽層邛,以如上述 關於第一個具體實施例之氘化氮化物層IS之相同方式形成 。層28係在先前被氘回火所氘化之層上,形成高乱濃度之 儲槽。 在第二個具體實施例之第二種變型中,如圖3中所示者 ’係提供氘儲槽層38a ’其係以如上述氘化障壁氛化物層 18/28之相同方式形成’具有高氘濃度,且其係併用覆蓋在 上並分開之擴散障壁層38b,其具有低氫與氘濃度,其係 抑制氫/氘潛移。於圖3中,亦顯示矽基材31,源極/汲 極區域32/33 ’閘極氧化物34,閘極多晶矽35,閘極側壁隔 體36及矽化物37。在本發明之第二個具體實施例中,閘極 氧化物34、閘極多晶矽35及閘極側壁隔體36,係藉習用方 法沈積,而在當時無需使用氘化反應物a 擴散障壁層38b可以噴射蒸氣沈積(jvd)之氮化物形成, 譬如藉X_ W. Wang等人所述之操作法,曰本應用物理學會," 藉噴射蒸氣沈積所製成之高度可信賴氮化矽薄膜",翻印自 1994固態裝置與材料國際會議之擴大摘要,1994年8月23_26 日(Pacifico Yokohama,日本),第856-858頁,其描述内容係併於本 文供參考。或者,擴散障壁層38b可以使用氮與矽烷代替 氨與矽烷所製成之低氫含量之氮化物形成。 鼠儲槽薄膜38a與擴散障壁層38b組合,係一起用以稀釋 以下作用’任何存在於裝置中之殘留氫可具有且有效地" 舍封住"所掺入氘之有利作用,並允許進一步熱回火及在 ----— _ -17- 本紙張尺度賴巾g]國家樣準(〇叫八4規格(21〇/297公楚) (請先閲讀背面之注意事項再填寫本頁) 裝·
*1T 氫中處理係在裝置300之線後端(BE0L)製程中進行,而不會 以氫交換氘。然後,可使鈍化氧化物39沈積在氘化障壁薄 膜38a與擴散障壁薄膜3此之頂部,且其不必被氘化。 本發明研究人員已藉SMS確認習用氮化物障壁層形成方 法係爲氫之一種來源,此係由於所使用之&114與1^13反應物 所致。其問題是在氮化物製程期間經由SiH4與所引進之 氯’會取代在使用氫之先前金屬棱回火製程期間被聚集在 矽/二氧化矽界面處之氘。因此,此具體實施例係涉及不 僅進行金屬後處理氘回火以供鈍化,而JL接著利用氖化反 應物’以形成氘化障壁氮化物,以保存該回火之利益。 在可應用於如上述之第一個或第二個具體實施例中之本 發明另一個進一步精製中,低溫製程,意即低於400eC之製 程,係在任何及所有氘摻入步驟後採用,以幫助保持此氘 在矽/二氧化矽界面處。依此方式避免在裝置中之熱干擾 :會減少氳對氘置換之發生率。例如,當施用於本發明之 第二個具體實施例時,在沈積氖㈣氮化物層28而未使用 伴随疋擴散障壁層後,或在沈積氘儲槽氮化物層3沾與擴 散障壁層39b後所進行之回火,係在低於4〇(Π:之溫度下進 行。此種欲在低於400。(:之溫度下進行之回火,可爲金屬鍍 敷後回火。而且’⑱常在氧化物鈍化層,譬如圖3中之層 39上進行之習用密緻化回火,在此精製中係被完全省略, 因其習用上必須在溫度超過4〇〇。〇下進行。 本發明並非僅特別限制於上文所提及之實例,反而是涵 蓋許多利用其原理之場合,依在特定技術中,此製程整人 A7 B7 五、發明説明(16 之細節而定。本發明可在任何下述狀況中實施,其中係特 別使用氘化材料以保存個別氘回火之作用,或爲產生氘儲 槽代替氫儲槽,以在後續熱循環之後提供此作用。 本發明亦意欲應用於TFT、多電阻器及多發射體雙極中 。在最初兩種情況中,氘係用以使晶粒邊界鈍化,並對熱 電子應力提供較大抵抗性。於後述情況中,氣比氫較不; 能漂移經過此多發射體及進入雙核接面中,於此處並可能 使硼失活。而且,在發射體-基體接面上之氧化物,因逆 偏壓電流所致之降解將被壓抑。 雖然本發明已以其較佳具體實施例爲觀點加以描逑, 热諳此藝者將明瞭本發明可在随文拚 Μ附申請專利範圍 神及範疇内,以修正方式實施。 精 (請先閲讀背面之注^h項#'填寫本頁) 裝· -訂 經濟部中央橾準局貝工消費合作社印製 19- 私紙張尺度適用中國國家標準(CNS ) Α4規格(210X297公釐)

Claims (1)

  1. 經濟部中央標準局貝工消費合作社印製 871 097ί5 393678 C8 ----------- D8 六、申請專利範圍 〜—---- 1· 一種一艰威半.導體裝置甩氣化薄膜之方法,其包括在薄膜 '形成期間提供包含氛化物種之來源材料之步驟。 2.如'申請專利範圍第!項之方法,其中該形成薄膜之步驟 係爲沈積。 3· 士申叫專利範園第2項之方法,其中沈積步驟爲對半導 體之製程。 4. 如申叫專利範圍第3項之方法,其中沈積步驟係提供說 之儲槽,以使半導體表面鈍化。 5. 如申請專利範圍第2項之方法,其中沈#步驟係提供對 氫.擴散之障壁。 6_ f申請專利範圍第2項之方法’其中該北積步驟係沈積 氣化之氮化碎。 7·如^請專利範圍第!項之方法,其中該薄膜爲在矽基材 上藉熱解濕式氧化作用形成之二氧化碎,其中該氣化之 物種包括氧化氘。 8. 如申請專利範圍第1項之方法,其中該薄膜係選自包括 閘極氧化物、多晶矽閘極、閘極侧壁隔體、障壁氮化物 層及PSG層。 9. 如申請專利範圍第丨項之方法,其中該氘化薄膜係在矽 基材上形成。 10. —種使金氧半場效電晶體(MOSFET)裝置對熱電子作用具 有加強抵抗性之方法,其包括以下步骤: 提供中間半導體裝置,其包括矽基材,在該沙基材 上之導電性閘極,及在該矽基材與該閘極間提供之問極 (請先閲讀背面之法f項•再填寫本頁) 裝. .1T. -20-
    393678
    經濟部中央標準局貞工消費合作社印製 氧化物; 使半導體裝置,於溫度範圍從約400至6⑻。c下,在含 氘環境中回火;及 在該經回火之半導體裝置上,形成含有氘之儲槽與 障壁氮化物薄膜。 11.如申請專利範圍第10項之方法,其中該形成儲槽與障壁 氮化物薄膜之步驟,包括在該PgT裝置上,於含有Si〇4 與Ν〇3之環境中,進行電漿加強化學蒸氣沈積。 如申請專利範圍第1〇项之方法,其進,一步包括在該氣儲 槽與障壁氮化物薄膜上,形成氫與氘擴散障壁氮化物層 之步驟。 I3.如申請專利範園第之方法,其中該氫與氮擴散障壁 氮化物層,係藉噴射蒸氣沈積形成。 14· 一種形成半導體裝置之方法,其包括以下步驟: 在矽基材上形成薄膜期間,提供包含氘化物種之來 源材料;與 在該提供步驟後,進行足以完成半導體裝置之處理 步驟其中該處理步驟各在低於400°C之溫度下進行。 15. 如申請專利範圍第14項之方法,其中該處理步驟包丁括至 少一個回火程序。 16. 如申請專利範圍第14項之方法,其中該處理步驟包括至 少一個在含氘環境中進行之回火程序。 17. 如申清專利範圍第14項之方法,其中該半導體 FET裝置。 直馬 I____________ * 21 - 本紙張尺度適财關家標feNS > (請先聞讀背面之注項再填寫本頁) 裝_
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