TW326570B - Semiconductor integrated circuit apparatus and process thereof - Google Patents

Semiconductor integrated circuit apparatus and process thereof

Info

Publication number
TW326570B
TW326570B TW085115937A TW85115937A TW326570B TW 326570 B TW326570 B TW 326570B TW 085115937 A TW085115937 A TW 085115937A TW 85115937 A TW85115937 A TW 85115937A TW 326570 B TW326570 B TW 326570B
Authority
TW
Taiwan
Prior art keywords
integrated circuit
semiconductor integrated
misfet
memory cell
circuit apparatus
Prior art date
Application number
TW085115937A
Other languages
English (en)
Inventor
Seishi Narii
Kawatetsu Uda
Kazuhiko Kajitani
Makoto Yoshida
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Family has litigation
First worldwide family litigation filed litigation Critical https://patents.darts-ip.com/?family=11563307&utm_source=google_patent&utm_medium=platform_link&utm_campaign=public_patent_search&patent=TW326570(B) "Global patent litigation dataset” by Darts-ip is licensed under a Creative Commons Attribution 4.0 International License.
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Application granted granted Critical
Publication of TW326570B publication Critical patent/TW326570B/zh

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B99/00—Subject matter not provided for in other groups of this subclass
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B12/00—Dynamic random access memory [DRAM] devices
    • H10B12/01—Manufacture or treatment
    • H10B12/09—Manufacture or treatment with simultaneous manufacture of the peripheral circuit region and memory cells
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B12/00—Dynamic random access memory [DRAM] devices
    • H10B12/01—Manufacture or treatment
    • H10B12/02—Manufacture or treatment for one transistor one-capacitor [1T-1C] memory cells
    • H10B12/05—Making the transistor
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B12/00—Dynamic random access memory [DRAM] devices
    • H10B12/30—DRAM devices comprising one-transistor - one-capacitor [1T-1C] memory cells
    • H10B12/31—DRAM devices comprising one-transistor - one-capacitor [1T-1C] memory cells having a storage electrode stacked over the transistor
    • H10B12/315—DRAM devices comprising one-transistor - one-capacitor [1T-1C] memory cells having a storage electrode stacked over the transistor with the capacitor higher than a bit line
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B12/00—Dynamic random access memory [DRAM] devices
    • H10B12/30—DRAM devices comprising one-transistor - one-capacitor [1T-1C] memory cells
    • H10B12/48—Data lines or contacts therefor
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B12/00—Dynamic random access memory [DRAM] devices
    • H10B12/30—DRAM devices comprising one-transistor - one-capacitor [1T-1C] memory cells
    • H10B12/48—Data lines or contacts therefor
    • H10B12/482—Bit lines
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S257/00—Active solid-state devices, e.g. transistors, solid-state diodes
    • Y10S257/915—Active solid-state devices, e.g. transistors, solid-state diodes with titanium nitride portion or region

Landscapes

  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Semiconductor Memories (AREA)
  • Semiconductor Integrated Circuits (AREA)
TW085115937A 1996-01-12 1997-01-13 Semiconductor integrated circuit apparatus and process thereof TW326570B (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP364896 1996-01-12

Publications (1)

Publication Number Publication Date
TW326570B true TW326570B (en) 1998-02-11

Family

ID=11563307

Family Applications (1)

Application Number Title Priority Date Filing Date
TW085115937A TW326570B (en) 1996-01-12 1997-01-13 Semiconductor integrated circuit apparatus and process thereof

Country Status (6)

Country Link
US (3) US6150689A (zh)
KR (1) KR100420250B1 (zh)
CN (1) CN1307721C (zh)
MY (1) MY124093A (zh)
SG (1) SG54456A1 (zh)
TW (1) TW326570B (zh)

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JP5674263B2 (ja) * 2007-08-21 2015-02-25 ピーエスフォー ルクスコ エスエイアールエルＰＳ４ Ｌｕｘｃｏ Ｓ．ａ．ｒ．ｌ． 相変化メモリ装置及び半導体記憶装置
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Also Published As

Publication number Publication date
CN1307721C (zh) 2007-03-28
US20040031980A1 (en) 2004-02-19
MY124093A (en) 2006-06-30
US6924525B2 (en) 2005-08-02
CN1162845A (zh) 1997-10-22
US6635918B1 (en) 2003-10-21
SG54456A1 (en) 1998-11-16
US6150689A (en) 2000-11-21
KR970060452A (ko) 1997-08-12
KR100420250B1 (ko) 2004-04-17

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