DE3867946D1 - Integrierte speicherschaltung, die eine antibetrugseinrichtung einschliesst. - Google Patents

Integrierte speicherschaltung, die eine antibetrugseinrichtung einschliesst.

Info

Publication number
DE3867946D1
DE3867946D1 DE8888401844T DE3867946T DE3867946D1 DE 3867946 D1 DE3867946 D1 DE 3867946D1 DE 8888401844 T DE8888401844 T DE 8888401844T DE 3867946 T DE3867946 T DE 3867946T DE 3867946 D1 DE3867946 D1 DE 3867946D1
Authority
DE
Germany
Prior art keywords
circuit including
memory circuit
integrated memory
fraud device
fraud
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE8888401844T
Other languages
English (en)
Inventor
Jacek Kowalski
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
STMicroelectronics SA
Original Assignee
SGS Thomson Microelectronics SA
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by SGS Thomson Microelectronics SA filed Critical SGS Thomson Microelectronics SA
Application granted granted Critical
Publication of DE3867946D1 publication Critical patent/DE3867946D1/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C17/00—Read-only memories programmable only once; Semi-permanent stores, e.g. manually-replaceable information cards
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02H—EMERGENCY PROTECTIVE CIRCUIT ARRANGEMENTS
    • H02H3/00—Emergency protective circuit arrangements for automatic disconnection directly responsive to an undesired change from normal electric working condition with or without subsequent reconnection ; integrated protection
    • H02H3/20—Emergency protective circuit arrangements for automatic disconnection directly responsive to an undesired change from normal electric working condition with or without subsequent reconnection ; integrated protection responsive to excess voltage
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/06—Auxiliary circuits, e.g. for writing into memory
    • G11C16/22—Safety or protection circuits preventing unauthorised or accidental access to memory cells

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Computer Security & Cryptography (AREA)
  • Quality & Reliability (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Read Only Memory (AREA)
  • Techniques For Improving Reliability Of Storages (AREA)
  • For Increasing The Reliability Of Semiconductor Memories (AREA)
  • Storage Device Security (AREA)
DE8888401844T 1987-07-21 1988-07-15 Integrierte speicherschaltung, die eine antibetrugseinrichtung einschliesst. Expired - Fee Related DE3867946D1 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
FR8710286A FR2618579B1 (fr) 1987-07-21 1987-07-21 Circuit integre a memoire comportant un dispositif anti-fraude

Publications (1)

Publication Number Publication Date
DE3867946D1 true DE3867946D1 (de) 1992-03-05

Family

ID=9353360

Family Applications (1)

Application Number Title Priority Date Filing Date
DE8888401844T Expired - Fee Related DE3867946D1 (de) 1987-07-21 1988-07-15 Integrierte speicherschaltung, die eine antibetrugseinrichtung einschliesst.

Country Status (6)

Country Link
US (1) US4827450A (de)
EP (1) EP0300885B1 (de)
JP (1) JP2663401B2 (de)
KR (1) KR890002890A (de)
DE (1) DE3867946D1 (de)
FR (1) FR2618579B1 (de)

Families Citing this family (35)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5095461A (en) * 1988-12-28 1992-03-10 Kabushiki Kaisha Toshiba Erase circuitry for a non-volatile semiconductor memory device
US5251169A (en) * 1991-05-06 1993-10-05 Lattice Semiconductor Corporation Non-volatile erasable and programmable interconnect cell
FR2690008B1 (fr) * 1991-05-29 1994-06-10 Gemplus Card Int Memoire avec cellule memoire eeprom a effet capacitif et procede de lecture d'une telle cellule memoire.
FR2683342B1 (fr) * 1991-10-31 1994-01-07 Gemplus Card International Circuit d'interface pour carte a circuit integre.
US6222762B1 (en) * 1992-01-14 2001-04-24 Sandisk Corporation Multi-state memory
FR2686989B1 (fr) * 1992-01-30 1997-01-17 Gemplus Card Int Procede de comptage de securite pour un compteur electronique binaire.
US5657332A (en) * 1992-05-20 1997-08-12 Sandisk Corporation Soft errors handling in EEPROM devices
FR2703501B1 (fr) * 1993-04-01 1995-05-19 Gemplus Card Int Circuit intégré pour carte à mémoire et procédé de décomptage d'unités dans une carte à mémoire.
FR2703526B1 (fr) * 1993-04-02 1995-05-19 Gemplus Card Int Circuit de déclenchement automatique.
FR2705810B1 (fr) * 1993-05-26 1995-06-30 Gemplus Card Int Puce de carte à puce munie d'un moyen de limitation du nombre d'authentifications.
US5523970A (en) * 1993-12-29 1996-06-04 International Business Machines Incorporated Non-volatile memory utilizing a thin film, floating gate, amorphous transistor
US5509076A (en) * 1994-05-02 1996-04-16 General Instrument Corporation Of Delaware Apparatus for securing the integrity of a functioning system
FR2739737B1 (fr) * 1995-10-09 1997-11-21 Inside Technologies Perfectionnements aux cartes a memoire
FR2739706B1 (fr) * 1995-10-09 1997-11-21 Inside Technologies Perfectionnements aux cartes a memoire
KR19980076076A (ko) * 1997-04-04 1998-11-16 유현식 전선용 발포성 수지조성물
JP3001454B2 (ja) * 1997-04-23 2000-01-24 日本電気アイシーマイコンシステム株式会社 半導体装置
US5909449A (en) * 1997-09-08 1999-06-01 Invox Technology Multibit-per-cell non-volatile memory with error detection and correction
FR2786911A1 (fr) 1998-12-02 2000-06-09 St Microelectronics Sa Memoire eeprom securisee comportant des moyens de detection d'effacement par uv
DE10162259A1 (de) * 2001-12-18 2003-07-17 Austriamicrosystems Ag Schloss Einrichtung zur Messung des Verbrauchs elektrischer Energie
US7173852B2 (en) * 2003-10-03 2007-02-06 Sandisk Corporation Corrected data storage and handling methods
US7012835B2 (en) * 2003-10-03 2006-03-14 Sandisk Corporation Flash memory data correction and scrub techniques
US7395404B2 (en) * 2004-12-16 2008-07-01 Sandisk Corporation Cluster auto-alignment for storing addressable data packets in a non-volatile memory array
US7315916B2 (en) * 2004-12-16 2008-01-01 Sandisk Corporation Scratch pad block
US7716538B2 (en) * 2006-09-27 2010-05-11 Sandisk Corporation Memory with cell population distribution assisted read margining
US7886204B2 (en) * 2006-09-27 2011-02-08 Sandisk Corporation Methods of cell population distribution assisted read margining
US7477547B2 (en) * 2007-03-28 2009-01-13 Sandisk Corporation Flash memory refresh techniques triggered by controlled scrub data reads
US7573773B2 (en) * 2007-03-28 2009-08-11 Sandisk Corporation Flash memory with data refresh triggered by controlled scrub data reads
US9135962B2 (en) * 2007-06-15 2015-09-15 Micron Technology, Inc. Comparators for delta-sigma modulators
US8687421B2 (en) 2011-11-21 2014-04-01 Sandisk Technologies Inc. Scrub techniques for use with dynamic read
US9230689B2 (en) 2014-03-17 2016-01-05 Sandisk Technologies Inc. Finding read disturbs on non-volatile memories
US9552171B2 (en) 2014-10-29 2017-01-24 Sandisk Technologies Llc Read scrub with adaptive counter management
US9978456B2 (en) 2014-11-17 2018-05-22 Sandisk Technologies Llc Techniques for reducing read disturb in partially written blocks of non-volatile memory
US9349479B1 (en) 2014-11-18 2016-05-24 Sandisk Technologies Inc. Boundary word line operation in nonvolatile memory
US9449700B2 (en) 2015-02-13 2016-09-20 Sandisk Technologies Llc Boundary word line search and open block read methods with reduced read disturb
US9653154B2 (en) 2015-09-21 2017-05-16 Sandisk Technologies Llc Write abort detection for multi-state memories

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
IT1026895B (it) * 1973-12-12 1978-10-20 Itt Circuito integrabile per il controllo di una tensione di alimentazione
JPS60150297A (ja) * 1984-01-13 1985-08-07 Nec Corp 記憶装置
US4612630A (en) * 1984-07-27 1986-09-16 Harris Corporation EEPROM margin testing design
US4612632A (en) * 1984-12-10 1986-09-16 Zenith Electronics Corporation Power transition write protection for PROM

Also Published As

Publication number Publication date
US4827450A (en) 1989-05-02
KR890002890A (ko) 1989-04-11
JP2663401B2 (ja) 1997-10-15
FR2618579B1 (fr) 1989-11-10
FR2618579A1 (fr) 1989-01-27
EP0300885B1 (de) 1992-01-22
EP0300885A1 (de) 1989-01-25
JPS6450299A (en) 1989-02-27

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee