FR2697663B1 - Circuit de test de mémoire. - Google Patents

Circuit de test de mémoire.

Info

Publication number
FR2697663B1
FR2697663B1 FR9213430A FR9213430A FR2697663B1 FR 2697663 B1 FR2697663 B1 FR 2697663B1 FR 9213430 A FR9213430 A FR 9213430A FR 9213430 A FR9213430 A FR 9213430A FR 2697663 B1 FR2697663 B1 FR 2697663B1
Authority
FR
France
Prior art keywords
test circuit
memory test
memory
circuit
test
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
FR9213430A
Other languages
English (en)
Other versions
FR2697663A1 (fr
Inventor
Pierre Sauvage
Pierre-Yves Thoulon
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
HP Inc
Original Assignee
Hewlett Packard Co
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hewlett Packard Co filed Critical Hewlett Packard Co
Priority to FR9213430A priority Critical patent/FR2697663B1/fr
Priority to EP93115557A priority patent/EP0595036A1/fr
Priority to JP5273893A priority patent/JPH06223002A/ja
Publication of FR2697663A1 publication Critical patent/FR2697663A1/fr
Application granted granted Critical
Publication of FR2697663B1 publication Critical patent/FR2697663B1/fr
Priority to US08/613,597 priority patent/US5621883A/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • G11C29/04—Detection or location of defective memory elements, e.g. cell constructio details, timing of test signals
    • G11C29/08—Functional testing, e.g. testing during refresh, power-on self testing [POST] or distributed testing
    • G11C29/48—Arrangements in static stores specially adapted for testing by means external to the store, e.g. using direct memory access [DMA] or using auxiliary access paths
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14—Handling requests for interconnection or transfer
    • G06F13/20—Handling requests for interconnection or transfer for access to input/output bus
    • G06F13/28—Handling requests for interconnection or transfer for access to input/output bus using burst mode transfer, e.g. direct memory access DMA, cycle steal
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • G11C29/04—Detection or location of defective memory elements, e.g. cell constructio details, timing of test signals
    • G11C29/08—Functional testing, e.g. testing during refresh, power-on self testing [POST] or distributed testing
    • G11C29/12—Built-in arrangements for testing, e.g. built-in self testing [BIST] or interconnection details
    • G11C29/14—Implementation of control logic, e.g. test mode decoders

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Techniques For Improving Reliability Of Storages (AREA)
  • Microcomputers (AREA)
  • For Increasing The Reliability Of Semiconductor Memories (AREA)
FR9213430A 1992-10-30 1992-10-30 Circuit de test de mémoire. Expired - Fee Related FR2697663B1 (fr)

Priority Applications (4)

Application Number Priority Date Filing Date Title
FR9213430A FR2697663B1 (fr) 1992-10-30 1992-10-30 Circuit de test de mémoire.
EP93115557A EP0595036A1 (fr) 1992-10-30 1993-09-27 Appareil de commande de DNA avec une capacité de test de mémoire
JP5273893A JPH06223002A (ja) 1992-10-30 1993-11-01 マイクロプロセッサメモリのテスト回路
US08/613,597 US5621883A (en) 1992-10-30 1996-03-11 Circuit for testing microprocessor memories

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
FR9213430A FR2697663B1 (fr) 1992-10-30 1992-10-30 Circuit de test de mémoire.

Publications (2)

Publication Number Publication Date
FR2697663A1 FR2697663A1 (fr) 1994-05-06
FR2697663B1 true FR2697663B1 (fr) 1995-01-13

Family

ID=9435334

Family Applications (1)

Application Number Title Priority Date Filing Date
FR9213430A Expired - Fee Related FR2697663B1 (fr) 1992-10-30 1992-10-30 Circuit de test de mémoire.

Country Status (4)

Country Link
US (1) US5621883A (fr)
EP (1) EP0595036A1 (fr)
JP (1) JPH06223002A (fr)
FR (1) FR2697663B1 (fr)

Families Citing this family (24)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5668815A (en) * 1996-08-14 1997-09-16 Advanced Micro Devices, Inc. Method for testing integrated memory using an integrated DMA controller
US5822513A (en) * 1996-09-27 1998-10-13 Emc Corporation Method and apparatus for detecting stale write data
US6092229A (en) * 1996-10-09 2000-07-18 Lsi Logic Corporation Single chip systems using general purpose processors
JPH11219600A (ja) * 1998-02-03 1999-08-10 Mitsubishi Electric Corp 半導体集積回路装置
US6751718B1 (en) 2001-03-26 2004-06-15 Networks Associates Technology, Inc. Method, system and computer program product for using an instantaneous memory deficit metric to detect and reduce excess paging operations in a computer system
US7114106B2 (en) 2002-07-22 2006-09-26 Finisar Corporation Scalable network attached storage (NAS) testing tool
DE10240165A1 (de) * 2002-08-30 2004-03-18 Disetronic Licensing Ag Vorrichtung zum dosierten Ausstoßen eines flüssigen Wirkstoffes und Infusionspumpe
US7000159B2 (en) * 2003-03-10 2006-02-14 Dell Products L.P. System and method for testing memory
US20040216018A1 (en) * 2003-04-28 2004-10-28 Cheung Kam Tim Direct memory access controller and method
US7428644B2 (en) * 2003-06-20 2008-09-23 Micron Technology, Inc. System and method for selective memory module power management
US7389364B2 (en) * 2003-07-22 2008-06-17 Micron Technology, Inc. Apparatus and method for direct memory access in a hub-based memory system
US20050050237A1 (en) * 2003-08-28 2005-03-03 Jeddeloh Joseph M. Memory module and method having on-board data search capabilities and processor-based system using such memory modules
US7194593B2 (en) * 2003-09-18 2007-03-20 Micron Technology, Inc. Memory hub with integrated non-volatile memory
US7120743B2 (en) * 2003-10-20 2006-10-10 Micron Technology, Inc. Arbitration system and method for memory responses in a hub-based memory system
US7350109B2 (en) * 2003-11-14 2008-03-25 Hewlett-Packard Development Company, L.P. System and method for testing a memory using DMA
JP4514028B2 (ja) * 2004-05-20 2010-07-28 ルネサスエレクトロニクス株式会社 故障診断回路及び故障診断方法
US7337368B2 (en) 2004-06-07 2008-02-26 Dell Products L.P. System and method for shutdown memory testing
KR100772724B1 (ko) * 2005-09-28 2007-11-02 주식회사 하이닉스반도체 반도체 메모리 장치
JP4343923B2 (ja) * 2006-06-02 2009-10-14 富士通株式会社 Ｄｍａ回路およびデータ転送方法
TWI327732B (en) * 2007-03-03 2010-07-21 Nanya Technology Corp Memory device and related testing method
US8250250B2 (en) 2009-10-28 2012-08-21 Apple Inc. Using central direct memory access (CDMA) controller to test integrated circuit
WO2016157505A1 (fr) * 2015-04-02 2016-10-06 三菱電機株式会社 Dmac avec fonction de vérification de mémoire
JP7125602B2 (ja) * 2018-08-01 2022-08-25 富士通株式会社 データ処理装置および診断方法
TWI755342B (zh) * 2021-07-16 2022-02-11 陽榮科技股份有限公司 用於檢測記憶體控制器的檢測裝置

Family Cites Families (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4715034A (en) * 1985-03-04 1987-12-22 John Fluke Mfg. Co., Inc. Method of and system for fast functional testing of random access memories
US4873705A (en) * 1988-01-27 1989-10-10 John Fluke Mfg. Co., Inc. Method of and system for high-speed, high-accuracy functional testing of memories in microprocessor-based units
GB8824374D0 (en) * 1988-10-18 1988-11-23 Hewlett Packard Ltd Interface arrangement for interfacing data storage device with data handling system
JPH02255925A (ja) * 1988-11-30 1990-10-16 Hitachi Ltd メモリテスト方法および装置
US5157664A (en) * 1989-09-21 1992-10-20 Texas Instruments Incorporated Tester for semiconductor memory devices
JPH04271445A (ja) * 1990-08-02 1992-09-28 Internatl Business Mach Corp <Ibm> メモリ・テスト装置
US5423029A (en) * 1993-05-11 1995-06-06 Dell Usa, L.P. Circuit and method for testing direct memory access circuitry

Also Published As

Publication number Publication date
FR2697663A1 (fr) 1994-05-06
JPH06223002A (ja) 1994-08-12
EP0595036A1 (fr) 1994-05-04
US5621883A (en) 1997-04-15

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Legal Events

Date Code Title Description
ST Notification of lapse