TW201833893A - 包含一補償電路的像素單元與包含所述像素單元的電致發光顯示器 - Google Patents

包含一補償電路的像素單元與包含所述像素單元的電致發光顯示器 Download PDF

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Publication number
TW201833893A
TW201833893A TW106129400A TW106129400A TW201833893A TW 201833893 A TW201833893 A TW 201833893A TW 106129400 A TW106129400 A TW 106129400A TW 106129400 A TW106129400 A TW 106129400A TW 201833893 A TW201833893 A TW 201833893A
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transistors
transistor
group
capacitor
voltage
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TW106129400A
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TWI652663B (zh
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鄭士嵩
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創王光電股份有限公司
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    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
    • G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
    • G09G3/32—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
    • G09G3/3208—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED]
    • G09G3/3225—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix
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    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
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    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
    • G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
    • G09G3/32—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
    • G09G3/3208—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED]
    • G09G3/3225—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix
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    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
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    • G09G3/32—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
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Abstract

一種補償電路包含一電容器、一電致發光(EL)裝置、一第一組電晶體及一第二組電晶體。上述第一組電晶體耦接於所述電容器的一第一端和一資料輸入間，其係用以回應在該資料輸入所接收的資料而提供一補償電壓。所述的補償電壓是由所述第一組電晶體中每一電晶體的閾值電壓所構成。上述第二組電晶體耦接於所述EL裝置和電容器的一第二端間，其係用以將一電流傳送通過該EL裝置。所述電流的強度與所述第二組電晶體中每一電晶體的閾值電壓無關。

Description

包含一補償電路的像素單元與包含所述像素單元的電致發光顯示器
本發明是關於像素單元，特別是包含補償電路的像素單元，以及包含此種像素單元的電致發光顯示器。
電致發光(EL)顯示器，譬如主動矩陣有機發光二極體(active matrix organic light emitting diode，AMOLED)顯示器，可包含一像素陣列。此外，該些像素中的每一像素可包含一電致發光(EL)裝置、用以傳輸含有與亮度相關之資訊的一開關電晶體、以及用以驅動該EL裝置使其根據該資料而發光的一驅動電晶體。雖然此種EL顯示器具備電力消耗較低的優點，但半導體製備過程中的製程因素卻可能使多個像素間的顯示不均勻。因此，相關領域需要一種能夠解決上述問題的電路。
本發明的實施例提出一種補償電路，其包含一電容器、一電致發光(EL)裝置、一第一組電晶體及一第二組電晶體。該第一組電晶體耦接於該電容器的第一端和一資料輸入間，其係用以回應在該資料輸入所接收的資料而提供一補償電壓。該補償電壓是由該第一組電晶體中每一電晶體的閾值電壓所構成。該第二組電晶體耦接於該EL裝置和電容器的第二端間，其係用以使一電流流經該EL裝置。該電流的強度與該第二組電晶體中每一電晶體的閾值電壓無關。 於一實施例中，該第一組電晶體中每一電晶體的一閘極係耦接至該電容器的該第一端。 於另一實施例中，該第二組電晶體中每一電晶體的一閘極係耦接至該電容器的該第一端。 於又一實施例中，該第一組電晶體包含一第一電晶體、一第二電晶體及一第三電晶體。此外，該補償電壓是該第一、第二與第三電晶體的閾值電壓總和。 在又另一實施例中，該第二組電晶體包含該第一電晶體、一第四電晶體及一第五電晶體。此外，該補償電壓是該第一、第四與第五電晶體的閾值電壓總和。 在一實施例中，該電路還包含另一電晶體，用以回應一第一控制信號，以重置位於該電容器第一端的一電壓位準。 在另一實施例中，該電路還包含數個電晶體，用以回應一第二控制信號，以透過該第一組電晶體而使該資料儲存於該電容器中。 在又另一實施例中，該電路還包含數個電晶體，用以回應一第三控制信號，以使該電流通過該第二組電晶體而流經該EL裝置。 在一實施例中，該第一組電晶體中每一電晶體及該第二組電晶體中每一電晶體分別包含一p-型電晶體。 在另一實施例中，該第一組電晶體中每一電晶體及該第二組電晶體中每一電晶體分別包含一n-型電晶體。 本發明的某些實施例提供一電致發光顯示器，其包含一像素單元陣列，其中的每一像素單元包含一電容器、一電致發光(EL)裝置、一第一組電晶體及一第二組電晶體。該第一組電晶體耦接於該電容器的第一端和一資料輸入間，其係用以回應在該資料輸入所接收的資料而提供一補償電壓。該補償電壓是由該第一組電晶體中每一電晶體的閾值電壓所構成。該第二組電晶體耦接於該EL裝置和電容器的第二端間，其係用以使一電流流經該EL裝置。該電流的強度與該第二組電晶體中每一電晶體的閾值電壓無關。 本發明的實施例亦提供一種電致發光(EL)顯示器的電壓補償方法。該EL顯示器包含多個像素，該些像素單元各包含一電容器、一EL裝置、一第一組電晶體及一第二組電晶體。根據此種方法，於一第一階段中，重置位於該電容器之第一端的電壓位準。在一第二階段中，將一資料儲存於該電容器中。該資料係透過該第一組電晶體所接收。再者，於該第二階段中，產生一補償電壓，其係由該第一組電晶體中每一電晶體的閾值電壓所構成。更有甚者，於一第三階段中，使一電流透過該第二組電晶體而流經該EL裝置。該電流的強度與該第二組電晶體中每一電晶體的閾值電壓無關。
以下揭示內容提供了多種實施方式或例示，其能用以實現本揭示內容的不同特徵。下文所述之元件與配置的具體例子係用以簡化本揭示內容。當可想見，這些敘述僅為例示，其本意並非用於限制本揭示內容。舉例來說，在下文的描述中，將一第一特徵形成於一第二特徵上或之上，可能包含某些實施例其中所述的第一與第二特徵彼此直接接觸；且也可能包含某些實施例其中還有而外的元件形成於上述第一與第二特徵之間，而使得第一與第二特徵可能沒有直接接觸。此外，本揭示內容可能會在多個實施例中重複使用元件符號和/或標號。此種重複使用乃是基於簡潔與清楚的目的，且其本身不代表所討論的不同實施例和/或組態之間的關係。 此外，當可理解，若將一部件描述為與另一部件「連接(connected to)」或「耦接(耦接至)」，則兩者可直接連接或耦接，或兩者間可能出現其他中間(intervening)部件。 在下文說明中，當一裝置屬於正緣觸發(active high)，將一信號拉高(asserted)至高邏輯值，以啟動該相應裝置。反之，將該信號拉低(deasserted)至低邏輯值，以停用該相應裝置。然而當該裝置屬於負緣觸發(active low)時，將該信號拉至低邏輯值，以啟動該裝置，並將其拉至高邏輯值，以停用該裝置。 圖1為根據一實施例的顯示器10之區塊圖。顯示器10可以是一電致發光(EL)顯示器，譬如主動矩陣有機發光二極體(AMOLED)顯示器，但並不以此為限。 參照圖1，顯示器10包含主動區域12、閘極驅動器14及源極驅動器15。主動區域12包含一像素單元陣列，舉例來說，可將複數個像素單元P排列成N×M的矩陣。閘極驅動器14經由N條掃描線將控制信號S1、S2及EM提供給N列像素單元P。源極驅動器15將資料提供給M行像素單元P中的一所選像素。此外，一電源驅動器16在VDD及VSS的電源中提供供應電壓至該主動區域12，而一DC偏壓源18則提供一參考電壓Vref，例如接地電壓，至該主動區域12。在一實施例中，VDD約為5伏特(5V)，VSS約為-5V，而Vref則約為0V。 主動區域12中的每一像素單元P包含三個子像素單元，其可用以顯示紅色(R)、綠色(G)及藍色(B)。在其他實施例中，例如，子像素渲染(sub-pixel rendering，SPR)感應器，子像素單元的數目不限於三。在本實施例中，三種子像素單元係沿著列的方向排列。因此，源極驅動器15的資料線數目為3×M。 圖2是根據圖1所示顯示器10中一例示性子像素單元20的電路圖。 參照圖2，所述電路為一補償電路，其包含一EL裝置28、複數個電晶體T1至T10及一電容器C1。舉例來說，EL裝置28包含一電流驅動部件，其可包含一有機發光二極體(organic light emitting diode，OLED)、微LED或量子點LED(quantum dot LED，QLED)。電容器C1耦接於VDD和節點A之間，其可作為一儲存電容器。在一實施例中，電容器C1的電容約為0.5微法拉(LED)。此外，級聯(cascode)連接的電晶體T2、T5與T6作為驅動電晶體，其可根據儲存於電容器C1中的資料來驅動EL裝置28。在本實施例中，複數個電晶體T1至T10中的每一個電晶體包含一p-型薄膜電晶體(thin film transistor、TFT)或一p-型金氧半(p-type metal-oxide-semiconductor，PMOS)電晶體。 電晶體T1的閘極用以接收控制信號S1。電晶體T1的汲極用以接收來自DC偏壓源18的參考電壓Vref。電晶體T1的源極耦接至節點A。本發明所述技術領域中具有通常知識者當可理解，MOS電晶體的汲極與源極端可互換，其係取決於施加於該處的電壓位準。 再者，電晶體T2、T3、T4、T5與T6的閘極分別耦接至節點A。電晶體T2的源極耦接至電晶體T3與T5兩者的汲極。電晶體T2的汲極耦接至電晶體T6與T4兩者的源極。 除此之外，電晶體T7與T8兩者的閘極接收控制信號S2。電晶體T7的源極在一相應資料線上接收來自源極驅動器15的資料(標記為"DATA")。電晶體T7的汲極耦接至電晶體T3的源極。此外，電晶體T8的源極耦接至電晶體T4的汲極。電晶體T8的汲極耦接至節點A。 又，電晶體T9與T10兩者的閘極接收控制信號EM。電晶體T9的源極接收VDD。電晶體T9的汲極耦接至電晶體T5的源極。此外，電晶體T10的源極耦接至電晶體T6的汲極。電晶體T10的汲極耦接至EL裝置28的陽極。EL裝置28的陰極耦接至VSS。 圖3A及3B繪示根據某些實施例，在第一階段中，操作圖2所示電路20的方法。 參照圖3A，控制信號S1、S2及EM經設定為負緣觸發。在時間點t1，將控制信號S1拉至負緣(falling edge)，而位於高邏輯位準的控制信號S2與EM則未經拉動。因此，參照圖3B，電晶體T1被開啟，而電晶體T7至T10則被關閉(圖中以"×"符號標記)。由於電晶體T1是開啟的，節點A的電壓位準(下文標記為VA)被拉低至Vref。此外，由於電晶體T2至T6的閘極分別連接到節點A，在第一階段中，分別將作為驅動電晶體的電晶體T2、T5與T6之閘極的電壓位準(標記為Vg)重置為Vref。電容器C1用以將VA與Vg保持在Vref的電壓位準。在第一階段中能夠有效地將VA與Vg重置為Vref。 圖4A及4B繪示根據某些實施例，在第二階段中，操作圖2所示電路20的方法。 參照圖4A，在時間點t2，將控制信號S2拉至負緣，而處於一高邏輯位準的控制信號S1與EM則未經拉動。如此一來，參照圖4B，電晶體T1被關閉，而電晶體T7與T8則被開啟。在第二階段中，將電晶體T2、T3與T4保持在開啟狀態，這是因為其閘極在最初被偏壓至Vref。由於電晶體T7與T8被開啟，可透過電晶體T7、T3、T2、T4與T8將資料寫入至電容器C1。如此一來，在該第二階段結束時，可將VA還有Vg以下列方程式(1)表示。 VA=Vg=Vdata – (方程式(1) 其中Vdata表示電晶體T7接收的資料之電壓位準，而分別表示電晶體T2、T3與T4的閾值電壓。在一實施例中，Vdata介於約2V至約5V，而分別約為0.6V。 與電晶體T2、T3與T4相關的(一詞稱為補償電壓，下文將參照圖5A及5B進一步討論。 圖5A及5B繪示根據某些實施例，在第三階段中，操作圖2所示電路20的方法。 參照圖5A，在時間點t3，控制信號EM被拉至負緣，而位於高邏輯位準的控制信號S1與S2則未經拉動。如此一來，參照圖5B，電晶體T1、T7與T8被關閉，而電晶體T9與T10則被開啟。對於電晶體T2、T5與T6，由於閘極電壓位準Vg為Vdata – (且源極電壓位準Vs約為VDD，使得，故將驅動電晶體T2、T5與T6保持在開啟狀態。如此一來，來自供應電源VDD的電流透過電晶體T9、T5、T2、T6與T10流經EL裝置28而到達VSS，進而使得EL裝置28發光。在第三階段中，透過電容器C1的作用，將Vg保持在Vdata – (。 可將流經EL裝置28的電流Isd以下列方程式(2)來表示。 2 方程式(2) 其中k為一常數，且分別表示電晶體T5與T6的閾值電壓。 因為=VDD – Vdata + (，可將方程式(2)改寫為下列方程式(3)。 2 方程式(3) 舉例來說，可藉由控制裝置特徵構造，譬如半導體製造時的通道長度，而使方程式(3)中的(及(互相抵銷。如此一來，可再次將方程式(3)改寫為下列方程式(4)。 2 方程式(4) 由於方程式(4)不包含方程式(2)或方程式(3)中所述的多個Vth參數，可以提升顯示器10的顯示品質。 如此一來，本發明的實施例提供一補償電路，其包含一電容器C1、一電致發光(EL)裝置28、一第一組電晶體以及一第二組電晶體。第一組電晶體包含一第一電晶體、一第二電晶體與一第三電晶體，分別對應於電晶體T2、T3與T4。第二組電晶體包含上述第一電晶體、一第四電晶體與一第五電晶體，分別對應於電晶體T2、T5與T6。第一組電晶體耦接於電容器C1的一第一端(連接至節點A)和資料輸入之間，其係用以回應所述資料輸入而提供一補償電壓。上述補償電壓係由第一組電晶體中每一電晶體T2、T3、T4的閾值電壓所構成。第二組電晶體耦接於EL裝置28和電容器C1的一第二端(連接至VDD)之間，其係用以使一電流透過第二組電晶體而流經EL裝置。所述電流的強度不受第二組電晶體中每一電晶體T2、T5、T6之閾值電壓影響。 圖6A繪示根據另一實施例的顯示器之子像素單元60的電路圖。 參照圖6A，所示電路與上文參照圖2所示的電路20相似，不同之處在於譬如可利用n-型TFT或n-型金氧半(NMOS)電晶體來取代圖2中的p-型TFT或PMOS電晶體T1至T10。具體來說，電晶體T1的閘極接收控制信號S1。電晶體T1的源極接收來自DC偏壓源18的參考電壓Vref。電晶體T1的汲極耦接至節點A。此外，電晶體T2、T3、T4、T5與T6的閘極也分別耦接至節點A。電晶體T2的源極分別耦接至電晶體T3的源極以及電晶體T5的汲極。電晶體T2的汲極分別耦接至電晶體T6的源極以及電晶體T4的汲極。 除此之外，電晶體T7與T8兩者的閘極接收控制信號S2。電晶體T7的汲極從源極驅動器15接收一相應資料線上的資料(標記為"DATA")。電晶體T7的源極耦接至電晶體T3的汲極。此外，電晶體T8的源極耦接至節點A。電晶體T8的汲極耦接至電晶體T4的源極。 再者，電晶體T9與T10兩者的閘極接收該控制信號EM。電晶體T9的源極接收VSS。電晶體T9的汲極耦接至電晶體T5的源極。除此之外，電晶體T10的源極耦接至電晶體T6的汲極。電晶體T10的汲極耦接至EL裝置28的陰極。EL裝置28的陽極耦接至VDD。 圖6B為根據某些實施例，用以操作圖6A所示電路之控制信號的波形圖。 參照圖6B，控制信號S1、S2與EM和上文參照圖3A、4A或5A所述者相似，不同之處在於，例如，圖6B的控制信號S1、S2及EM為正緣觸發，或拉高至一正緣(rising edge)。相似地，可將流經EL裝置28的電流Isd表示為下列方程式(5)。 2 方程式(5) 藉由控制裝置特徵結構，譬如半導體製程中(製造時)的通道長度，而使方程式(5)中的(及(互相抵銷。如此一來，可再次將方程式(5)改寫為下列方程式(6)。 2 方程式(6) 圖7為一流程圖，繪示在電致發光顯示器中進行電壓補償的方法。 參照圖7，在操作71，提供一電致發光(EL)顯示器。所述EL顯示器包含多個像素單元，其分別包含電容器、EL裝置、第一組電晶體及第二組電晶體。 在操作73，於第一階段中，重置電容器第一端的電壓位準。 在操作75，於第二階段中，將資料儲存於電容器中。上述資料係透過第一組電晶體所接收。此外，在第二階段中，產生由第一組電晶體中每一電晶體之閾值電壓所構成的補償電壓。 在操作77，於第三階段中，使電流透過第二組電晶體而流經EL裝置。所述電流的強度與第二組電晶體中每一電晶體的閾值電壓無關。 上文的敘述簡要地提出了本發明某些實施例之特徵，而使得本發明所屬技術領域具有通常知識者能夠更全面地理解本揭示內容的多種態樣。本發明所屬技術領域具有通常知識者當可明瞭，其可輕易地利用本揭示內容作為基礎，來設計或更動其他製程與結構，以實現與此處所述之實施方式相同的目的和/或達到相同的優點。本發明所屬技術領域具有通常知識者應當明白，這些均等的實施方式仍屬於本揭示內容之精神與範圍，且其可進行各種變更、替代與更動，而不會悖離本揭示內容之精神與範圍。
10‧‧‧顯示器
12‧‧‧主動區域
14‧‧‧閘極驅動器
15‧‧‧源極驅動器
16‧‧‧電源驅動器
18‧‧‧DC偏壓源
20‧‧‧子像素單元
28‧‧‧EL裝置
71~77‧‧‧步驟
A‧‧‧節點
C1‧‧‧電容器
DATA‧‧‧資料
Isd‧‧‧電流
M‧‧‧行
N‧‧‧列
P‧‧‧像素單元
S1、S2、EM
信號t1、t2、t3‧‧‧時間點
T1~T10‧‧‧電晶體
VDD‧‧‧工作電壓壓
VSS‧‧‧接地電壓
在閱讀了下文實施方式以及附隨圖式時，能夠最佳地理解本揭露的多種態樣。應注意到，根據本領域的標準作業習慣，圖中的各種特徵並未依比例繪製。事實上，為了能夠清楚地進行描述，可能會刻意地放大或縮小某些特徵的尺寸。 圖1為根據一實施例之顯示器的區塊圖。 圖2為圖1所示顯示器中一子像素單元的電路圖。 圖3A及3B繪示根據某些實施例，於第一階段中操作圖2所示電路的方法。 圖4A及4B繪示根據某些實施例，於第二階段中操作圖2所示電路的方法。 圖5A及5B繪示根據某些實施例，於第三階段中操作圖2所示電路的方法。 圖6A為根據另一實施例，一顯示器中一子像素單元的電路圖。 圖6B為根據某些實施例，用以操作圖6A所示電路之控制信號的波形圖。 圖7為流程圖，其繪示在一電致發光顯示器中進行電壓補償的方法。

Claims (20)

  1. 一種補償電路，包含： 一電容器，包含一第一端及一第二端； 一電致發光(EL)裝置； 一第一組電晶體，耦接於該電容器的該第一端和一資料輸入之間，其係用以提供一補償電壓以回應於該資料輸入所接收之資料，該補償電壓係由該第一組電晶體中每一電晶體的一閾值電壓所構成；以及 一第二組電晶體，耦接於該EL裝置和該電容器的該第二端之間，其係用以使一電流流經該EL裝置，該電流的一強度與該第二組電晶體中每一電晶體的一閾值電壓無關。
  2. 如請求項1所述之補償電路，其中該第一組電晶體中每一電晶體的一閘極係耦接至該電容器的該第一端。
  3. 如請求項1所述之補償電路，其中該第二組電晶體中每一電晶體的一閘極係耦接至該電容器的該第一端。
  4. 如請求項1所述之補償電路，其中該第一組電晶體包含一第一電晶體、一第二電晶體及一第三電晶體，且該補償電壓是該第一、第二與第三電晶體之該閾值電壓的總和。
  5. 如請求項4所述之補償電路，其中該第二組電晶體包含該第一電晶體、一第四電晶體及一第五電晶體，且該補償電壓是該第一、第四與第五電晶體之該閾值電壓的總和。
  6. 如請求項1所述之補償電路，還包含另一電晶體，用以回應一第一控制信號，以重置該電容器之該第一端的一電壓位準。
  7. 如請求項1所述之補償電路，還包含複數個電晶體，用以回應一第二控制信號，以透過該第一組電晶體而使該資料儲存於該電容器中。
  8. 如請求項1所述之補償電路，還包含複數個電晶體，用以回應一第三控制信號，以使該電流透過該第二組電晶體流經該EL裝置。
  9. 如請求項1所述之補償電路，其中該第一組電晶體中每一電晶體及該第二組電晶體中每一電晶體分別包含一p-型電晶體。
  10. 如請求項1所述之補償電路，其中該第一組電晶體中每一電晶體及該第二組電晶體中每一電晶體分別包含一n-型電晶體。
  11. 一電致發光顯示器，包含： 一像素單元陣列，其中的每一像素單元包含： 一電容器，包含一第一端及一第二端； 一電致發光(EL)裝置； 一第一組電晶體，耦接於該電容器的該第一端和一資料輸入之間，其係用以提供一補償電壓以回應於該資料輸入所接收之資料，該補償電壓係由該第一組電晶體中每一電晶體的一閾值電壓所構成；以及 一第二組電晶體，耦接於該EL裝置和該電容器的該第二端之間，其係用以使一電流流經該EL裝置，該電流的一強度與該第二組電晶體中每一電晶體的一閾值電壓無關。
  12. 如請求項11所述之電致發光顯示器，其中該第一組電晶體中每一電晶體的一閘極係耦接至該電容器的該第一端。
  13. 如請求項11所述之電致發光顯示器，其中該第二組電晶體中每一電晶體的一閘極係耦接至該電容器的該第一端。
  14. 如請求項11所述之電致發光顯示器，其中該第一組電晶體包含一第一電晶體、一第二電晶體及一第三電晶體，且該補償電壓是該第一、第二與第三電晶體之該閾值電壓的總和。
  15. 如請求項14所述之電致發光顯示器，其中該第二組電晶體包含該第一電晶體、一第四電晶體及一第五電晶體，且該補償電壓是該第一、第四與第五電晶體之該閾值電壓的總和。
  16. 如請求項11所述之電致發光顯示器，其中該每一像素單元還包含另一電晶體，用以回應一第一控制信號，以重置該電容器之該第一端的一電壓位準。
  17. 如請求項11所述之電致發光顯示器，其中該每一像素單元還包含複數個電晶體，用以回應一第二控制信號，以透過該第一組電晶體而使該資料儲存於該電容器中
  18. 如請求項11所述之電致發光顯示器，其中該每一像素單元還包含複數個電晶體，用以回應一第三控制信號，以使該電流透過該第二組電晶體流經該EL裝置。
  19. 一種電致發光(EL)顯示器的電壓補償方法，該EL顯示器包含複數個像素單元，該些像素單元各別包含一電容器、一EL裝置、一第一組電晶體及一第二組電晶體，該方法包含： 於一第一階段中，重置該電容器之一第一端的一電壓位準； 於一第二階段中，將資料儲存於該電容器中，該資料係透過該第一組電晶體所接收； 於該第二階段中，產生一補償電壓，其係由該第一組電晶體中每一電晶體的一閾值電壓所構成；以及 於一第三階段中，使一電流透過該第二組電晶體流經該EL裝置，該電流大小與該第二組電晶體中每一電晶體之一閾值電壓無關。
  20. 如請求項19所述之方法，其中該補償電壓等於該第二組電晶體中每一電晶體之該閾值電壓的總和。
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