WO2016050021A1 - 一种像素驱动电路及其驱动方法、像素单元、显示装置 - Google Patents

一种像素驱动电路及其驱动方法、像素单元、显示装置 Download PDF

Info

Publication number
WO2016050021A1
WO2016050021A1 PCT/CN2015/071735 CN2015071735W WO2016050021A1 WO 2016050021 A1 WO2016050021 A1 WO 2016050021A1 CN 2015071735 W CN2015071735 W CN 2015071735W WO 2016050021 A1 WO2016050021 A1 WO 2016050021A1
Authority
WO
WIPO (PCT)
Prior art keywords
transistor
voltage
gate
pole
input
Prior art date
Application number
PCT/CN2015/071735
Other languages
English (en)
French (fr)
Inventor
龙春平
田宏伟
Original Assignee
京东方科技集团股份有限公司
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 京东方科技集团股份有限公司 filed Critical 京东方科技集团股份有限公司
Publication of WO2016050021A1 publication Critical patent/WO2016050021A1/zh

Links

Images

Classifications

    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
    • G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
    • G09G3/32—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
    • G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
    • G09G3/32—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
    • G09G3/3208—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED]
    • G09G3/3225—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix
    • G09G3/3233—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix with pixel circuitry controlling the current through the light-emitting element

Definitions

  • the present invention relates to the field of display technologies, and in particular, to a pixel driving circuit and a driving method thereof, a pixel unit, and a display device.
  • OLED Organic Light Emitting Diode
  • An OLED display can be constructed by using the above OLED device, and a plurality of TFTs (Thin Film Transistors) are disposed on the array substrate of the display.
  • TFTs Thin Film Transistors
  • the above TFT is generally formed using polysilicon.
  • the TFT switching circuit fabricated on a large-area glass substrate often fluctuates in electrical parameters such as threshold voltage Vth, mobility, etc., so that the current flowing through the OLED device not only follows
  • the change in the on-voltage stress generated by the long-time conduction of the TFT changes, and it also varies depending on the threshold voltage Vth of the TFT.
  • the brightness uniformity and brightness constancy of the display will be affected, thereby reducing the picture quality and quality of the display.
  • Embodiments of the present invention provide a pixel driving circuit and a driving method thereof, a pixel unit, and a display device, which are capable of improving a phenomenon in which display brightness is uneven.
  • An aspect of an embodiment of the present invention provides a pixel driving circuit for driving a light emitting device, where the pixel driving circuit includes:
  • a gate of the first transistor is connected to an input end of the illumination control signal, a first pole is connected to one end of the storage capacitor, and a second pole is connected to a reference voltage end;
  • a gate of the second transistor is connected to a reset signal input end, and a first pole is connected to the The other end of the storage capacitor is connected to the reference voltage terminal;
  • a gate of the third transistor is connected to the gate line, a first pole is connected to the data line, and a second pole is connected to the one end of the storage capacitor;
  • a gate of the fourth transistor is connected to the gate line, and a first pole is connected to the other end of the storage capacitor;
  • a gate of the fifth transistor is connected to the other end of the storage capacitor, a first pole is connected to the first voltage end, and a second pole is connected to the second pole of the fourth transistor;
  • a gate of the sixth transistor is connected to the light-emitting control signal input end, a first pole is connected to a second pole of the fifth transistor, and a second pole is connected to the light-emitting device.
  • Another aspect of the present invention provides a pixel unit including a light emitting device and a pixel unit driving circuit, wherein the pixel unit driving circuit is connected to one end of the light emitting device to drive the light emitting device to emit light according to the input data and the scan signal. .
  • Another aspect of an embodiment of the present invention provides a display device including a pixel unit as described above.
  • Another aspect of the present invention provides a pixel circuit driving method for driving the above pixel driving circuit, the method comprising:
  • a writing phase wherein the third transistor is turned on, the data voltage input to the data line is transmitted to the second electrode of the third transistor through the third transistor, and is saved to the storage capacitor; and the fourth transistor is turned on Turning on the gate and the second pole of the fifth transistor to write a data voltage to the gate of the fifth transistor;
  • Embodiments of the present invention provide a pixel circuit, a driving method thereof, and a display device, wherein the pixel circuit performs switching, charging and discharging control on a circuit through a plurality of transistors and a storage capacitor.
  • the pixel circuit performs switching, charging and discharging control on a circuit through a plurality of transistors and a storage capacitor.
  • One end of the fifth transistor for driving the transistor is directly connected to the first voltage terminal, and a reference voltage is introduced in the pixel circuit, so that the driving current flowing through the light emitting device is only related to the above reference voltage and the data voltage input by the data line. Therefore, not only can the light-emitting device be prevented from being affected by the threshold voltage, but also the ohmic voltage drop at the first voltage terminal can be prevented from affecting the driving current flowing through the light-emitting device.
  • the pixel circuit provided by the present invention can improve the uniformity of display brightness of the display device.
  • FIG. 1 is a schematic structural diagram of a pixel circuit according to an embodiment of the present invention.
  • FIG. 2 is a timing diagram of control signals of a pixel circuit according to an embodiment of the present invention.
  • FIG. 3 is a schematic diagram of connection of a pixel circuit at various stages according to an embodiment of the present invention
  • FIG. 6 is a flowchart of a driving method of a pixel circuit according to an embodiment of the present invention.
  • Embodiments of the present invention provide a pixel driving circuit for driving a light emitting device.
  • a pixel driving circuit may include a first transistor T1, a second transistor T2, a third transistor T3 transistor, a fourth transistor T4, a fifth transistor T5, a sixth transistor T6, and a storage capacitor. Cst.
  • the switching transistor and the driving transistor used in all embodiments of the present invention may be thin film transistors or field effect transistors or other devices having the same characteristics. Since the source and drain of the switching transistor used here are symmetrical, the source and the drain can be interchanged. In the embodiment of the present invention, in order to distinguish the transistor from the gate The outer two poles, one of which is called the first pole and the other is called the second pole. According to the form in the drawing, the middle end of the transistor is the gate, the signal input end is the first pole, and the signal output end is the second pole.
  • the switching transistor used in the embodiment of the present invention may be a P-type switching transistor or an N-type switching transistor, wherein the P-type switching transistor is turned on when the gate is at a low level, and is turned off when the gate is at a high level.
  • the N-type switching transistor is turned on when the gate is at a high level and turned off when the gate is at a low level.
  • the drive transistor includes a P type and an N type.
  • the gate of the first transistor T1 is connected to the light-emitting control signal input terminal Em, the first pole is connected to one end of the storage capacitor Cst (node a), and the second pole is connected to the reference voltage terminal Vref.
  • the gate of the second transistor T2 is connected to the reset signal input terminal Reset to receive the reset signal, the first pole is connected to the other end of the storage capacitor Cst (node b), and the second pole is connected to the reference voltage terminal Vref.
  • the gate of the third transistor T3 is connected to the gate line Gate to receive the gate scan signal, the first pole is connected to the data line Data to receive the display data, and the second pole is connected to one end (node a) of the storage capacitor Cst.
  • the gate of the fourth transistor T4 is connected to the gate line Gate, the first pole is connected to the other end (node b) of the storage capacitor Cst, and the second pole is connected to the second pole of the fifth transistor T5.
  • the gate of the fifth transistor T5 is connected to the other end (node b) of the storage capacitor Cst, the first pole (node c) is connected to the first voltage terminal Vdd, and the second pole (node d) is connected to the second pole of the fourth transistor T4. connection.
  • the fifth transistor T5 functions as a driving transistor.
  • the gate of the sixth transistor T6 is connected to the light emission control signal input terminal Em to receive the light emission control signal, the first electrode is connected to the second electrode of the fifth transistor T5, and the second electrode is connected to the anode of the light emitting device D.
  • the cathode of the light emitting device D is connected to the second voltage terminal Vss.
  • the light-emitting device D in the embodiment of the present invention may be a plurality of conventional current-driven light-emitting devices including an LED (Light Emitting Diode) or an OLED (Organic Light Emitting Diode).
  • LED Light Emitting Diode
  • OLED Organic Light Emitting Diode
  • an OLED is taken as an example for description.
  • Embodiments of the present invention provide a pixel driving circuit that performs switching, charging, and discharging control on a circuit through a plurality of transistors and a storage capacitor.
  • the first pole of the fifth transistor as the driving transistor is directly connected to the first voltage terminal Vdd.
  • the reference voltage Vref is introduced in the pixel driving circuit such that the driving current flowing through the light emitting device is related only to the above reference voltage and the data voltage input to the data line. This not only prevents the illuminating device from being affected by the threshold voltage, but also avoids the ohmic voltage drop at the first voltage terminal. It affects the drive current flowing through the light emitting device.
  • the pixel driving circuit provided by the present invention can improve the uniformity of display brightness of the display device.
  • a P-type transistor is taken as an example for description.
  • an embodiment of the present invention may be implemented by using an “N”-type transistor, that is, the types of the respective switching transistors and driving transistors provided by the embodiments of the present invention. Without limitation, it is only necessary to adjust the level signal applied by the transistor gate accordingly. Any combination that can be obviously conceived and realized by those skilled in the art based on the pixel driving circuit and the driving method provided by the embodiments of the present invention is within the protection scope of the present invention.
  • the voltage input by the first voltage terminal Vdd may be a high voltage
  • the voltage input by the second voltage terminal Vss may be a low voltage or a ground.
  • the first transistor T1, the second transistor T2, the third transistor T3, the fourth transistor T4, the fifth transistor T5, and the sixth transistor T6 may all be P-type transistors.
  • the first transistor T1, the second transistor T2, the third transistor, the fourth transistor T4, the fifth transistor T5, and the sixth transistor T5 may also be N-type transistors.
  • the driving transistors in the pixel driving circuit described above may be classified into an enhancement transistor and a depletion transistor depending on the manner in which the transistors are electrically conductive.
  • the threshold voltage Vth is a positive value
  • the threshold voltage Vth is a negative value.
  • the first transistor T1, the second transistor T2, the third transistor T3, the fourth transistor T4, the fifth transistor T5, and the sixth transistor T6 are all P-type depletion transistors as an example.
  • the first extreme source level of the first transistor T1, the second transistor T2, the third transistor T3, the fourth transistor T4, the fifth transistor T5, and the sixth transistor T6 is the second drain level.
  • the voltage signal input from the reference voltage terminal Vref is a low voltage
  • the threshold voltage Vth is a negative value.
  • the external control signal of the pixel driving circuit can be changed accordingly according to the disclosure of the embodiments of the present invention.
  • the voltage signal required to be input by the above reference voltage terminal Vref is at a high level and the timing of each of the control signals is opposite to the corresponding signal timing shown in FIG. 2 (ie, the phase difference between the two is 180 degrees).
  • the working process thereof can be specifically divided into three stages, including a reset phase P1, a writing phase P2, and a lighting phase P3.
  • the equivalent circuit diagram of the reset phase P1 is shown in Figure 3.
  • the actual power-on line and the device are indicated by solid lines, and the unpowered parts are indicated by broken lines.
  • the following equivalent circuit diagrams are the same as the figure.
  • the reset signal terminal Reset inputs a low level, turns on the second transistor T2, and the gate voltage Vg of the fifth transistor T5 is set to a voltage input by the reference voltage terminal Vref, and stores the voltage in the storage. Capacitor Cst. Since the reference voltage Vref is at a low level, the gate voltage Vg of the fifth transistor T5 as a driving transistor can be reset. In this case, the fifth transistor T5 is in an off state.
  • the voltage signal input by the gate line Gate and the voltage signal input from the light-emitting control signal input terminal Em are at a high level. Therefore, the third transistor T3, the fourth transistor T4, the first transistor T1, and the sixth transistor T6 are all in an off state.
  • the equivalent circuit diagram of the writing phase P2 is shown in FIG.
  • the gate line Gate is input with a low level
  • the third transistor T3 and the fourth transistor T4 are turned on
  • the data voltage Vdata input by the data line is transmitted to the node a through the third transistor T3, and stored in the storage capacitor Cst. in.
  • the drain (node d) of the fifth transistor T5 is turned on to the gate to be in a diode-connected state.
  • the level of the threshold voltage Vth of the fifth transistor T5 itself is lower than the voltage input from the first voltage terminal Vdd, and the level of the threshold voltage Vth of the fifth transistor T5 is written to the gate of the fifth transistor T5.
  • the gate voltage Vg of the fifth transistor T5 as the driving transistor is Vdd-(-Vth).
  • the threshold voltage Vth is a negative value.
  • the voltage signal input by the reset signal terminal Reset and the voltage signal input by the light-emitting control signal input terminal Em are at a high level. Therefore, the second transistor T2, the first transistor T1, and the sixth transistor T6 are in an off state.
  • the equivalent circuit diagram of the illumination phase P3 is shown in FIG. 5.
  • the input terminal of the illumination control signal Em inputs a low level, and the first transistor T1 and the sixth transistor T6 are turned on, and the voltage input by the reference voltage terminal Vref is stored in the storage capacitor Cst through the node a, due to the storage capacitor.
  • the bootstrap action of Cst causes node b to generate a voltage increment of size Vref-Vdata.
  • the magnitude of the gate voltage Vg of the fifth transistor T5 is increased by Vref-Vdata, specifically:
  • Vg(T5) Vref-Vdata+Vdd-(-Vth);
  • the gate-source voltage Vgs of the fifth transistor T5 (ie, the voltage difference between the voltage of the gate node b and the source node c) is:
  • the drive current I flowing through the fifth transistor T5 is:
  • the driving current I drives the light emitting device D to emit light.
  • the driving current I flowing through the fifth transistor T5 is independent of the threshold voltage Vth of the fifth transistor T5, and therefore, the above pixel driving circuit can prevent the light emitting device D from being affected by the threshold voltage.
  • the above-described drive current I is independent of the voltage input from the first voltage terminal Vdd. If the driving current I of the OLED device is related to the signal input by the first voltage terminal Vdd during the above compensation process, when the OLED device is emitting light, a current always flows through the first voltage terminal Vdd, thereby causing an ohmic voltage drop. (IR Drop), so that adjacent pixels have a part of the signal input by the first voltage terminal Vdd, thus causing the driving current I flowing through the OLED device to drop and gray scale distortion to occur. Therefore, the above pixel driving circuit can avoid the influence of the ohmic voltage drop generated by the first voltage terminal Vdd on the light emitting device D.
  • the source of the fifth transistor T5 is directly connected to the first voltage terminal Vdd. If an additional transistor is disposed between the fifth transistor T5 and the first voltage terminal Vdd, the current flowing through the additional transistor also generates a voltage drop Vds' at the source and drain terminals thereof, thereby the gate-source voltage of the fifth transistor T5.
  • Vgs should be Vdata+Vth-Vdd-Vds'.
  • the size of Vds' is determined by the current flowing through the above additional transistors (i.e., the drive current I of the OLED device).
  • the driving current I of the OLED device is also controlled by the data voltage Vdata, whereby the gate-source voltage Vgs of the fifth transistor T5 will exhibit a nonlinear change, resulting in gray scale distortion of the pixel display. Thereby adversely affecting the quality and display effect of the display device. Therefore, the above pixel driving circuit can eliminate the transistor located between the fifth transistor T5 and the first voltage terminal Vdd, causing the fifth transistor T5 as the driving transistor to have a nonlinear change in the gate-source voltage Vgs, and to flow through the light-emitting device D.
  • the drive current I has an effect.
  • the pixel driving circuit provided by the embodiment of the invention can improve the uniformity of display brightness of the display device.
  • the voltage signal input by the gate line Gate and the reset signal terminal Reset input The voltage signal is high. Therefore, the third transistor T3 and the fourth transistor T4 are in an off state with the second transistor T2.
  • Embodiments of the present invention also provide a display device including an array of a plurality of pixel units, each of which includes any one of the pixel driving circuits and the light emitting device as described above.
  • the same advantages are obtained from the pixel driving circuit provided by the foregoing embodiments of the present invention. Since the pixel driving circuit has been described in detail in the foregoing embodiments, details are not described herein again.
  • the display device provided by the embodiment of the present invention may be a display device having a current-driven light-emitting device including an LED display or an OLED display.
  • Embodiments of the present invention provide a pixel circuit driving method, which can be used to drive a pixel driving circuit as shown in FIG. 1. As shown in FIG. 6, the method may include:
  • the second transistor T2 is turned on, and the voltage signal input from the reference voltage terminal Vef is transmitted to the gate of the fifth transistor T5 and stored in the storage capacitor Cst.
  • the third transistor T3 is turned on, and the data voltage Vdata input from the data line Data is transmitted to the second electrode (drain) of the third transistor T3 through the third transistor T3, and is saved to the storage capacitor Cst.
  • the fourth transistor T4 turning on the gate and the second pole (drain) of the fifth transistor T5, and performing voltage writing on the gate of the fifth transistor T5.
  • Embodiments of the present invention provide a pixel driving circuit driving method for switching, charging, and discharging a circuit by using a plurality of transistors and a storage capacitor in a pixel driving circuit.
  • the second transistor is turned on, and the voltage signal input from the reference voltage terminal is transmitted to the gate of the fifth transistor, and stored in the storage capacitor to reset the gate of the fifth transistor to avoid the previous frame signal to the frame.
  • the signal is affected; then, the third transistor is turned on, the data voltage input to the data line is transmitted to the second electrode of the third transistor through the third transistor, and is saved to the storage capacitor; and the fourth transistor is turned on, thereby conducting The gate of the five transistors and the second pole.
  • the magnitude of the voltage written to the gate of the fifth transistor is the voltage input from the first voltage terminal minus the threshold voltage of the fifth transistor; finally, the first transistor, the fifth transistor, and the sixth transistor are turned on, and the fifth pass
  • the current of the transistor and the sixth transistor drive the light emitting device to emit light. Therefore, the driving current flowing through the light emitting device is only related to the reference voltage and the data voltage input by the data line, thereby not only preventing the light emitting device from being affected by the threshold voltage, but also avoiding the ohmic voltage drop at the first voltage terminal from flowing through the light emitting device.
  • the current has an effect.
  • the control method of the pixel driving circuit provided by the embodiment of the present invention can improve the uniformity of display brightness of the display device.
  • the pixel driving circuit in the following embodiments is an example in which the first transistor T1, the second transistor T2, the third transistor T3, the fourth transistor T4, the fifth transistor T5, and the sixth transistor T6 are all P-type depletion transistors. Be explained.
  • the timing of the control signal in the driving method of the pixel driving circuit described above may include a reset phase P1, a writing phase P2, and an emission phase P3.
  • the voltage signal input by the reset signal terminal Reset is low level
  • the voltage signal input by the gate line Gate is high-voltage. level.
  • the reset signal terminal Reset inputs a low level, turns on the second transistor T2, and the gate voltage Vg of the fifth transistor T5 is set to a voltage input by the reference voltage terminal Vref, and stores the voltage.
  • the storage capacitor Cst Since the reference voltage Vref is at a low level, the gate voltage Vg of the fifth transistor T5 as a driving transistor can be reset. In this case, the fifth transistor T5 is in an off state.
  • the third transistor T3, the fourth transistor T4, the first transistor T1, and the sixth transistor T6 are all in an off state.
  • the voltage signal input by the gate line Gate is a low level
  • the data voltage Vdata input by the data line Data is high-voltage. level.
  • the gate line Gate is input with a low level
  • the third transistor T3 and the fourth transistor T4 are turned on
  • the data voltage Vdata input by the data line is transmitted to the node a through the third transistor T3, and stored in the storage.
  • Capacitor Cst In the case where the fourth transistor T4 is turned on, the drain (node d) of the fifth transistor T5 is turned on with the gate, so that the fifth transistor is in a diode-connected state.
  • the voltage input by the first voltage terminal Vdd passes through the fifth transistor T5, and is lower than the voltage input by the first voltage terminal Vdd by a fifth crystal.
  • the level of the threshold voltage Vth of the body tube T5 itself is written to the gate of the fifth transistor T5.
  • the gate voltage Vg of the fifth transistor T5 as the drive transistor is Vdd-(-Vth).
  • the threshold voltage Vth is a negative value.
  • the second transistor T2 Since the voltage signal input by the reset signal terminal Reset and the voltage signal input by the light-emitting control signal input terminal Em are at a high level, the second transistor T2, the first transistor T1, and the sixth transistor T6 are in an off state.
  • the data voltage input by the data line Data and the voltage signal input by the light-emitting control signal input terminal Em are at a low level, and the voltage signal input by the gate line Gate and the voltage signal input by the reset signal terminal are at a high level. .
  • the equivalent circuit diagram of this stage is shown in FIG. 5.
  • the input end of the illumination control signal Em inputs a low level, and the first transistor T1 and the sixth transistor T6 are turned on, and the reference voltage terminal Vref is input.
  • the voltage is stored in the storage capacitor Cst through the node a. Due to the bootstrap action of the storage capacitor Cst, the node b generates a voltage increment of a size of Vref-Vdata.
  • the magnitude of the gate voltage Vg of the fifth transistor T5 is increased by Vref-Vdata, specifically:
  • Vg(T5) Vref-Vdata+Vdd-(-Vth);
  • the gate-source voltage Vgs of the fifth transistor T5 (ie, the voltage difference between the voltage of the gate node b and the source node c) is:
  • the drive current I flowing through the fifth transistor T5 is:
  • the driving current I drives the light emitting device D to emit light.
  • the driving current I flowing through the fifth transistor T5 is independent of the threshold voltage Vth of the fifth transistor, and therefore, the above pixel driving circuit can prevent the light emitting device D from being affected by the threshold voltage.
  • the above-described drive current I is independent of the voltage input from the first voltage terminal Vdd. If the driving current I of the OLED device is related to the signal input by the first voltage terminal Vdd during the above compensation process, when the OLED device is emitting light, a current always flows through the first voltage terminal Vdd, thereby causing an ohmic voltage drop. (IRDrop), such that adjacent pixels have a portion of the signal input by the first voltage terminal Vdd, thus causing the drive current I flowing through the OLED device to drop and gray scale distortion to occur. Therefore, the above pixel driving circuit can avoid the influence of the ohmic voltage drop generated by the first voltage terminal Vdd on the light emitting device D.
  • the source of the fifth transistor T5 is directly connected to the first voltage terminal Vdd. If an additional transistor (not shown) is disposed between the fifth transistor T5 and the first voltage terminal Vdd, the current flowing through the additional transistor also generates a voltage drop Vds' at the source and drain terminals thereof. Therefore, the fifth transistor The gate-source voltage Vgs of T5 should be Vdata+Vth-Vdd-Vds'.
  • Vds' is determined by the current flowing through the above additional transistors (ie, the driving current I of the OLED device), whereas the driving current I of the OLED device is also controlled by the data voltage Vdata, so the gate-source voltage Vgs of the fifth transistor T5 will A non-linear change occurs, causing grayscale distortion in the pixel display. Thereby adversely affecting the quality and display effect of the display device. Therefore, the pixel driving circuit can eliminate the transistor located between the fifth transistor T5 and the first voltage terminal Vdd in the prior art to cause the fifth transistor T5 as the driving transistor, and the gate-source voltage Vgs exhibits a nonlinear change, and the pair flows through the light.
  • the drive current I of device D has an effect.
  • the pixel driving circuit provided by the embodiment of the invention can improve the uniformity of display brightness of the display device.
  • the voltage signal input by the gate line Gate and the voltage signal input by the reset signal terminal Reset are at a high level. Therefore, the third transistor T3 and the fourth transistor T4 are in an off state with the second transistor T2.
  • the foregoing program may be stored in a computer readable storage medium, and the program is executed when executed.
  • the foregoing steps include the steps of the foregoing method embodiments; and the foregoing storage medium includes: a medium that can store program codes, such as a ROM, a RAM, a magnetic disk, or an optical disk.

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • General Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Control Of Indicators Other Than Cathode Ray Tubes (AREA)
  • Electroluminescent Light Sources (AREA)
  • Control Of El Displays (AREA)

Abstract

一种像素驱动电路及其驱动方法、像素单元和显示装置。像素驱动电路包括：第一晶体管(T1)，第二晶体管(T2)，第三晶体管(T3)，第四晶体管(T4)，第五晶体管(T5)，第六晶体管(T6)以及存储电容(Cst)，通过第一至第六晶体管(T1-T6)和存储电容(Cst)对电路进行开关和充放电，能够避免发光器件(D)受到阈值电压影响，还可以当第一电压端(Vdd)的欧姆电压降以及第五晶体管(T5)的栅源电压出现非线性变化时减小对流过发光器件(D)的驱动电流产生的影响。

Description

一种像素驱动电路及其驱动方法、像素单元、显示装置 技术领域
本发明涉及显示技术领域，尤其涉及一种像素驱动电路及其驱动方法、像素单元和显示装置。
背景技术
Organic Light Emitting Diode，OLED)作为一种电流型发光器件，因其所具有的自发光、快速响应、宽视角和可制作在柔性衬底上等特点而越来越多地被应用于高性能显示领域当中。
采用上述OLED器件可以构成OLED显示器，该显示器的阵列基板上设置有多个TFT(Thin Film Transistor，薄膜晶体管)。为了提高TFT的载流子迁移率，并降低电阻率，使得通过相同电流时，功耗较小。一般采用多晶硅构成上述TFT。然而由于生产工艺和多晶硅的特性，导致在大面积玻璃基板上制作的TFT开关电路时，常常在诸如阈值电压Vth、迁移率等电学参数上出现波动，从而使得流经OLED器件的电流不仅会随着TFT长时间导通所产生的导通电压应力的变化而改变，而且其还会随着TFT的阈值电压Vth漂移而有所不同。如此一来，将会影响到显示器的亮度均匀性与亮度恒定性，从而降低显示器的画面品质和质量。
发明内容
本发明的实施例提供一种像素驱动电路及其驱动方法、像素单元和显示装置，能够改善显示器显示亮度不均匀的现象。
本发明实施例的一个方面提供一种像素驱动电路，用于对发光器件进行驱动，所述像素驱动电路包括：
存储电容；
第一晶体管，所述第一晶体管的栅极连接发光控制信号输入端，第一极连接所述存储电容的一端，第二极与参考电压端相连接；
第二晶体管，所述第二晶体管的栅极连接复位信号输入端，第一极连接所述 存储电容的另一端，第二极与所述参考电压端相连接；
第三晶体管，所述第三晶体管的栅极连接栅线，第一极连接数据线，第二极与所述存储电容的所述一端相连接；
第四晶体管，所述第四晶体管的栅极连接所述栅线，第一极连接所述存储电容的所述另一端；
第五晶体管，所述第五晶体管的栅极连接所述存储电容的另一端，第一极连接第一电压端，第二极与所述第四晶体管的第二极相连接；
第六晶体管，所述第六晶体管的栅极连接所述发光控制信号输入端，第一极连接所述第五晶体管的第二极，第二极与所述发光器件相连。
本发明实施例的另一方面提供了一种像素单元，包括发光器件和上述像素单元驱动电路，该像素单元驱动电路与发光器件的一端相连，以根据输入数据和扫描信号驱动所述发光器件发光。
本发明实施例的另一方面提供了一种显示装置，包括如上所述的一种像素单元。
本发明实施例的另一方面提供了一种像素电路驱动方法，用于驱动上述像素驱动电路，所述方法包括：
重置阶段，其中导通第二晶体管，将参考电压端输入的参考电压信号传输至第五晶体管的栅极，并存入存储电容中；
写入阶段，其中导通第三晶体管，将数据线输入的数据电压通过所述第三晶体管传输至所述第三晶体管的第二极，并保存至所述存储电容中；导通第四晶体管，导通所述第五晶体管的栅极和第二极，将数据电压写入所述第五晶体管的栅极；
发光阶段，其中导通第一晶体管、所述第五晶体管和第六晶体管，使得通过所述第五晶体管和所述第六晶体管的电流驱动发光器件发光
本发明实施例提供一种像素电路及其驱动方法、显示装置，其中所述像素电路通过多个晶体管以及一个存储电容对电路进行开关和充放电控制。具体的，作 为驱动晶体管的第五晶体管的一端直接与第一电压端连接，并在像素电路中引入参考电压，使得流过发光器件的驱动电流仅于上述参考电压和数据线输入的数据电压有关。因此，不仅能够避免发光器件受到阈值电压影响，还可以避免第一电压端的欧姆电压降对流过发光器件的驱动电流产生影响。此外，由于第五晶体管直接与第一电压端相连接，避免了第五晶体管的栅源电压出现非线性变化导致对流过发光器件的驱动电流产生影响。综上所述，本发明提供的像素电路能够改善显示装置显示亮度的均匀性。
附图说明
为了更清楚地说明本发明实施例的技术方案，下面将对实施例描述中所需要使用的附图作简单地介绍。显而易见地，下面描述中的附图仅仅是本发明的一些实施例，对于本领域普通技术人员来讲，在不付出创造性劳动的前提下，还可以根据这些附图获得其他的附图。
图1为本发明实施例提供的一种像素电路的结构示意图；
图2为本发明实施例提供的一种像素电路的控制信号时序图；
图3-图5为本发明实施例提供的一种像素电路在各个阶段的连接示意图；
图6为本发明实施例提供的一种像素电路的驱动方法流程图。
具体实施方式
下面将结合本发明实施例中的附图，对本发明实施例中的技术方案进行描述。显然，所描述的实施例仅仅是本发明一部分实施例，而不是全部的实施例。基于本发明中的实施例，本领域普通技术人员在没有做出创造性劳动前提下所获得的所有其他实施例，都属于本发明保护的范围。
本发明实施例提供了一种像素驱动电路，用于驱动发光器件。如图1所示，根据本发明实施例的像素驱动电路可以包括第一晶体管T1、第二晶体管T2、第三晶体T3管、第四晶体管T4、第五晶体管T5、第六晶体管T6、存储电容Cst。
本发明所有实施例中采用的开关晶体管和驱动晶体管均可以为薄膜晶体管或场效应管或其他特性相同的器件。由于这里采用的开关晶体管的源极、漏极是对称的，所以其源极、漏极可以互换。在本发明实施例中，为区分晶体管除栅极之 外的两极，将其中一个电极称为第一极，另一电极称为第二极。按附图中的形态规定晶体管的中间端为栅极、信号输入端为第一极、信号输出端为第二极。本领域技术人员可以理解，本发明实施例所采用的开关晶体管可以是P型开关晶体管或N型开关晶体管，其中，P型开关晶体管在栅极为低电平时导通，在栅极为高电平时截止，N型开关晶体管为在栅极为高电平时导通，在栅极为低电平时截止。驱动晶体管包括P型和N型。
第一晶体管T1的栅极连接发光控制信号输入端Em，第一极连接存储电容Cst的一端(节点a)，第二极与参考电压端Vref相连接。
第二晶体管T2的栅极连接复位信号输入端Reset以接收复位信号，第一极连接存储电容Cst的另一端(节点b)，第二极与所述参考电压端Vref相连接。
第三晶体管T3的栅极连接栅线Gate以接收栅极扫描信号，第一极连接数据线Data以接收显示数据，第二极与所述存储电容Cst的一端(节点a)相连接。
第四晶体管T4的栅极连接栅线Gate，第一极连接存储电容Cst的另一端(节点b)，第二极与所述第五晶体管T5的第二极相连接。
第五晶体管T5的栅极连接存储电容Cst的另一端(节点b)，第一极(节点c)连接第一电压端Vdd，第二极(节点d)与第四晶体管T4的第二极相连接。第五晶体管T5用作驱动晶体管。
第六晶体管T6的栅极连接所述发光控制信号输入端Em以接收发光控制信号，第一极连接第五晶体管T5的第二极，第二极连接发光器件D的阳极。
发光器件D的阴极连接第二电压端Vss。
需要说明的是，本发明实施例中的发光器件D可以是包括LED(Light Emitting Diode，发光二极管)或OLED(Organic Light Emitting Diode，有机发光二极管)在内的多种传统电流驱动发光器件。在本发明实施例中，以OLED为例进行说明。
本发明实施例提供一种像素驱动电路，通过多个晶体管以及一个存储电容对电路进行开关和充放电控制。具体的，作为驱动晶体管的第五晶体管的第一极直接与第一电压端Vdd连接。此外，在像素驱动电路中引入参考电压Vref，使得流过发光器件的驱动电流仅于上述参考电压和数据线输入的数据电压有关。由此不仅能够在避免发光器件受到阈值电压影响，还可以避免第一电压端的欧姆电压降 对流过发光器件的驱动电流产生影响。此外，由于第五晶体管直接与第一电压端相连接，避免了由于第五晶体管的栅源电压出现非线性变化导致对流过发光器件的驱动电流产生影响。综上所述，本发明提供的像素驱动电路能够改善显示装置显示亮度的均匀性。
需要说明的是，以下实施例中以P型晶体管为例来进行描述，当然可以使用“N”型晶体管来实现本发明实施例，即本发明实施例对提供的各个开关晶体管和驱动晶体管的类型不做限制，只需相应调整晶体管栅极施加的电平信号即可。本领域技术人员在本发明实施例提供的像素驱动电路和驱动方法的基础上可显而易见地设想并实现的任一组合均在本发明的保护范围内。在本发明实施例中，第一电压端Vdd输入的电压可以是高电压，第二电压端Vss输入的电压可以是低电压或接地端。
因此对于上述像素驱动电路中的晶体管而言，第一晶体管T1、第二晶体管T2、第三晶体管T3、第四晶体管T4、第五晶体管T5和第六晶体管T6可以均为P型晶体管。当然，第一晶体管T1、第二晶体管T2、第三晶体管、第四晶体管T4、第五晶体管T5和第六晶体管T5也可以均为N型晶体管。
此外，根据晶体管导电方式的不同，可以将上述像素驱动电路中的驱动晶体管分为增强型晶体管和耗尽型晶体管。对于增强型TFT，阈值电压Vth为正值，而对于耗尽型TFT，阈值电压Vth为负值。
以下本发明实施例是以第一晶体管T1、第二晶体管T2、第三晶体管T3、第四晶体管T4、第五晶体管T5和第六晶体管T6均为P型耗尽型晶体管为例进行的说明。其中，第一晶体管T1、第二晶体管T2、第三晶体管T3、第四晶体管T4、第五晶体管T5和第六晶体管T6的第一极为源级，第二极为漏级。在此情况下，上述参考电压端Vref输入的电压信号为低电压，且阈值电压Vth为负值。本领域技术人员可以理解，当采用不同类型的晶体管时，例如当第一晶体管T1、第二晶体管T2、第三晶体管T3、第四晶体管T4、第五晶体管T5和第六晶体管T6均为N型晶体管时，可以根据本发明实施例的公开相应改变像素驱动电路的外部控制信号。以及上述参考电压端Vref需要输入的电压信号为高电平并且其各个控制信号的时序与图2中所示的相应的信号时序相反(即二者的相位差为180度)。
以下结合时序图2对本发明实施例提供的像素驱动电路的工作过程进行详细的说明。
当图1所示的像素驱动电路工作时，其工作过程具体可以分为三个阶段，包括重置阶段P1、写入阶段P2和发光阶段P3。
重置阶段P1的等效电路图如图3所示。其中，实际通电线路和器件采用实线表示，未通电的部分采用虚线表示，以下各等效电路图与该图表示方式相同。在重置阶段P1，复位信号端Reset输入低电平，将第二晶体管T2导通，第五晶体管T5的栅极电压Vg被设置为参考电压端Vref输入的电压，并将该电压存储于存储电容Cst中。由于参考电压Vref为低电平，因此可以将作为驱动晶体管的第五晶体管T5的栅极电压Vg进行复位。在此情况下，第五晶体管T5处于截止状态。
由于栅线Gate输入的电压信号以及发光控制信号输入端Em输入的电压信号为高电平。因此第三晶体管T3、第四晶体管T4、第一晶体管T1以及第六晶体管T6均处于截止状态。
在这一阶段，由于第五晶体管T5的栅极电压Vg被复位，从而使得像素驱动电路的节点b上残留的上一帧电压信号得以释放，避免了上一帧的残留电压信号对下一帧电压信号的不良影响，确保了节点b电位的稳定性。
写入阶段P2的等效电路图如图4所示。在该阶段中，栅线Gate输入低电平，将第三晶体管T3和第四晶体管T4导通，数据线输入的数据电压Vdata通过第三晶体管T3传榆至节点a，并存储于存储电容Cst中。在第四晶体管T4导通的情况下，第五晶体管T5的漏极(节点d)与栅极导通，使其处于二极管连接状态。第一电压端Vdd输入的电压经过第五晶体管T5后，将比第一电压端Vdd输入的电压低一个第五晶体管T5自身的阈值电压Vth的电平写入第五晶体管T5的栅极，此时，作为驱动晶体管的第五晶体管T5的栅极电压Vg为Vdd-(-Vth)。其中，由于第五晶体管T5为P型耗尽型晶体管，因此上述阈值电压Vth为负值。
由于复位信号端Reset输入的电压信号以及发光控制信号输入端Em输入的电压信号为高电平。因此，第二晶体管T2、第一晶体管T1以及第六晶体管T6处于截止状态。
发光阶段P3的等效电路图如图5所示。在该阶段中，发光控制信号Em输入端输入低电平，将第一晶体管T1和第六晶体管T6导通，参考电压端Vref输入的电压通过节点a存入存储电容Cst中，由于该存储电容Cst的自举作用，使得节点b产生一个电压增量，大小为Vref-Vdata。在此情况下，第五晶体管T5的栅极电压Vg的大小又增加了Vref-Vdata，具体的：
Vg(T5)＝Vref-Vdata+Vdd-(-Vth)；
因此，第五晶体管T5的栅源电压Vgs(即栅极节点b的电压与源极节点c之间的压差)为：
Vgs(T5)＝Vg-Vs＝Vref-Vdata+Vdd-(-Vth)-Vdd＝Vref-Vdata+Vth；
在此情况下，流过第五晶体管T5的驱动电流I为：
I＝K/2(Vgs-Vth)2＝K/2(Vref-Vdata)2。
该驱动电流I驱动发光器件D进行发光。
由此可见，一方面，流过第五晶体管T5的驱动电流I与第五晶体管T5的阈值电压Vth无关，因此，上述像素驱动电路能够避免发光器件D受到阈值电压影响。
另一方面，上述驱动电流I与第一电压端Vdd输入的电压无关。如果在上述补偿的过程中OLED器件的驱动电流I与第一电压端Vdd输入的信号有关，那么在OLED器件在发光过程中，一直会有电流流过第一电压端Vdd，从而造成欧姆电压降(IR Drop)，使得相邻像素具有第一电压端Vdd输入的一部分信号，因此导致流过OLED器件的驱动电流I下降并出现灰阶失真。所以，上述像素驱动电路可以避免由于第一电压端Vdd产生的欧姆电压降对流过发光器件D产生的影响。
又一方面，第五晶体管T5的源极直接与第一电压端Vdd相连接。如果第五晶体管T5与第一电压端Vdd之间设置有额外的晶体管，那么流过该额外晶体管的电流也在其源漏端产生电压降Vds’，由此，第五晶体管T5的栅源电压Vgs应当为Vdata+Vth-Vdd-Vds’。Vds’的大小由流过上述额外晶体管的电流(即OLED器件的驱动电流I)所决定。然而OLED器件的驱动电流I还受到数据电压Vdata的控制，由此第五晶体管T5的栅源电压Vgs将出现非线性的变化，导致像素显示出现灰阶失真。从而对显示装置的质量和显示效果产生不利的影响。因此，上述像素驱动电路能够消除位于第五晶体管T5与第一电压端Vdd之间的晶体管导致作为驱动晶体管的第五晶体管T5，其栅源电压Vgs出现非线性变化，而对流过发光器件D的驱动电流I产生影响。
综上所处，采用本发明实施例提供的像素驱动电路，可以改善了显示装置显示亮度的均匀性。
此外，在发光阶段中，栅线Gate输入的电压信号以及复位信号端Reset输入 的电压信号为高电平。因此，第三晶体管T3、第四晶体管T4以第二晶体管T2处于截止状态。
本发明实施例还提供一种显示装置，包括多个像素单元的阵列，每一个像素单元包括如上所述的任意一个像素驱动电路和发光器件。具有与本发明前述实施例提供的像素驱动电路相同的有益效果，由于像素驱动电路在前述实施例中已经进行了详细说明，此处不再赘述。
具体的，本发明实施例所提供的显示装置可以是包括LED显示器或OLED显示器在内的具有电流驱动发光器件的显示装置。
本发明实施例提供一种像素电路驱动方法，可以用于驱动如图1所示的像素驱动电路。如图6所示，所述方法可以包括：
D101、如图3所示，导通第二晶体管T2，将参考电压端Vef输入的电压信号传输至第五晶体管T5的栅极，并存入存储电容Cst中。
S102、如图4所示，导通第三晶体管T3，将数据线Data输入的数据电压Vdata通过第三晶体管T3传输至第三晶体管T3的第二极(漏极)，并保存至存储电容Cst中；导通第四晶体管T4，从而导通第五晶体管T5的栅极和第二极(漏极)，并对第五晶体管T5的栅极进行电压写入。
S103、导通第一晶体管T1、第五晶体管T5和第六晶体管T6，通过第五晶体管T5和第六晶体管T6的电流驱动发光器件D发光。
本发明实施例提供一种像素驱动电路驱动方法，通过对像素驱动电路中的多个晶体管以及一个存储电容对电路进行开关和充放电控制。首先，导通第二晶体管，将参考电压端输入的电压信号传输至第五晶体管的栅极，并存入存储电容中以对第五晶体管的栅极进行复位，避免上一帧信号对该帧信号造成影响；然后，导通第三晶体管，将数据线输入的数据电压通过第三晶体管传输至第三晶体管的第二极，并保存至存储电容中；导通第四晶体管，从而导通第五晶体管的栅极和第二极。由此，写入第五晶体管栅极的电压的大小为第一电压端输入的电压减去第五晶体管的阈值电压；最后，导通第一晶体管、第五晶体管和第六晶体管，通过第五晶体管和第六晶体管的电流驱动发光器件发光。因此，流过发光器件的驱动电流仅与上述参考电压和数据线输入的数据电压有关，从而不仅能够避免发光器件受到阈值电压影响，还可以避免第一电压端的欧姆电压降对流过发光器件的驱动电流产生影响。此外，第一电压端输入的电压直接输入至第五晶体管，从而 避免了第五晶体管的栅源电压出现非线性变化时会对流过发光器件的驱动电流产生影响。综上所述，本发明实施例提供的像素驱动电路的控制方法能够改善了显示装置显示亮度的均匀性。
以下实施例中的像素驱动电路是以第一晶体管T1、第二晶体管T2、第三晶体管T3、第四晶体管T4、第五晶体管T5和第六晶体管T6可以均为P型耗尽型晶体管为例进行说明。上述像素驱动电路的驱动方法中的控制信号的时序可以包括重置阶段P1、写入阶段P2和发光阶段P3。
在重置阶段P1中，复位信号端Reset输入的电压信号为低电平，栅线Gate输入的电压信号、数据线Data输入的数据电压Vdata以及发光控制信号输入端Em输入的电压信号为高电平。
具体的，在重置阶段P1，复位信号端Reset输入低电平，将第二晶体管T2导通，第五晶体管T5的栅极电压Vg设置为参考电压端Vref输入的电压，并将该电压存储于存储电容Cst中。由于参考电压Vref为低电平，因此可以将作为驱动晶体管的第五晶体管T5的栅极电压Vg进行复位。在此情况下，第五晶体管T5处于截止状态。
由于栅线Gate输入的电压信号以及发光控制信号输入端Em输入的电压信号为高电平，因此第三晶体管T3、第四晶体管T4、第一晶体管T1以及第六晶体管T6均处于截止状态。
在重置阶段P1中，由于第五晶体管T5的栅极电压Vg被复位，从而使得像素驱动电路的节点b上残留的上一帧电压信号得以释放，避免了上一帧的残留电压信号对下一帧电压信号的不良影响，确保了节点b电位的稳定性。
在写入阶段P2中，栅线Gate输入的电压信号为低电平，数据线Data输入的数据电压Vdata、复位信号端Reset输入的电压信号以及发光控制信号输入端Em输入的电压信号为高电平。
具体的，在该阶段中，栅线Gate输入低电平，将第三晶体管T3和第四晶体管T4导通，数据线输入的数据电压Vdata通过第三晶体管T3传输至节点a，并存储于存储电容Cst中。在第四晶体管T4导通的情况下，第五晶体管T5的漏极(节点d)与栅极导通，使第五晶体管处于二极管连接状态。第一电压端Vdd输入的电压经过第五晶体管T5后，将比第一电压端Vdd输入的电压低一个第五晶 体管T5自身的阈值电压Vth的电平写入第五晶体管T5的栅极，此时，作为驱动晶体管的第五晶体管T5的栅极电压Vg为Vdd-(-Vth)。其中，由于第五晶体管T5为P型耗尽型晶体管，因此上述阈值电压Vth为负值。
由于复位信号端Reset输入的电压信号以及发光控制信号输入端Em输入的电压信号为高电平，因此，第二晶体管T2、第一晶体管T1以及第六晶体管T6处于截止状态。
在发光阶段P3中，数据线Data输入的数据电压Vdata、发光控制信号输入端Em输入的电压信号为低电平，栅线Gate输入的电压信号、复位信号端Reset输入的电压信号为高电平。
具体的，该阶段的等效电路图如图5所示，在该阶段中，发光控制信号Em输入端输入低电平，将第一晶体管T1和第六晶体管T6导通，参考电压端Vref输入的电压通过节点a存入存储电容Cst中，由于该存储电容Cst的自举作用，使得节点b产生一个电压增量，大小为Vref-Vdata。在此情况下，第五晶体管T5的栅极电压Vg的大小又增加了Vref-Vdata，具体的：
Vg(T5)＝Vref-Vdata+Vdd-(-Vth)；
因此，第五晶体管T5的栅源电压Vgs(即栅极节点b的电压与源极节点c之间的压差)为：
Vgs(T5)＝Vg-Vs＝Vref-Vdata+Vdd-(-Vth)-Vdd＝Vref-Vdata+Vth；
在此情况下，流过第五晶体管T5的驱动电流I为：
I＝K/2(Vgs-Vth)2＝K/2(Vref-Vdata)2。
该驱动电流I驱动发光器件D进行发光。
由此可见，一方面，流过第五晶体管T5的驱动电流I与第五晶体管的阈值电压Vth无关，因此，上述像素驱动电路能够避免发光器件D受到阈值电压影响。
另一方面，上述驱动电流I与第一电压端Vdd输入的电压无关。如果在上述补偿的过程中OLED器件的驱动电流I与第一电压端Vdd输入的信号有关，那么在OLED器件在发光过程中，一直会有电流流过第一电压端Vdd，从而造成欧姆电压降(IRDrop)，使得相邻像素具有第一电压端Vdd输入的一部分信号，因此导致流过OLED器件的驱动电流I下降并出现灰阶失真。所以，上述像素驱动电路可以避免由于第一电压端Vdd产生的欧姆电压降对流过发光器件D产生的影响。
又一方面，第五晶体管T5的源极直接与第一电压端Vdd相连接。如果第五晶体管T5与第一电压端Vdd之间设置额外的晶体管(图中未示出)，那么流过该额外晶体管的电流也在其源漏端产生电压降Vds’，因此，第五晶体管T5的栅源电压Vgs应当为Vdata+Vth-Vdd-Vds’。Vds’的大小由流过上述额外晶体管的电流(即OLED器件的驱动电流I)所决定，然而OLED器件的驱动电流I还受到数据电压Vdata的控制，因此第五晶体管T5的栅源电压Vgs将出现非线性的变化，导致像素显示出现灰阶失真。从而对显示装置的质量和显示效果产生不利的影响。因此像素驱动电路能够消除了现有技术中位于第五晶体管T5与第一电压端Vdd之间的晶体管导致作为驱动晶体管的第五晶体管T5，其栅源电压Vgs出现非线性变化，而对流过发光器件D的驱动电流I产生影响。
综上所处，采用本发明实施例提供的像素驱动电路，可以改善了显示装置显示亮度的均匀性。
此外，在发光阶段，栅线Gate输入的电压信号以及复位信号端Reset输入的电压信号为高电平。因此，第三晶体管T3、第四晶体管T4以第二晶体管T2处于截止状态。
本领域普通技术人员可以理解：实现上述方法实施例的全部或部分步骤可以通过程序指令相关的硬件来完成，前述的程序可以存储于一计算机可读取存储介质中，该程序在执行时，执行包括上述方法实施例的步骤；而前述的存储介质包括：ROM、RAM、磁碟或者光盘等各种可以存储程序代码的介质。
以上所述，仅为本发明的具体实施方式，但本发明的保护范围并不局限于此，任何熟悉本技术领域的技术人员在本发明揭露的技术范围内，可轻易想到变化或替换，都应涵盖在本发明的保护范围之内。因此，本发明的保护范围应以所述权利要求的保护范围为准。

Claims (9)

  1. 一种像素驱动电路，用于对发光器件进行驱动，所述像素驱动电路包括：
    存储电容；
    第一晶体管，所述第一晶体管的栅极连接发光控制信号输入端，第一极连接所述存储电容的一端，第二极与参考电压端相连接；
    第二晶体管，所述第二晶体管的栅极连接复位信号输入端，第一极连接所述存储电容的另一端，第二极与所述参考电压端相连接；
    第三晶体管，所述第三晶体管的栅极连接栅线，第一极连接数据线，第二极与所述存储电容的所述一端相连接；
    第四晶体管，所述第四晶体管的栅极连接所述栅线，第一极连接所述存储电容的所述另一端；
    第五晶体管，所述第五晶体管的栅极连接所述存储电容的另一端，第一极连接第一电压端，第二极与所述第四晶体管的第二极相连接；
    第六晶体管，所述第六晶体管的栅极连接所述发光控制信号输入端，第一极连接所述第五晶体管的第二极，第二极与所述发光器件相连。
  2. 根据权利要求1所述的像素驱动电路，其中，所述第一晶体管、所述第二晶体管、所述第三晶体管、所述第四晶体管、所述第五晶体管和所述第六晶体管均为P型晶体管。
  3. 根据权利要求1所述的像素驱动电路，其中，所述第一晶体管、所述第二晶体管、所述第三晶体管、所述第四晶体管、所述第五晶体管和所述第六晶体管均为N型晶体管。
  4. 根据权利要求1-3任一项所述的像素驱动电路，其中，所述晶体管包括耗尽型晶体管或增强型晶体管。
  5. 根据权利要求1-3任一项所述的像素驱动电路，其中，所述发光器件为有机发光二极管。
  6. 一种像素单元，包括发光器件和根据权利要求1所述的像素单元驱动电路，该像素单元驱动电路与发光器件的一端相连，以根据输入数据和扫描信号驱动所述发光器件发光。
  7. 一种显示装置，包括多个根据权利要求6所述的像素单元。
  8. 一种像素电路驱动方法，用于驱动如权利要求1-5任一项所述的像素驱动电路，所述方法包括：
    重置阶段，其中导通第二晶体管，将参考电压端输入的参考电压信号传输至第五晶体管的栅极，并存入存储电容中；
    写入阶段，其中导通第三晶体管，将数据线输入的数据电压通过所述第三晶体管传输至所述第三晶体管的第二极，并保存至所述存储电容中；导通第四晶体管，导通所述第五晶体管的栅极和第二极，将数据电压写入所述第五晶体管的栅极；
    发光阶段，其中导通第一晶体管、所述第五晶体管和第六晶体管，使得通过所述第五晶体管和所述第六晶体管的电流驱动发光器件发光。
  9. 根据权利要求8所述的像素电路驱动方法，其中，所述方法包括，当所述第一晶体管、所述第二晶体管、所述第三晶体管、所述第四晶体管、所述第五晶体管和所述第六晶体管均为P型耗尽型晶体管时，
    在所述重置阶段中，复位信号端输入的电压信号为低电平，栅线输入的电压信号、数据线输入的数据电压以及发光控制信号输入端输入的电压信号为高电平；
    在所述写入阶段中，所述栅线输入的电压信号为低电平，所述数据线输入的数据电压、所述复位信号端输入的电压信号以及所述发光控制信号输入端输入的电压信号为高电平；
    在所述发光阶段中，所述数据线输入的数据电压、所述发光控制信号输入端输入的电压信号为低电平，所述栅线输入的电压信号、所述复位信号端输入的电压信号为高电平。
PCT/CN2015/071735 2014-09-30 2015-01-28 一种像素驱动电路及其驱动方法、像素单元、显示装置 WO2016050021A1 (zh)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
CN201410522250.1A CN104318894B (zh) 2014-09-30 2014-09-30 一种像素电路的驱动方法
CN201410522250.1 2014-09-30

Publications (1)

Publication Number Publication Date
WO2016050021A1 true WO2016050021A1 (zh) 2016-04-07

Family

ID=52374118

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/CN2015/071735 WO2016050021A1 (zh) 2014-09-30 2015-01-28 一种像素驱动电路及其驱动方法、像素单元、显示装置

Country Status (2)

Country Link
CN (1) CN104318894B (zh)
WO (1) WO2016050021A1 (zh)

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN110827730A (zh) * 2019-11-28 2020-02-21 京东方科技集团股份有限公司 一种检测ltpsamoled显示基板像素区晶体管特性的电路与方法
TWI688934B (zh) * 2018-12-07 2020-03-21 友達光電股份有限公司 畫素電路
CN111341245A (zh) * 2020-04-15 2020-06-26 昆山国显光电有限公司 像素驱动电路、显示面板及终端设备
CN113870764A (zh) * 2020-06-11 2021-12-31 成都辰显光电有限公司 像素电路和显示面板
CN114694571A (zh) * 2021-12-21 2022-07-01 友达光电股份有限公司 显示驱动电路和其驱动方法
CN115762414A (zh) * 2022-11-17 2023-03-07 上海和辉光电股份有限公司 一种amoled显示驱动电路、显示面板和显示驱动方法

Families Citing this family (16)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN104575389A (zh) * 2015-01-29 2015-04-29 京东方科技集团股份有限公司 像素电路及其驱动方法、显示面板及显示装置
TWI554997B (zh) * 2015-03-10 2016-10-21 友達光電股份有限公司 畫素結構
CN104658484B (zh) * 2015-03-18 2018-01-16 上海和辉光电有限公司 显示装置、像素驱动电路及其驱动方法
CN104992674A (zh) * 2015-07-24 2015-10-21 上海和辉光电有限公司 一种像素补偿电路
CN107093404A (zh) * 2016-02-17 2017-08-25 上海和辉光电有限公司 像素补偿电路和显示装置
CN106952613B (zh) * 2017-05-27 2019-05-07 上海天马有机发光显示技术有限公司 有机发光像素电路、显示装置及有机发光像素电路的驱动方法
CN107507567B (zh) 2017-10-18 2019-06-07 京东方科技集团股份有限公司 一种像素补偿电路、其驱动方法及显示装置
CN109920374B (zh) 2017-12-13 2020-12-22 京东方科技集团股份有限公司 像素驱动电路及其控制方法、显示面板及电子设备
CN108364607B (zh) 2018-05-25 2020-01-17 京东方科技集团股份有限公司 像素电路及其驱动方法、显示装置
CN109346010A (zh) * 2018-12-26 2019-02-15 昆山国显光电有限公司 一种像素电路及其驱动方法、显示装置
CN109979394A (zh) * 2019-05-17 2019-07-05 京东方科技集团股份有限公司 像素电路及其驱动方法、阵列基板及显示装置
CN110010058B (zh) * 2019-05-20 2021-01-29 京东方科技集团股份有限公司 阵列基板及显示面板
CN110738964A (zh) * 2019-10-29 2020-01-31 京东方科技集团股份有限公司 像素电路及显示装置
US20220335880A1 (en) * 2019-12-19 2022-10-20 Chongqing Konka Photoelectric Technology Research Institute Co., Ltd. Electroluminescence Display, Pixel Compensating Circuit and Voltage Compensating Method Based on Pixel Compensating Circuit
CN111951730B (zh) * 2020-08-21 2022-04-15 Oppo（重庆）智能科技有限公司 显示设备、电子设备、显示控制方法及存储介质
CN114582289B (zh) * 2022-04-21 2023-07-28 武汉天马微电子有限公司 显示面板及其驱动方法、显示装置

Citations (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1577453A (zh) * 2003-07-07 2005-02-09 三星Sdi株式会社 有机发光器件像素电路及其驱动方法
KR20100047063A (ko) * 2008-10-28 2010-05-07 엘지디스플레이 주식회사 유기발광다이오드 표시장치
US20120050344A1 (en) * 2010-08-24 2012-03-01 Samsung Mobile Display Co., Ltd. Organic Light Emitting Display Having Uniform Brightness
CN103021333A (zh) * 2012-12-11 2013-04-03 昆山工研院新型平板显示技术中心有限公司 有机发光显示器的像素电路及其驱动方法
CN103150991A (zh) * 2013-03-14 2013-06-12 友达光电股份有限公司 一种用于amoled显示器的像素补偿电路
CN103886838A (zh) * 2014-03-24 2014-06-25 京东方科技集团股份有限公司 像素补偿电路、阵列基板及显示装置
CN203733450U (zh) * 2014-03-24 2014-07-23 京东方科技集团股份有限公司 像素补偿电路、阵列基板及显示装置
CN104123908A (zh) * 2013-04-24 2014-10-29 胜华科技股份有限公司 发光元件驱动电路及其相关的像素电路与应用

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN100541586C (zh) * 2008-05-23 2009-09-16 上海广电光电子有限公司 有机发光显示器的像素电路及其驱动方法
CN102930824B (zh) * 2012-11-13 2015-04-15 京东方科技集团股份有限公司 像素电路及驱动方法、显示装置

Patent Citations (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1577453A (zh) * 2003-07-07 2005-02-09 三星Sdi株式会社 有机发光器件像素电路及其驱动方法
KR20100047063A (ko) * 2008-10-28 2010-05-07 엘지디스플레이 주식회사 유기발광다이오드 표시장치
US20120050344A1 (en) * 2010-08-24 2012-03-01 Samsung Mobile Display Co., Ltd. Organic Light Emitting Display Having Uniform Brightness
CN103021333A (zh) * 2012-12-11 2013-04-03 昆山工研院新型平板显示技术中心有限公司 有机发光显示器的像素电路及其驱动方法
CN103150991A (zh) * 2013-03-14 2013-06-12 友达光电股份有限公司 一种用于amoled显示器的像素补偿电路
CN104123908A (zh) * 2013-04-24 2014-10-29 胜华科技股份有限公司 发光元件驱动电路及其相关的像素电路与应用
CN103886838A (zh) * 2014-03-24 2014-06-25 京东方科技集团股份有限公司 像素补偿电路、阵列基板及显示装置
CN203733450U (zh) * 2014-03-24 2014-07-23 京东方科技集团股份有限公司 像素补偿电路、阵列基板及显示装置

Cited By (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TWI688934B (zh) * 2018-12-07 2020-03-21 友達光電股份有限公司 畫素電路
CN110827730A (zh) * 2019-11-28 2020-02-21 京东方科技集团股份有限公司 一种检测ltpsamoled显示基板像素区晶体管特性的电路与方法
CN110827730B (zh) * 2019-11-28 2022-12-13 京东方科技集团股份有限公司 一种检测ltpsamoled显示基板像素区晶体管特性的电路与方法
CN111341245A (zh) * 2020-04-15 2020-06-26 昆山国显光电有限公司 像素驱动电路、显示面板及终端设备
CN111341245B (zh) * 2020-04-15 2022-10-04 昆山国显光电有限公司 像素驱动电路、显示面板及终端设备
CN113870764A (zh) * 2020-06-11 2021-12-31 成都辰显光电有限公司 像素电路和显示面板
CN114694571A (zh) * 2021-12-21 2022-07-01 友达光电股份有限公司 显示驱动电路和其驱动方法
CN114694571B (zh) * 2021-12-21 2023-09-19 友达光电股份有限公司 显示驱动电路和其驱动方法
CN115762414A (zh) * 2022-11-17 2023-03-07 上海和辉光电股份有限公司 一种amoled显示驱动电路、显示面板和显示驱动方法

Also Published As

Publication number Publication date
CN104318894B (zh) 2017-02-15
CN104318894A (zh) 2015-01-28

Similar Documents

Publication Publication Date Title
WO2016050021A1 (zh) 一种像素驱动电路及其驱动方法、像素单元、显示装置
US9583041B2 (en) Pixel circuit and driving method thereof, display panel, and display device
KR101788432B1 (ko) 픽셀 회로, 유기 전계 발광 표시 패널, 표시 장치 및 그 구동 방법
US10332447B2 (en) Pixel circuit, driving method therefor, and display device including the pixel circuit
US9620062B2 (en) Pixel circuit, driving method thereof and display apparatus
CN104680980B (zh) 像素驱动电路及其驱动方法、显示装置
US9508287B2 (en) Pixel circuit and driving method thereof, display apparatus
CN105575327B (zh) 一种像素电路、其驱动方法及有机电致发光显示面板
US9548024B2 (en) Pixel driving circuit, driving method thereof and display apparatus
WO2017031909A1 (zh) 像素电路及其驱动方法、阵列基板、显示面板及显示装置
WO2017117940A1 (zh) 像素驱动电路、像素驱动方法、显示面板和显示装置
US10283042B2 (en) Pixel driving circuit, pixel driving method, and display device
CN103544917B (zh) 发光二极管像素单元电路、其驱动方法及显示面板
CN107346654B (zh) 一种像素电路及其驱动方法、显示装置
WO2016023311A1 (zh) 像素驱动电路及其驱动方法和显示装置
US10553159B2 (en) Pixel circuit, display panel and display device
CN104409050B (zh) Oled像素电路及其驱动方法、显示面板及显示装置
CN103198794A (zh) 像素电路及其驱动方法、有机发光显示面板及显示装置
US11341911B2 (en) Pixel circuit, driving method thereof and display device
CN108389551B (zh) 一种像素电路及其驱动方法、显示装置
WO2017045376A1 (zh) 像素电路及其驱动方法、显示面板和显示装置
CN110675829B (zh) 像素驱动电路及其驱动方法、显示面板、显示装置
US10304387B2 (en) AMOLED pixel driving circuit and AMOLED pixel driving method
WO2019047701A1 (zh) 像素电路及其驱动方法、显示装置
TW202027056A (zh) 畫素電路及其驅動方法

Legal Events

Date Code Title Description
121 Ep: the epo has been informed by wipo that ep was designated in this application

Ref document number: 15847533

Country of ref document: EP

Kind code of ref document: A1

NENP Non-entry into the national phase

Ref country code: DE

32PN Ep: public notification in the ep bulletin as address of the adressee cannot be established

Free format text: NOTING OF LOSS OF RIGHTS PURSUANT TO RULE 112(1) EPC (EPO FORM 1205A DATED 29/08/2017)

122 Ep: pct application non-entry in european phase

Ref document number: 15847533

Country of ref document: EP

Kind code of ref document: A1