SG11201801408YA - Method for producing bonded soi wafer - Google Patents

Method for producing bonded soi wafer

Info

Publication number
SG11201801408YA
SG11201801408YA SG11201801408YA SG11201801408YA SG11201801408YA SG 11201801408Y A SG11201801408Y A SG 11201801408YA SG 11201801408Y A SG11201801408Y A SG 11201801408YA SG 11201801408Y A SG11201801408Y A SG 11201801408YA SG 11201801408Y A SG11201801408Y A SG 11201801408YA
Authority
SG
Singapore
Prior art keywords
soi wafer
bonded soi
producing bonded
producing
wafer
Prior art date
Application number
SG11201801408YA
Other languages
English (en)
Inventor
Toru Ishizuka
Masatake Nakano
Original Assignee
Shin Etsu Handotai Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Shin Etsu Handotai Co Ltd filed Critical Shin Etsu Handotai Co Ltd
Publication of SG11201801408YA publication Critical patent/SG11201801408YA/en

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P90/00—Preparation of wafers not covered by a single main group of this subclass, e.g. wafer reinforcement
    • H10P90/19—Preparing inhomogeneous wafers
    • H10P90/1904—Preparing vertically inhomogeneous wafers
    • H10P90/1906—Preparing SOI wafers
    • H10P90/1914—Preparing SOI wafers using bonding
    • H10P90/1916—Preparing SOI wafers using bonding with separation or delamination along an ion implanted layer, e.g. Smart-cut
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P10/00—Bonding of wafers, substrates or parts of devices
    • H10P10/12—Bonding of semiconductor wafers or semiconductor substrates to semiconductor wafers or semiconductor substrates
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D86/00—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D86/00—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
    • H10D86/201—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates the substrates comprising an insulating layer on a semiconductor body, e.g. SOI
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/20—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials
    • H10P14/34—Deposited materials, e.g. layers
    • H10P14/3402—Deposited materials, e.g. layers characterised by the chemical composition
    • H10P14/3424—Deposited materials, e.g. layers characterised by the chemical composition being Group IIB-VIA materials
    • H10P14/3426—Oxides
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/20—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials
    • H10P14/34—Deposited materials, e.g. layers
    • H10P14/3451—Structure
    • H10P14/3452—Microstructure
    • H10P14/3458—Monocrystalline
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/60—Formation of materials, e.g. in the shape of layers or pillars of insulating materials
    • H10P14/63—Formation of materials, e.g. in the shape of layers or pillars of insulating materials characterised by the formation processes
    • H10P14/6302—Non-deposition formation processes
    • H10P14/6304—Formation by oxidation, e.g. oxidation of the substrate
    • H10P14/6306—Formation by oxidation, e.g. oxidation of the substrate of the semiconductor materials
    • H10P14/6308—Formation by oxidation, e.g. oxidation of the substrate of the semiconductor materials of Group IV semiconductors
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P36/00—Gettering within semiconductor bodies
    • H10P36/03—Gettering within semiconductor bodies within silicon bodies
    • H10P36/07—Gettering within semiconductor bodies within silicon bodies of silicon-on-insulator structures
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P90/00—Preparation of wafers not covered by a single main group of this subclass, e.g. wafer reinforcement
    • H10P90/12—Preparing bulk and homogeneous wafers
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P90/00—Preparation of wafers not covered by a single main group of this subclass, e.g. wafer reinforcement
    • H10P90/19—Preparing inhomogeneous wafers
    • H10P90/1904—Preparing vertically inhomogeneous wafers
    • H10P90/1906—Preparing SOI wafers
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P95/00—Generic processes or apparatus for manufacture or treatments not covered by the other groups of this subclass
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P95/00—Generic processes or apparatus for manufacture or treatments not covered by the other groups of this subclass
    • H10P95/90—Thermal treatments, e.g. annealing or sintering
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W10/00—Isolation regions in semiconductor bodies between components of integrated devices
    • H10W10/10—Isolation regions comprising dielectric materials
    • H10W10/181—Semiconductor-on-insulator [SOI] isolation regions, e.g. buried oxide regions of SOI wafers
    • C—CHEMISTRY; METALLURGY
    • C30—CRYSTAL GROWTH
    • C30B—SINGLE-CRYSTAL GROWTH; UNIDIRECTIONAL SOLIDIFICATION OF EUTECTIC MATERIAL OR UNIDIRECTIONAL DEMIXING OF EUTECTOID MATERIAL; REFINING BY ZONE-MELTING OF MATERIAL; PRODUCTION OF A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; SINGLE CRYSTALS OR HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; AFTER-TREATMENT OF SINGLE CRYSTALS OR A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; APPARATUS THEREFOR
    • C30B15/00—Single-crystal growth by pulling from a melt, e.g. Czochralski method
    • C30B15/007—Pulling on a substrate
    • C—CHEMISTRY; METALLURGY
    • C30—CRYSTAL GROWTH
    • C30B—SINGLE-CRYSTAL GROWTH; UNIDIRECTIONAL SOLIDIFICATION OF EUTECTIC MATERIAL OR UNIDIRECTIONAL DEMIXING OF EUTECTOID MATERIAL; REFINING BY ZONE-MELTING OF MATERIAL; PRODUCTION OF A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; SINGLE CRYSTALS OR HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; AFTER-TREATMENT OF SINGLE CRYSTALS OR A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; APPARATUS THEREFOR
    • C30B15/00—Single-crystal growth by pulling from a melt, e.g. Czochralski method
    • C30B15/20—Controlling or regulating
    • C—CHEMISTRY; METALLURGY
    • C30—CRYSTAL GROWTH
    • C30B—SINGLE-CRYSTAL GROWTH; UNIDIRECTIONAL SOLIDIFICATION OF EUTECTIC MATERIAL OR UNIDIRECTIONAL DEMIXING OF EUTECTOID MATERIAL; REFINING BY ZONE-MELTING OF MATERIAL; PRODUCTION OF A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; SINGLE CRYSTALS OR HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; AFTER-TREATMENT OF SINGLE CRYSTALS OR A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; APPARATUS THEREFOR
    • C30B29/00—Single crystals or homogeneous polycrystalline material with defined structure characterised by the material or by their shape
    • C30B29/02—Elements
    • C30B29/06—Silicon
SG11201801408YA 2015-09-28 2016-08-22 Method for producing bonded soi wafer SG11201801408YA (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP2015189399A JP6447439B2 (ja) 2015-09-28 2015-09-28 貼り合わせsoiウェーハの製造方法
PCT/JP2016/003798 WO2017056376A1 (ja) 2015-09-28 2016-08-22 貼り合わせsoiウェーハの製造方法

Publications (1)

Publication Number Publication Date
SG11201801408YA true SG11201801408YA (en) 2018-03-28

Family

ID=58422873

Family Applications (1)

Application Number Title Priority Date Filing Date
SG11201801408YA SG11201801408YA (en) 2015-09-28 2016-08-22 Method for producing bonded soi wafer

Country Status (8)

Country Link
US (1) US11056381B2 (enExample)
EP (1) EP3358600B1 (enExample)
JP (1) JP6447439B2 (enExample)
KR (1) KR102509310B1 (enExample)
CN (1) CN108028170B (enExample)
SG (1) SG11201801408YA (enExample)
TW (1) TWI698907B (enExample)
WO (1) WO2017056376A1 (enExample)

Families Citing this family (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE102016112139B3 (de) * 2016-07-01 2018-01-04 Infineon Technologies Ag Verfahren zum Reduzieren einer Verunreinigungskonzentration in einem Halbleiterkörper
JP6696917B2 (ja) * 2017-01-18 2020-05-20 信越化学工業株式会社 複合基板の製造方法
TWI668739B (zh) * 2018-04-03 2019-08-11 環球晶圓股份有限公司 磊晶基板及其製造方法
US10943813B2 (en) * 2018-07-13 2021-03-09 Globalwafers Co., Ltd. Radio frequency silicon on insulator wafer platform with superior performance, stability, and manufacturability
JP7242220B2 (ja) * 2018-09-03 2023-03-20 キヤノン株式会社 接合ウェハ及びその製造方法、並びにスルーホール形成方法
KR102200437B1 (ko) 2018-09-12 2021-01-08 주식회사 이피지 관통형 전극 제조 방법
JP7345245B2 (ja) 2018-11-13 2023-09-15 信越半導体株式会社 貼り合わせsoiウェーハの製造方法
FR3091010B1 (fr) 2018-12-24 2020-12-04 Soitec Silicon On Insulator Structure de type semi-conducteur pour applications digitales et radiofréquences, et procédé de fabrication d’une telle structure
JP7572352B2 (ja) 2019-04-05 2024-10-23 株式会社トクヤマ 多結晶シリコン原料
CN118360665A (zh) 2019-04-05 2024-07-19 株式会社德山 n型单晶硅的制造方法
FR3110282B1 (fr) * 2020-05-18 2022-04-15 Soitec Silicon On Insulator Procédé de fabrication d’un substrat semi-conducteur sur isolant pour applications radiofréquences
FR3110283B1 (fr) * 2020-05-18 2022-04-15 Soitec Silicon On Insulator Procédé de fabrication d’un substrat semi-conducteur sur isolant pour applications radiofréquences

Family Cites Families (41)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH09331049A (ja) * 1996-04-08 1997-12-22 Canon Inc 貼り合わせsoi基板の作製方法及びsoi基板
JP3697106B2 (ja) * 1998-05-15 2005-09-21 キヤノン株式会社 半導体基板の作製方法及び半導体薄膜の作製方法
KR100701341B1 (ko) * 1999-03-16 2007-03-29 신에쯔 한도타이 가부시키가이샤 실리콘 웨이퍼의 제조방법 및 실리콘 웨이퍼
US6375738B1 (en) * 1999-03-26 2002-04-23 Canon Kabushiki Kaisha Process of producing semiconductor article
JP4463957B2 (ja) * 2000-09-20 2010-05-19 信越半導体株式会社 シリコンウエーハの製造方法およびシリコンウエーハ
JP2002184960A (ja) * 2000-12-18 2002-06-28 Shin Etsu Handotai Co Ltd Soiウェーハの製造方法及びsoiウェーハ
US6743495B2 (en) * 2001-03-30 2004-06-01 Memc Electronic Materials, Inc. Thermal annealing process for producing silicon wafers with improved surface characteristics
JP2003068744A (ja) * 2001-08-30 2003-03-07 Shin Etsu Handotai Co Ltd シリコンウエーハの製造方法及びシリコンウエーハ並びにsoiウエーハ
WO2003046993A1 (fr) * 2001-11-29 2003-06-05 Shin-Etsu Handotai Co.,Ltd. Procede de production de plaquettes soi
JP2003224247A (ja) * 2002-01-29 2003-08-08 Shin Etsu Handotai Co Ltd Soiウエーハ及びsoiウエーハの製造方法
JP2005206391A (ja) * 2004-01-20 2005-08-04 Shin Etsu Handotai Co Ltd シリコン単結晶基板の抵抗率保証方法及びシリコン単結晶基板の製造方法並びにシリコン単結晶基板
JP2006216826A (ja) * 2005-02-04 2006-08-17 Sumco Corp Soiウェーハの製造方法
JP2007059704A (ja) * 2005-08-25 2007-03-08 Sumco Corp 貼合せ基板の製造方法及び貼合せ基板
JP4715470B2 (ja) * 2005-11-28 2011-07-06 株式会社Sumco 剥離ウェーハの再生加工方法及びこの方法により再生加工された剥離ウェーハ
JP2007227424A (ja) * 2006-02-21 2007-09-06 Sumco Corp Simoxウェーハの製造方法
KR100701314B1 (ko) 2006-12-05 2007-03-29 곽종보 조명용 발전기
JP5045095B2 (ja) * 2006-12-26 2012-10-10 信越半導体株式会社 半導体デバイスの製造方法
JP4820801B2 (ja) * 2006-12-26 2011-11-24 株式会社Sumco 貼り合わせウェーハの製造方法
JP5009124B2 (ja) * 2007-01-04 2012-08-22 コバレントマテリアル株式会社 半導体基板の製造方法
KR101447048B1 (ko) * 2007-04-20 2014-10-06 가부시키가이샤 한도오따이 에네루기 켄큐쇼 Soi 기판 및 반도체장치의 제조방법
JP5280015B2 (ja) * 2007-05-07 2013-09-04 信越半導体株式会社 Soi基板の製造方法
JP5245380B2 (ja) * 2007-06-21 2013-07-24 信越半導体株式会社 Soiウェーハの製造方法
JP5510256B2 (ja) 2010-10-06 2014-06-04 株式会社Sumco シリコンウェーハの製造方法
JP5993550B2 (ja) 2011-03-08 2016-09-14 信越半導体株式会社 シリコン単結晶ウェーハの製造方法
WO2012125632A1 (en) * 2011-03-16 2012-09-20 Memc Electronic Materials, Inc. Silicon on insulator structures having high resistivity regions in the handle wafer and methods for producing such structures
EP2695184B1 (en) * 2011-04-06 2018-02-14 Oxford University Innovation Limited Processing a wafer for an electronic circuit
JP2014107357A (ja) * 2012-11-26 2014-06-09 Shin Etsu Handotai Co Ltd Soiウェーハの製造方法
US9634098B2 (en) * 2013-06-11 2017-04-25 SunEdison Semiconductor Ltd. (UEN201334164H) Oxygen precipitation in heavily doped silicon wafers sliced from ingots grown by the Czochralski method
US9209069B2 (en) * 2013-10-15 2015-12-08 Sunedison Semiconductor Limited (Uen201334164H) Method of manufacturing high resistivity SOI substrate with reduced interface conductivity
US9768056B2 (en) * 2013-10-31 2017-09-19 Sunedison Semiconductor Limited (Uen201334164H) Method of manufacturing high resistivity SOI wafers with charge trapping layers based on terminated Si deposition
JP6118757B2 (ja) * 2014-04-24 2017-04-19 信越半導体株式会社 貼り合わせsoiウェーハの製造方法
US10483152B2 (en) * 2014-11-18 2019-11-19 Globalwafers Co., Ltd. High resistivity semiconductor-on-insulator wafer and a method of manufacturing
WO2016081313A1 (en) * 2014-11-18 2016-05-26 Sunedison Semiconductor Limited A method of manufacturing high resistivity semiconductor-on-insulator wafers with charge trapping layers
JP6179530B2 (ja) * 2015-01-23 2017-08-16 信越半導体株式会社 貼り合わせsoiウェーハの製造方法
EP3367424B1 (en) * 2015-03-03 2022-10-19 GlobalWafers Co., Ltd. Charge trapping polycrystalline silicon films on silicon substrates with controllable film stress
US9881832B2 (en) * 2015-03-17 2018-01-30 Sunedison Semiconductor Limited (Uen201334164H) Handle substrate for use in manufacture of semiconductor-on-insulator structure and method of manufacturing thereof
US10026642B2 (en) * 2016-03-07 2018-07-17 Sunedison Semiconductor Limited (Uen201334164H) Semiconductor on insulator structure comprising a sacrificial layer and method of manufacture thereof
US10269617B2 (en) * 2016-06-22 2019-04-23 Globalwafers Co., Ltd. High resistivity silicon-on-insulator substrate comprising an isolation region
US10546771B2 (en) * 2016-10-26 2020-01-28 Globalwafers Co., Ltd. High resistivity silicon-on-insulator substrate having enhanced charge trapping efficiency
WO2018106535A1 (en) * 2016-12-05 2018-06-14 Sunedison Semiconductor Limited High resistivity silicon-on-insulator structure and method of manufacture thereof
EP3562978B1 (en) * 2016-12-28 2021-03-10 Sunedison Semiconductor Limited Method of treating silicon wafers to have intrinsic gettering and gate oxide integrity yield

Also Published As

Publication number Publication date
CN108028170A (zh) 2018-05-11
TW201721710A (zh) 2017-06-16
KR102509310B1 (ko) 2023-03-13
EP3358600A1 (en) 2018-08-08
EP3358600B1 (en) 2022-08-03
TWI698907B (zh) 2020-07-11
KR20180058713A (ko) 2018-06-01
JP2017069240A (ja) 2017-04-06
WO2017056376A1 (ja) 2017-04-06
US20180247860A1 (en) 2018-08-30
CN108028170B (zh) 2022-03-15
US11056381B2 (en) 2021-07-06
EP3358600A4 (en) 2019-05-29
JP6447439B2 (ja) 2019-01-09

Similar Documents

Publication Publication Date Title
SG10201702358YA (en) Wafer producing method
SG10201704123PA (en) Wafer producing method
SG10201603903QA (en) Wafer producing method
SG10201603714RA (en) Wafer producing method
SG10201604080XA (en) Wafer producing method
SG10201600557XA (en) Wafer producing method
SG10201600555UA (en) Wafer producing method
SG10201601981YA (en) Wafer producing method
SG10201600552YA (en) Wafer producing method
SG10201510273SA (en) Wafer producing method
SG10201605092PA (en) Wafer producing method
SG10201510271QA (en) Wafer producing method
SG10201509454YA (en) Wafer producing method
SG10201509475VA (en) Wafer producing method
SG11201702778YA (en) Method for bonding substrates
SG11201608562RA (en) Method for manufacturing a bonded soi wafer
SG10201601975SA (en) Wafer producing method
SG10201605424SA (en) Wafer thinning method
EP3136420A4 (en) Bonded soi wafer and method for manufacturing bonded soi wafer
SG10201605425VA (en) Wafer thinning method
SG10201509471YA (en) Wafer producing method
IL266044B (en) Method for the production of 3-alkylsulfanyl-2-chloro-n-(1-alkyl-h1-tetrazol-5-yl)-4-trifluoromethyl-benzamides
SG11201607286TA (en) Method for manufacturing bonded wafer
SG11201709392SA (en) Method for manufacturing bonded soi wafer
GB201514221D0 (en) Bonding method