RU2004139016A - Способ сохранения сверхчистых контактных площадок на пластине полупроводникового материала - Google Patents

Способ сохранения сверхчистых контактных площадок на пластине полупроводникового материала Download PDF

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RU2004139016A
RU2004139016A RU2004139016/28A RU2004139016A RU2004139016A RU 2004139016 A RU2004139016 A RU 2004139016A RU 2004139016/28 A RU2004139016/28 A RU 2004139016/28A RU 2004139016 A RU2004139016 A RU 2004139016A RU 2004139016 A RU2004139016 A RU 2004139016A
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plate
water
soluble film
film
wafer
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RU2004139016/28A
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Роберт Кэррол РАНИОН (US)
Роберт Кэррол РАНИОН
Чэ Кион ХОР (MY)
Чэ Кион ХОР
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Кетека Сингапур (Пте) Лтд (SG)
Кетека Сингапур (Пте) Лтд
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Publication of RU2004139016A publication Critical patent/RU2004139016A/ru

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    • HELECTRICITY
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    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/77Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
    • H01L21/78Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/683Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping
    • H01L21/6835Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
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    • H01L21/683Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping
    • H01L21/6835Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
    • H01L21/6836Wafer tapes, e.g. grinding or dicing support tapes
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    • H01L2221/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof covered by H01L21/00
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    • H01L2221/683Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping
    • H01L2221/68304Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
    • H01L2221/68327Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support used during dicing or grinding
    • HELECTRICITY
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    • H01L2221/67Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere
    • H01L2221/683Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping
    • H01L2221/68304Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
    • H01L2221/6834Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support used to protect an active side of a device or wafer
    • HELECTRICITY
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    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02Bonding areas; Manufacturing methods related thereto
    • H01L2224/04Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/0401Bonding areas specifically adapted for bump connectors, e.g. under bump metallisation [UBM]
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    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/44Structure, shape, material or disposition of the wire connectors prior to the connecting process
    • H01L2224/45Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
    • H01L2224/45001Core members of the connector
    • H01L2224/45099Material
    • H01L2224/451Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
    • H01L2224/45117Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 400°C and less than 950°C
    • H01L2224/45124Aluminium (Al) as principal constituent
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    • H01L24/02Bonding areas ; Manufacturing methods related thereto
    • HELECTRICITY
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    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/02Bonding areas ; Manufacturing methods related thereto
    • H01L24/04Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L24/05Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • HELECTRICITY
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    • H01L2924/0001Technical content checked by a classifier
    • H01L2924/00014Technical content checked by a classifier the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
    • HELECTRICITY
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    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01078Platinum [Pt]
    • HELECTRICITY
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    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01079Gold [Au]
    • HELECTRICITY
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    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10Details of semiconductor or other solid state devices to be connected
    • H01L2924/102Material of the semiconductor or solid state bodies
    • H01L2924/1025Semiconducting materials
    • H01L2924/10251Elemental semiconductors, i.e. Group IV
    • H01L2924/10253Silicon [Si]
    • HELECTRICITY
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    • H01L2924/301Electrical effects
    • H01L2924/3025Electromagnetic shielding
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10STECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S438/00Semiconductor device manufacturing: process
    • Y10S438/976Temporary protective layer

Claims (11)

1. Способ для защиты контактных площадок пластины от силиконовой пыли и загрязнений при разделении на отдельные кристаллы, в соответствии с которым берут чистую пластину, подлежащую распиливанию, установленную на ленте для разрезания, наносят нейтральную отверждаемую водорастворимую пленку на поверхность пластины, распиливают пластину через водорастворимую пленку с частичным надпилом ленты для разрезания, охлаждают пластину чистой холодной водой во время разрезания без удаления водорастворимой пленки, промывают пластину в промывочном устройстве чистой теплой деионизорованной водой под высоким давлением для удаления нейтральной отверждаемой водорастворимой пленки с поверхности отдельных отрезанных кристаллов и из разрезов в пластине, и сушат пластину перед снятием отдельных кристаллов с пластины, установленной на ленте для разрезания.
2. Способ по п.1, характеризующийся тем, что чистая холодная вода является недеионизированной водой, которая обычно взаимодействует с открытыми контактными площадками указанного кристалла, если он не защищен нейтральной отверждаемой водорастворимой пленкой.
3. Способ по п.1, характеризующийся тем, что нанесение нейтральной отверждаемой водорастворимой пленки включает нанесение вязкой жидкости равномерно на верхнюю поверхность пластины, отверждение и сушку указанной пленки.
4. Способ по п.3, характеризующийся тем, что затвердевание и сушка пленки включает воздействие на пленку ультрафиолетового или инфракрасного излучения.
5. Способ по п.1, характеризующийся тем, что нанесение пленки на поверхность пластины включает нанесение вязкого геля, пасты или жидкости.
6. Способ защиты контактных площадок пластины от силиконовой пыли и загрязнений во время отделения от пластины путем распиливания, в соответствии с которым устанавливают чистую пластину, подлежащую распиливанию на кристаллы, на первую ленту для разрезания, наносят нейтральную отверждаемую водорастворимую пленку на верхнюю поверхность пластины, отверждают водорастворимую пленку для предотвращения ее растворения в холодной воде, осуществляют частичный распил пластины через водорастворимую пленку, промывают пластину в промывочном устройстве для удаления пыли и водорастворимой пленки, сушат промытую и распиленную пластину, наносят вторую нейтральную отверждаемую водорастворимую пленку на верхнюю поверхность пластины и в пропилы пластины, осуществляют отверждение и сушку второй нейтральной отверждаемой водорастворимой пленки, накладывают шлифовальную ленту поверх второй пленки, удаляют ленту для разделения с нижней части частично распиленной пластины, удаляют часть нижней поверхности пластины для разделения пластины на отдельные кристаллы, имеющие чрезвычайно чистые кромки, промывают распиленную пластину в промывочном устройстве для удаления пыли, сушат промытую и распиленную пластину, устанавливают промытую и распиленную сухую пластину на второй ленте для разрезания, и удаляют шлифовальную ленту и нейтральную отверждаемую водорастворимую пленку или пленки с пластины для получения отдельных кристаллов с кромками без заусенец и сколов.
7 Способ по п.6, характеризующийся тем, что удаление части нижней поверхности указанной пластины включает травление или шлифовку нижней поверхности.
8. Способ по п.6, характеризующийся тем, что промывку распиленной пластины после удаления части ее нижней поверхности осуществляют чистой холодной водой для предотвращения удаления водорастворимой пленки или пленок.
9. Способ по п.6, характеризующийся тем, что удаление нейтральной отверждаемой водорастворимой пленки или пленок с пластины включает промывку пластины в промывочном устройстве с использованием деионизированной воды под высоким давлением для удаления всех растворимых пленок и загрязнений.
10. Способ по п.6, характеризующийся тем, что частичный распил пластины через водорастворимую пленку осуществляют при подаче чистой нейтральной охлаждающей воды к диску пилы и к разрезаемой пластине.
11. Способ по п.10, характеризующийся тем, что чистая нейтральная охлаждающая вода представляет собой очищенную отфильтрованную водопроводную воду.
RU2004139016/28A 2002-07-12 2003-07-09 Способ сохранения сверхчистых контактных площадок на пластине полупроводникового материала RU2004139016A (ru)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US10/193842 2002-07-12
US10/193,842 US6582983B1 (en) 2002-07-12 2002-07-12 Method and wafer for maintaining ultra clean bonding pads on a wafer

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RU2004139016A true RU2004139016A (ru) 2005-07-27

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US (1) US6582983B1 (ru)
EP (1) EP1522099A4 (ru)
JP (1) JP2005533376A (ru)
CN (1) CN1296988C (ru)
AU (1) AU2003253566A1 (ru)
MY (1) MY138777A (ru)
RU (1) RU2004139016A (ru)
WO (1) WO2004008528A1 (ru)

Families Citing this family (133)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP4260405B2 (ja) * 2002-02-08 2009-04-30 株式会社ルネサステクノロジ 半導体集積回路装置の製造方法
CN1287435C (zh) * 2002-06-27 2006-11-29 松下电器产业株式会社 半导体装置及其制造方法
US20050064679A1 (en) * 2003-09-19 2005-03-24 Farnworth Warren M. Consolidatable composite materials, articles of manufacture formed therefrom, and fabrication methods
US20050064683A1 (en) * 2003-09-19 2005-03-24 Farnworth Warren M. Method and apparatus for supporting wafers for die singulation and subsequent handling
US7713841B2 (en) * 2003-09-19 2010-05-11 Micron Technology, Inc. Methods for thinning semiconductor substrates that employ support structures formed on the substrates
US6861336B1 (en) * 2003-11-30 2005-03-01 Union Semiconductor Technology Corporation Die thinning methods
US7244665B2 (en) 2004-04-29 2007-07-17 Micron Technology, Inc. Wafer edge ring structures and methods of formation
US7547978B2 (en) * 2004-06-14 2009-06-16 Micron Technology, Inc. Underfill and encapsulation of semiconductor assemblies with materials having differing properties
WO2006008829A1 (ja) * 2004-07-22 2006-01-26 Renesas Technology Corp. 半導体装置の製造方法
US20060046433A1 (en) * 2004-08-25 2006-03-02 Sterrett Terry L Thinning semiconductor wafers
US7049208B2 (en) 2004-10-11 2006-05-23 Intel Corporation Method of manufacturing of thin based substrate
JP2006253402A (ja) * 2005-03-10 2006-09-21 Nec Electronics Corp 半導体装置の製造方法
CN100364060C (zh) * 2005-03-17 2008-01-23 郑明德 半导体元件的清洗方法
JP2006272505A (ja) * 2005-03-29 2006-10-12 Nitto Denko Corp 保護テープ切断方法およびこれを用いた装置
JP4728033B2 (ja) * 2005-04-19 2011-07-20 株式会社ディスコ 半導体ウエーハの加工方法
US20070072338A1 (en) * 2005-09-26 2007-03-29 Advanced Chip Engineering Technology Inc. Method for separating package of WLP
JP4851795B2 (ja) * 2006-01-13 2012-01-11 株式会社ディスコ ウエーハの分割装置
JP4861072B2 (ja) * 2006-06-20 2012-01-25 オンセミコンダクター・トレーディング・リミテッド 半導体装置及びその製造方法
EP1884981A1 (en) * 2006-08-03 2008-02-06 STMicroelectronics Ltd (Malta) Removable wafer expander for die bonding equipment.
SG147330A1 (en) * 2007-04-19 2008-11-28 Micron Technology Inc Semiconductor workpiece carriers and methods for processing semiconductor workpieces
CN101359639B (zh) * 2007-07-31 2012-05-16 欣兴电子股份有限公司 埋入半导体芯片的电路板结构及其制法
US7923298B2 (en) 2007-09-07 2011-04-12 Micron Technology, Inc. Imager die package and methods of packaging an imager die on a temporary carrier
ITRM20080610A1 (it) * 2008-11-13 2010-05-14 Aptina Imaging Corp Procedimento per passivazione in umido di piazzole di unione per protezione contro un trattamento successivo basato su tmah.
JP2011014652A (ja) * 2009-06-30 2011-01-20 Panasonic Electric Works Co Ltd 機能性デバイスの製造方法および、それにより製造された機能性デバイスを用いた半導体装置の製造方法
US8642448B2 (en) 2010-06-22 2014-02-04 Applied Materials, Inc. Wafer dicing using femtosecond-based laser and plasma etch
US8759197B2 (en) 2011-06-15 2014-06-24 Applied Materials, Inc. Multi-step and asymmetrically shaped laser beam scribing
US8703581B2 (en) 2011-06-15 2014-04-22 Applied Materials, Inc. Water soluble mask for substrate dicing by laser and plasma etch
US8557682B2 (en) 2011-06-15 2013-10-15 Applied Materials, Inc. Multi-layer mask for substrate dicing by laser and plasma etch
US8598016B2 (en) 2011-06-15 2013-12-03 Applied Materials, Inc. In-situ deposited mask layer for device singulation by laser scribing and plasma etch
US8557683B2 (en) 2011-06-15 2013-10-15 Applied Materials, Inc. Multi-step and asymmetrically shaped laser beam scribing
US8507363B2 (en) 2011-06-15 2013-08-13 Applied Materials, Inc. Laser and plasma etch wafer dicing using water-soluble die attach film
US8912077B2 (en) 2011-06-15 2014-12-16 Applied Materials, Inc. Hybrid laser and plasma etch wafer dicing using substrate carrier
US9129904B2 (en) 2011-06-15 2015-09-08 Applied Materials, Inc. Wafer dicing using pulse train laser with multiple-pulse bursts and plasma etch
US9126285B2 (en) 2011-06-15 2015-09-08 Applied Materials, Inc. Laser and plasma etch wafer dicing using physically-removable mask
US9029242B2 (en) 2011-06-15 2015-05-12 Applied Materials, Inc. Damage isolation by shaped beam delivery in laser scribing process
TWI540644B (zh) * 2011-07-01 2016-07-01 漢高智慧財產控股公司 斥性材料於半導體總成中保護製造區域之用途
US8951819B2 (en) 2011-07-11 2015-02-10 Applied Materials, Inc. Wafer dicing using hybrid split-beam laser scribing process with plasma etch
CN102931105A (zh) * 2011-08-10 2013-02-13 飞思卡尔半导体公司 半导体器件管芯键合
WO2013036230A1 (en) * 2011-09-08 2013-03-14 Intel Corporation Patterned adhesive tape for backgrinding processes
US8981435B2 (en) 2011-10-01 2015-03-17 Intel Corporation Source/drain contacts for non-planar transistors
JP5582314B2 (ja) * 2011-10-11 2014-09-03 Tdk株式会社 チップ部品支持装置及びその製造方法
US8629043B2 (en) * 2011-11-16 2014-01-14 Taiwan Semiconductor Manufacturing Company, Ltd. Methods for de-bonding carriers
US8652940B2 (en) 2012-04-10 2014-02-18 Applied Materials, Inc. Wafer dicing used hybrid multi-step laser scribing process with plasma etch
US8946057B2 (en) 2012-04-24 2015-02-03 Applied Materials, Inc. Laser and plasma etch wafer dicing using UV-curable adhesive film
US8969177B2 (en) 2012-06-29 2015-03-03 Applied Materials, Inc. Laser and plasma etch wafer dicing with a double sided UV-curable adhesive film
US9048309B2 (en) 2012-07-10 2015-06-02 Applied Materials, Inc. Uniform masking for wafer dicing using laser and plasma etch
US8993414B2 (en) 2012-07-13 2015-03-31 Applied Materials, Inc. Laser scribing and plasma etch for high die break strength and clean sidewall
US8845854B2 (en) 2012-07-13 2014-09-30 Applied Materials, Inc. Laser, plasma etch, and backside grind process for wafer dicing
US8940619B2 (en) * 2012-07-13 2015-01-27 Applied Materials, Inc. Method of diced wafer transportation
US8859397B2 (en) 2012-07-13 2014-10-14 Applied Materials, Inc. Method of coating water soluble mask for laser scribing and plasma etch
US9159574B2 (en) 2012-08-27 2015-10-13 Applied Materials, Inc. Method of silicon etch for trench sidewall smoothing
US9252057B2 (en) 2012-10-17 2016-02-02 Applied Materials, Inc. Laser and plasma etch wafer dicing with partial pre-curing of UV release dicing tape for film frame wafer application
US8975162B2 (en) 2012-12-20 2015-03-10 Applied Materials, Inc. Wafer dicing from wafer backside
US9236305B2 (en) 2013-01-25 2016-01-12 Applied Materials, Inc. Wafer dicing with etch chamber shield ring for film frame wafer applications
US8980726B2 (en) 2013-01-25 2015-03-17 Applied Materials, Inc. Substrate dicing by laser ablation and plasma etch damage removal for ultra-thin wafers
US9620379B2 (en) 2013-03-14 2017-04-11 Applied Materials, Inc. Multi-layer mask including non-photodefinable laser energy absorbing layer for substrate dicing by laser and plasma etch
US8883614B1 (en) 2013-05-22 2014-11-11 Applied Materials, Inc. Wafer dicing with wide kerf by laser scribing and plasma etching hybrid approach
US9105710B2 (en) 2013-08-30 2015-08-11 Applied Materials, Inc. Wafer dicing method for improving die packaging quality
US9224650B2 (en) 2013-09-19 2015-12-29 Applied Materials, Inc. Wafer dicing from wafer backside and front side
US9460966B2 (en) 2013-10-10 2016-10-04 Applied Materials, Inc. Method and apparatus for dicing wafers having thick passivation polymer layer
US9041198B2 (en) 2013-10-22 2015-05-26 Applied Materials, Inc. Maskless hybrid laser scribing and plasma etching wafer dicing process
US9199840B2 (en) 2013-11-01 2015-12-01 Freescale Semiconductor, Inc. Sensor protective coating
US9312177B2 (en) 2013-12-06 2016-04-12 Applied Materials, Inc. Screen print mask for laser scribe and plasma etch wafer dicing process
US9299614B2 (en) 2013-12-10 2016-03-29 Applied Materials, Inc. Method and carrier for dicing a wafer
US9293304B2 (en) 2013-12-17 2016-03-22 Applied Materials, Inc. Plasma thermal shield for heat dissipation in plasma chamber
US9012305B1 (en) 2014-01-29 2015-04-21 Applied Materials, Inc. Wafer dicing using hybrid laser scribing and plasma etch approach with intermediate non-reactive post mask-opening clean
US8927393B1 (en) 2014-01-29 2015-01-06 Applied Materials, Inc. Water soluble mask formation by dry film vacuum lamination for laser and plasma dicing
US9299611B2 (en) 2014-01-29 2016-03-29 Applied Materials, Inc. Method of wafer dicing using hybrid laser scribing and plasma etch approach with mask plasma treatment for improved mask etch resistance
US9018079B1 (en) 2014-01-29 2015-04-28 Applied Materials, Inc. Wafer dicing using hybrid laser scribing and plasma etch approach with intermediate reactive post mask-opening clean
US8991329B1 (en) 2014-01-31 2015-03-31 Applied Materials, Inc. Wafer coating
US9236284B2 (en) 2014-01-31 2016-01-12 Applied Materials, Inc. Cooled tape frame lift and low contact shadow ring for plasma heat isolation
US9130030B1 (en) 2014-03-07 2015-09-08 Applied Materials, Inc. Baking tool for improved wafer coating process
US20150255349A1 (en) 2014-03-07 2015-09-10 JAMES Matthew HOLDEN Approaches for cleaning a wafer during hybrid laser scribing and plasma etching wafer dicing processes
CN104925742B (zh) * 2014-03-20 2016-09-07 中芯国际集成电路制造(上海)有限公司 Mems半导体器件的形成方法
US9275902B2 (en) 2014-03-26 2016-03-01 Applied Materials, Inc. Dicing processes for thin wafers with bumps on wafer backside
US9076860B1 (en) 2014-04-04 2015-07-07 Applied Materials, Inc. Residue removal from singulated die sidewall
US8975163B1 (en) 2014-04-10 2015-03-10 Applied Materials, Inc. Laser-dominated laser scribing and plasma etch hybrid wafer dicing
US8932939B1 (en) 2014-04-14 2015-01-13 Applied Materials, Inc. Water soluble mask formation by dry film lamination
US8912078B1 (en) 2014-04-16 2014-12-16 Applied Materials, Inc. Dicing wafers having solder bumps on wafer backside
US8999816B1 (en) 2014-04-18 2015-04-07 Applied Materials, Inc. Pre-patterned dry laminate mask for wafer dicing processes
US8912075B1 (en) 2014-04-29 2014-12-16 Applied Materials, Inc. Wafer edge warp supression for thin wafer supported by tape frame
US9159621B1 (en) 2014-04-29 2015-10-13 Applied Materials, Inc. Dicing tape protection for wafer dicing using laser scribe process
US8980727B1 (en) 2014-05-07 2015-03-17 Applied Materials, Inc. Substrate patterning using hybrid laser scribing and plasma etching processing schemes
US9112050B1 (en) 2014-05-13 2015-08-18 Applied Materials, Inc. Dicing tape thermal management by wafer frame support ring cooling during plasma dicing
US9034771B1 (en) 2014-05-23 2015-05-19 Applied Materials, Inc. Cooling pedestal for dicing tape thermal management during plasma dicing
US9130057B1 (en) 2014-06-30 2015-09-08 Applied Materials, Inc. Hybrid dicing process using a blade and laser
US9165832B1 (en) 2014-06-30 2015-10-20 Applied Materials, Inc. Method of die singulation using laser ablation and induction of internal defects with a laser
US9142459B1 (en) 2014-06-30 2015-09-22 Applied Materials, Inc. Wafer dicing using hybrid laser scribing and plasma etch approach with mask application by vacuum lamination
US9093518B1 (en) 2014-06-30 2015-07-28 Applied Materials, Inc. Singulation of wafers having wafer-level underfill
US9349648B2 (en) 2014-07-22 2016-05-24 Applied Materials, Inc. Hybrid wafer dicing approach using a rectangular shaped two-dimensional top hat laser beam profile or a linear shaped one-dimensional top hat laser beam profile laser scribing process and plasma etch process
US9117868B1 (en) 2014-08-12 2015-08-25 Applied Materials, Inc. Bipolar electrostatic chuck for dicing tape thermal management during plasma dicing
US9196498B1 (en) 2014-08-12 2015-11-24 Applied Materials, Inc. Stationary actively-cooled shadow ring for heat dissipation in plasma chamber
US9281244B1 (en) 2014-09-18 2016-03-08 Applied Materials, Inc. Hybrid wafer dicing approach using an adaptive optics-controlled laser scribing process and plasma etch process
US11195756B2 (en) 2014-09-19 2021-12-07 Applied Materials, Inc. Proximity contact cover ring for plasma dicing
US9177861B1 (en) 2014-09-19 2015-11-03 Applied Materials, Inc. Hybrid wafer dicing approach using laser scribing process based on an elliptical laser beam profile or a spatio-temporal controlled laser beam profile
US9196536B1 (en) 2014-09-25 2015-11-24 Applied Materials, Inc. Hybrid wafer dicing approach using a phase modulated laser beam profile laser scribing process and plasma etch process
US9130056B1 (en) 2014-10-03 2015-09-08 Applied Materials, Inc. Bi-layer wafer-level underfill mask for wafer dicing and approaches for performing wafer dicing
US9245803B1 (en) 2014-10-17 2016-01-26 Applied Materials, Inc. Hybrid wafer dicing approach using a bessel beam shaper laser scribing process and plasma etch process
US10692765B2 (en) 2014-11-07 2020-06-23 Applied Materials, Inc. Transfer arm for film frame substrate handling during plasma singulation of wafers
JP2016115800A (ja) * 2014-12-15 2016-06-23 株式会社ディスコ ウエーハの加工方法
US9355907B1 (en) 2015-01-05 2016-05-31 Applied Materials, Inc. Hybrid wafer dicing approach using a line shaped laser beam profile laser scribing process and plasma etch process
US9159624B1 (en) 2015-01-05 2015-10-13 Applied Materials, Inc. Vacuum lamination of polymeric dry films for wafer dicing using hybrid laser scribing and plasma etch approach
US9330977B1 (en) 2015-01-05 2016-05-03 Applied Materials, Inc. Hybrid wafer dicing approach using a galvo scanner and linear stage hybrid motion laser scribing process and plasma etch process
JP2016136559A (ja) * 2015-01-23 2016-07-28 株式会社ディスコ 被加工物の切削方法
JP2016136558A (ja) * 2015-01-23 2016-07-28 株式会社ディスコ 被加工物の切削方法
JP2016207737A (ja) * 2015-04-17 2016-12-08 株式会社ディスコ 分割方法
US9601375B2 (en) 2015-04-27 2017-03-21 Applied Materials, Inc. UV-cure pre-treatment of carrier film for wafer dicing using hybrid laser scribing and plasma etch approach
CN107615453B (zh) * 2015-05-25 2020-09-01 琳得科株式会社 半导体装置的制造方法
US9721839B2 (en) 2015-06-12 2017-08-01 Applied Materials, Inc. Etch-resistant water soluble mask for hybrid wafer dicing using laser scribing and plasma etch
US9478455B1 (en) 2015-06-12 2016-10-25 Applied Materials, Inc. Thermal pyrolytic graphite shadow ring assembly for heat dissipation in plasma chamber
WO2017082210A1 (ja) * 2015-11-09 2017-05-18 古河電気工業株式会社 半導体チップの製造方法及びこれに用いるマスク一体型表面保護テープ
JP6503286B2 (ja) * 2015-12-24 2019-04-17 ルネサスエレクトロニクス株式会社 半導体装置の製造方法および半導体ウェハ
US9972575B2 (en) 2016-03-03 2018-05-15 Applied Materials, Inc. Hybrid wafer dicing approach using a split beam laser scribing process and plasma etch process
US9852997B2 (en) 2016-03-25 2017-12-26 Applied Materials, Inc. Hybrid wafer dicing approach using a rotating beam laser scribing process and plasma etch process
US9793132B1 (en) 2016-05-13 2017-10-17 Applied Materials, Inc. Etch mask for hybrid laser scribing and plasma etch wafer singulation process
CN106290296B (zh) * 2016-07-27 2020-11-27 深圳大学 一种基于金属点阵的sers基底及其制备方法和利用该基底进行拉曼检测的方法
US10276440B2 (en) 2017-01-19 2019-04-30 Honeywell International Inc. Removable temporary protective layers for use in semiconductor manufacturing
JP6837859B2 (ja) * 2017-02-14 2021-03-03 株式会社ディスコ ウエーハの加工方法
US11158540B2 (en) 2017-05-26 2021-10-26 Applied Materials, Inc. Light-absorbing mask for hybrid laser scribing and plasma etch wafer singulation process
US10363629B2 (en) 2017-06-01 2019-07-30 Applied Materials, Inc. Mitigation of particle contamination for wafer dicing processes
JP6524564B2 (ja) * 2017-06-28 2019-06-05 パナソニックIpマネジメント株式会社 素子チップの製造方法および基板加熱装置
CN107680834A (zh) * 2017-09-25 2018-02-09 中国振华集团云科电子有限公司 一种芯片电容的优化切割工艺及芯片电容
CN107894435B (zh) * 2017-11-20 2021-11-12 广东工业大学 一种pcb半孔切片的制作方法
US10535561B2 (en) 2018-03-12 2020-01-14 Applied Materials, Inc. Hybrid wafer dicing approach using a multiple pass laser scribing process and plasma etch process
CN110459506A (zh) * 2018-05-08 2019-11-15 山东浪潮华光光电子股份有限公司 一种改善led芯片切割污染的方法
CN110867501B (zh) * 2018-08-28 2020-11-27 山东浪潮华光光电子股份有限公司 一种GaAs基发光二极管芯片的切割方法
US11355394B2 (en) 2018-09-13 2022-06-07 Applied Materials, Inc. Wafer dicing using hybrid laser scribing and plasma etch approach with intermediate breakthrough treatment
US11011424B2 (en) 2019-08-06 2021-05-18 Applied Materials, Inc. Hybrid wafer dicing approach using a spatially multi-focused laser beam laser scribing process and plasma etch process
US11342226B2 (en) 2019-08-13 2022-05-24 Applied Materials, Inc. Hybrid wafer dicing approach using an actively-focused laser beam laser scribing process and plasma etch process
US10903121B1 (en) 2019-08-14 2021-01-26 Applied Materials, Inc. Hybrid wafer dicing approach using a uniform rotating beam laser scribing process and plasma etch process
US11600492B2 (en) 2019-12-10 2023-03-07 Applied Materials, Inc. Electrostatic chuck with reduced current leakage for hybrid laser scribing and plasma etch wafer singulation process
US11211247B2 (en) 2020-01-30 2021-12-28 Applied Materials, Inc. Water soluble organic-inorganic hybrid mask formulations and their applications
CN111521623B (zh) * 2020-04-28 2023-04-07 广西大学 一种提高粉末样品透射电镜原位加热芯片制样成功率的方法

Family Cites Families (16)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE3037250A1 (de) * 1980-10-02 1982-04-29 Joachim 7440 Nürtingen Dudzik Selbstklebeetikett
JPS6242426A (ja) * 1985-08-19 1987-02-24 Toshiba Corp 半導体素子の製造方法
DE4123900A1 (de) * 1991-07-18 1993-01-21 Siemens Ag Schutzschicht fuer wafer
US5362681A (en) * 1992-07-22 1994-11-08 Anaglog Devices, Inc. Method for separating circuit dies from a wafer
US5516728A (en) * 1994-03-31 1996-05-14 At&T Corp. Process for fabircating an integrated circuit
US5832585A (en) * 1996-08-13 1998-11-10 National Semiconductor Corporation Method of separating micro-devices formed on a substrate
US5923995A (en) * 1997-04-18 1999-07-13 National Semiconductor Corporation Methods and apparatuses for singulation of microelectromechanical systems
JPH11345793A (ja) * 1998-03-30 1999-12-14 Mitsui Chem Inc 半導体ウエハの裏面研削方法
US6465329B1 (en) * 1999-01-20 2002-10-15 Amkor Technology, Inc. Microcircuit die-sawing protector and method
JP4151164B2 (ja) * 1999-03-19 2008-09-17 株式会社デンソー 半導体装置の製造方法
JP3737343B2 (ja) * 1999-09-08 2006-01-18 シャープ株式会社 二次元画像検出器
JP4318353B2 (ja) * 1999-10-01 2009-08-19 パナソニック株式会社 基板の製造方法
US6603191B2 (en) * 2000-05-18 2003-08-05 Casio Computer Co., Ltd. Semiconductor device and method of manufacturing the same
US20020064931A1 (en) * 2000-07-03 2002-05-30 E. C. Ong Method and apparatus for applying a protective over-coating to a ball-grid-array (BGA) structure
JP2002110856A (ja) * 2000-10-03 2002-04-12 Sony Corp 半導体装置の製造方法
US6586276B2 (en) * 2001-07-11 2003-07-01 Intel Corporation Method for fabricating a microelectronic device using wafer-level adhesion layer deposition

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