CN1296988C - 用于保持晶片上的接合焊垫超洁净的方法 - Google Patents
用于保持晶片上的接合焊垫超洁净的方法 Download PDFInfo
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- 238000000034 method Methods 0.000 title claims description 28
- 235000012431 wafers Nutrition 0.000 claims abstract description 134
- XLYOFNOQVPJJNP-UHFFFAOYSA-N water Substances O XLYOFNOQVPJJNP-UHFFFAOYSA-N 0.000 claims abstract description 41
- 239000000498 cooling water Substances 0.000 claims abstract description 16
- 238000005520 cutting process Methods 0.000 claims description 33
- 239000008367 deionised water Substances 0.000 claims description 26
- 229910021641 deionized water Inorganic materials 0.000 claims description 25
- 238000004140 cleaning Methods 0.000 claims description 15
- 208000034189 Sclerosis Diseases 0.000 claims description 9
- 239000000428 dust Substances 0.000 claims description 9
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 claims description 8
- 229910052710 silicon Inorganic materials 0.000 claims description 8
- 239000010703 silicon Substances 0.000 claims description 8
- 239000004576 sand Substances 0.000 claims description 7
- 239000013078 crystal Substances 0.000 claims description 3
- 238000005530 etching Methods 0.000 claims description 3
- 239000007788 liquid Substances 0.000 claims description 3
- 238000001914 filtration Methods 0.000 claims description 2
- 230000007935 neutral effect Effects 0.000 claims 5
- 239000012535 impurity Substances 0.000 claims 3
- 238000000746 purification Methods 0.000 claims 1
- 238000010791 quenching Methods 0.000 claims 1
- 230000005855 radiation Effects 0.000 claims 1
- 229940035658 visco-gel Drugs 0.000 claims 1
- 230000001681 protective effect Effects 0.000 abstract description 10
- 239000004065 semiconductor Substances 0.000 abstract description 5
- 239000011241 protective layer Substances 0.000 abstract description 3
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 33
- 239000000377 silicon dioxide Substances 0.000 description 14
- 239000004071 soot Substances 0.000 description 14
- 230000003321 amplification Effects 0.000 description 9
- 238000003199 nucleic acid amplification method Methods 0.000 description 9
- 239000010410 layer Substances 0.000 description 6
- 238000002161 passivation Methods 0.000 description 5
- CURLTUGMZLYLDI-UHFFFAOYSA-N Carbon dioxide Chemical compound O=C=O CURLTUGMZLYLDI-UHFFFAOYSA-N 0.000 description 4
- 238000005516 engineering process Methods 0.000 description 4
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 description 4
- 239000010931 gold Substances 0.000 description 4
- 229910052737 gold Inorganic materials 0.000 description 4
- 229910052751 metal Inorganic materials 0.000 description 4
- 239000002184 metal Substances 0.000 description 4
- 239000002245 particle Substances 0.000 description 4
- 230000003068 static effect Effects 0.000 description 4
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 description 3
- 239000004411 aluminium Substances 0.000 description 3
- 229910052782 aluminium Inorganic materials 0.000 description 3
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 3
- 238000001816 cooling Methods 0.000 description 3
- 229910052802 copper Inorganic materials 0.000 description 3
- 239000010949 copper Substances 0.000 description 3
- 238000002242 deionisation method Methods 0.000 description 3
- 238000010410 dusting Methods 0.000 description 3
- 238000009413 insulation Methods 0.000 description 3
- 239000011229 interlayer Substances 0.000 description 3
- 239000004094 surface-active agent Substances 0.000 description 3
- 229910002092 carbon dioxide Inorganic materials 0.000 description 2
- 238000005538 encapsulation Methods 0.000 description 2
- 238000000227 grinding Methods 0.000 description 2
- 238000009434 installation Methods 0.000 description 2
- 238000004519 manufacturing process Methods 0.000 description 2
- 238000003466 welding Methods 0.000 description 2
- 208000027418 Wounds and injury Diseases 0.000 description 1
- IZJSTXINDUKPRP-UHFFFAOYSA-N aluminum lead Chemical compound [Al].[Pb] IZJSTXINDUKPRP-UHFFFAOYSA-N 0.000 description 1
- 230000005540 biological transmission Effects 0.000 description 1
- 239000001569 carbon dioxide Substances 0.000 description 1
- 239000011248 coating agent Substances 0.000 description 1
- 238000000576 coating method Methods 0.000 description 1
- 239000004020 conductor Substances 0.000 description 1
- 230000006378 damage Effects 0.000 description 1
- 229910003460 diamond Inorganic materials 0.000 description 1
- 239000010432 diamond Substances 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 229910001651 emery Inorganic materials 0.000 description 1
- 239000003344 environmental pollutant Substances 0.000 description 1
- 238000010438 heat treatment Methods 0.000 description 1
- 208000014674 injury Diseases 0.000 description 1
- 238000011068 loading method Methods 0.000 description 1
- 239000012528 membrane Substances 0.000 description 1
- 229920002120 photoresistant polymer Polymers 0.000 description 1
- 238000001020 plasma etching Methods 0.000 description 1
- 231100000719 pollutant Toxicity 0.000 description 1
- 238000006116 polymerization reaction Methods 0.000 description 1
- 239000000843 powder Substances 0.000 description 1
- 238000012545 processing Methods 0.000 description 1
- 238000012797 qualification Methods 0.000 description 1
- 238000011084 recovery Methods 0.000 description 1
- 239000011863 silicon-based powder Substances 0.000 description 1
- 238000005507 spraying Methods 0.000 description 1
- 238000010186 staining Methods 0.000 description 1
- 239000000758 substrate Substances 0.000 description 1
- 239000008399 tap water Substances 0.000 description 1
- 235000020679 tap water Nutrition 0.000 description 1
- 238000012360 testing method Methods 0.000 description 1
- 238000012546 transfer Methods 0.000 description 1
- 239000003643 water by type Substances 0.000 description 1
- 238000009736 wetting Methods 0.000 description 1
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- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/0401—Bonding areas specifically adapted for bump connectors, e.g. under bump metallisation [UBM]
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- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
- H01L2224/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
- H01L2224/45001—Core members of the connector
- H01L2224/45099—Material
- H01L2224/451—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
- H01L2224/45117—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 400°C and less than 950°C
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- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
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- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/102—Material of the semiconductor or solid state bodies
- H01L2924/1025—Semiconducting materials
- H01L2924/10251—Elemental semiconductors, i.e. Group IV
- H01L2924/10253—Silicon [Si]
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- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10S438/00—Semiconductor device manufacturing: process
- Y10S438/976—Temporary protective layer
Abstract
本发明教示一种在芯片上具有超洁净接合焊垫的被切割开的晶片,其增强了引线接合的强度,并导致了封装半导体芯片的较高的成品率和提高的可靠性。准备用于切片的洁净晶片涂覆有可去除的绝缘水溶性非电离薄膜,该薄膜增强了切口的洁净度并减少了堆积。通过加热来硬化保护膜,并且其可抵抗被用在划片机中的冷却水去除。然而,切片后在晶片洗净器中利用高压温热的去离子水(D.I.水)可将保护膜去除。去除保护膜后该电极焊垫实质上与切片之前一样洁净。该薄膜可在切割开的晶片准备使用之前一直用作保护层。
Description
技术领域
本发明涉及在载具、引线框、基板或印刷电路(PC)板之内或之上的最后的封装步骤之前切割和切单(singulating)半导体器件。更特别的是,本发明涉及一种在切割或切单工艺期间用于保持接合焊垫或凸块超洁净的方法和装置。
背景技术
迄今为止,配有薄型划片机刀片(blade)的划片机已经用于切割处于单个芯片(die)之间的空白渠道(street)或切口,该单个芯片位于安装于切片带(dicing tape)之晶片上,或位于以最大的切片带供应者命名的NITTO.TM带上的晶片上。切割操作产生非常细的硅粉尘,沉淀在芯片上并覆盖接合焊垫或芯片上的电极。尽管在切割操作中,目前工艺水平的划片机仍采用冷却水和洁净水,但是,切割晶片之后有必要在晶片洗净器中清洗晶片以去除聚集在凹槽式的接合焊垫中的硅粉尘。
将冷却水喷射到晶片和/或被切割的切口处的锯片上。即使采用去离子水切割和清洗晶片,摩擦仍可以引起静电放电(ESD),反过来静电放电不仅可能大得足够破坏目前工艺水平的半导体器件,而且还会引起不良的浸润性硅粉尘,从而导致接合焊垫的干点(dry spot)玷污。除非将硅粉尘从引线接合处完全去除,否则会产生接合可靠性问题。
众所周知,硅粉尘颗粒会堆积在晶片的刀片上。这些颗粒引起刀片载荷(blade loading),从而缩短刀片寿命,并引起晶片底部上运行的刀片退出或离开切割位置处的切屑。
在半导体工厂可获得的去离子水具有每厘米16至18兆欧的电导率级。如果通过公知的技术和步骤藉由CO2在容器中处理,则可以产生达到每厘米1兆欧的超洁净去离子.水,并减少了静电放电。但该专用的非常洁净的去离子.水价格不菲。目前工艺水平的划片机每小时需要使用五十加仑。晶片洁净器每小时使用三至十加仑的去离子水。可以改变清洗周期和冷却水,以减少接合焊垫上的尘斑。可以将表面活化剂润湿和清洁溶液添加到清洗水和冷却水中,以此获得大于95%无粉尘的接合焊垫区域,同时耗费较少的去离子水。
非常需要提供一种方法和装置,来消除在划片机和晶片洗净器使用中对多数,如果不是所有的话,高价格超洁净去离子水的需要,并且同时增加接合焊垫上的无粉尘面积百分比,以便增强引线接合的强度。
发明内容
本发明的一个主要目的是提供一种具有几乎无粉尘的表面和接合焊垫的半导体晶片。
本发明的一个主要目的是提供一种防止硅粉尘堆积在晶片和芯片的接合焊垫上的新方法。
本发明的一个主要目的是消除对所有或大多数超洁净去离子水的需要以及去离子水的二氧化碳处理。
本发明的一个主要目的是提供一种几乎消除晶片底表面处芯片切屑(chipping)的方法。
本发明的一个主要目的是在切割操作期间提供一种用于晶片的水溶性的可去除的非电离保护膜。
本发明的一个主要目的是在切割操作期间提供一种在导电的接合焊垫和晶片之上的静电放电保护涂层。
本发明的一个主要目的是提供一种用于硅晶片的可去除的水溶性非电离膜。
本发明的一个总的目的是当进行切割操作时提供一种实质上消除对去离子水的需要的方法。
本发明的一个总的目的是当进行晶片清洗操作时提供一种需要较少的非常洁净的去离子.水和几乎消除对超洁净去离子水的需要的方法。
根据本发明的这些和其它目的,准备切片的洁净晶片被涂覆可去除的水溶性非电离膜,其中非电离膜由通过加热变硬的凝胶、浆糊或粘性液体的喷雾构成,其中加热采用例如紫外线、红外线或对流传热的方法。硬化膜不溶于用于切片的冷却水中,但是切片后,在晶片洗净器中利用温水和高水压可将硬化膜去除。保护涂层几乎消除了沉淀在切割后的芯片的凹槽式接合焊垫中的晶片粉尘。
附图说明
图1是硅晶片被安装到切片带上且被切割成单个芯片之前的现有技术的洁净硅晶片的等比例图;
图2是从示出多个接合焊垫的晶片上切割或切成片之后的现有技术的单个芯片放大了的平面图;
图3是穿过图2的线3-3处的接合焊垫得到的放大了的正视剖面图;
图4是穿过晶片的整个深度切割并切割成切片带之后,晶片安装于粘性的切片带上,穿过现有技术的若干芯片得到的放大了的正视剖面图;
图5是在进行切割操作之前的类似于图4所示的可去除的保护涂层被施加到本发明的晶片上的放大了的正视剖面图;
图6是切穿晶片之后但在除去保护涂层之前的图5所示晶片的放大了的正视剖面图;
图7是图5中示出的另一类型的晶片放大了的正视剖面图,其中切割没有延伸穿过晶片以避免底表面破裂及碎裂;
图8是通过清洗去除来自切口的剩余物以及将第二可移除的水溶性膜和背部研磨带(back grinding tape)添加到晶片的顶部上之后,图7中示出的晶片放大了的正视剖面图;
图9是切片带和晶片底部的一部分被移除之后的图8中示出的晶片放大了的正视剖面图;
图10是晶片被清洗和烘干并且将第二个切片带施加到晶片的底部之后的图9中示出的晶片放大了的正视剖面图;
图11是背部研磨带和第二保护膜被移除之后的图10中示出的晶片放大了的正视剖面图;
图12是制造图6中示出的受保护晶片所采用的具体例子的步骤的方块图,图6中示出的晶片可被清洗和烘干以提供如图4中所示的晶片;以及
图13是制造图4中所示的晶片所采用的具体例子的步骤的方块图,其中图4采用图5和图7至图11中示出的晶片。
具体实施方式
现在参考图1,图1示出被安装到切片带上并被切割成单个芯片11之前的现有技术洁净硅晶片10的等比例图。
在多个晶片被切割成单个芯片的早些年中,去离子水用来润滑和冷却金刚石切割刀片。切割刀片必须被冷却以防止类似于砂轮或切割轮上的热聚集(building up)。额外的热量会破坏薄型切割刀片和硅晶片。去离子水使刀片冷却并有助于保持晶片洁净。来自切片操作中的亚微米尺寸的硅粉尘产生颗粒,该颗粒很难湿化并趋向于积聚在晶片表面上,特别是积聚在接合焊垫区域上,其中在接合焊垫区域处焊接金或铝的细导线以使载具封装互连。多数现代的芯片覆盖有薄钝化层以保护并绝缘晶片上的电路在处理期间不受损坏。然而,金、铜或铝的接合焊垫不具有钝化层。接合焊垫裸露出金属并位于钝化层表面之下。每个接合焊垫与芯片上的浅井一样。在切片期间和清洗操作之后,大部分的硅粉尘从晶片表面清洗掉。然而,在切片期间由于切片冷却水从晶片流掉,接合焊垫聚集有硅粉尘。当水从晶片上流掉时,接合焊垫的下表面会俘获粉尘。具有较小芯片的较大晶片产生更多玷污接合焊垫的硅粉尘。近些年来,切割操作使用表面活化剂来减少去离子水的表面张力,帮助从晶片表面去除硅粉尘。虽然表面活化剂在冷却刀片和使晶片洁净方面已有些许成效,但在保持接合焊垫洁净方面不是十分成功。如果在接合焊垫上存在过量的硅粉尘,将减少金、铜或铝引线接合的接合强度。器件被焊接和封装并安装入某个电子系统中之后,玷污的接合焊垫会导致电路发生故障。洁净的接合焊垫将增加半导体的合格率并提高半导体的可靠性。
现在参考图2,图2示出现有技术的具有若干凹槽式接合焊垫12的单晶片11放大了的平面图。这种芯片在各边上可具有100多个接合焊垫,因此,示出的芯片11起说明目的。在一个优选的实施例中,芯片11被焊接到引线框(未示出)上,并且电极或焊垫12焊接有将焊垫12连接到接头或引出焊垫(未示出)的导线。
现在参考图3,图3示出穿过图2的接合焊垫12得到的放大了的正视剖面图。
接合焊垫12包括连接到电路(未示出)中以及芯片11上的一层导电材料13,例如金、铜或铝。凹槽式接合焊垫12为不容易被去除的亚微米级的硅灰尘提供一个捕集阱。芯片11优选覆盖有钝化层14,该钝化层14不仅与芯片中和芯片上的电路绝缘,而且保护芯片中和芯片上的电路。如果将足够的静电荷施加到电极12上,就会破坏芯片11上的电路。在晶片10的切割和清洗操作期间,避免静电放电是很重要的。
现在参考图4,图4示出穿过安装于切片带15上的现有技术的晶片10的若干芯片11得到的放大了的正视剖面图。现有技术的空白渠道或截槽16被示出延伸进切片带达1/1000英寸深,完全使一个芯片11与其它芯片切开。该芯片通常是一英寸厚的千分之6至20(Mils),并且尺寸在一侧在18Mils至大约450Mils之间变化。
如图4所示被切割和清洗了的芯片11的晶片10可以用于芯片接合器中,该芯片接合器选择优良的芯片用于焊接,或用于具有优良芯片装载带的载具或用于装载供挑选和放置器使用的托盘(trays)(未示出)。依制造和装配操作而定,图4中所示的被切割和测试过的晶片通常没有立即并入系统中并且在使用之前必须被保护。
现在参考图5,图5示出洁净晶片10放大了的正视剖面图,该洁净晶片10类似于在被切片或切割之前安装于柔性的切片带上或NITTo.TM带15上的图1和图4中的晶片10。晶片10具有保护层或薄膜17。该薄膜可以被喷溅或施加到光致抗蚀剂旋转器中,随后通过例如U.V.或I.R.或热传递被加热硬化。在优选的实施例中,该薄膜在达到每平方英寸大约1400英镑的高压下对温水具有水溶性,但不会溶解于划片机所使用的冷却水。非电离薄膜包括水溶性的U.V.可愈的保护涂层。该薄膜17是绝缘的并覆盖导电电极或焊垫12以屏蔽它们不受硅粉尘和静电放电的影响。
现在参考图6,图6示出切割完全穿过晶片并进入切片带15留下分开的芯片11连在切片带15上之后的图5的晶片。当图6中示出的晶片在晶片洗净器中清洗时,将薄膜17和全部硅粉末从晶片10、切口16和焊垫12上去除。在引线接合之前,准备好洁净的晶片,以待进一步加工入载具等或焊接芯片。
现在参考图7,图7示出图5所示类型的晶片10的放大了的正视截面图,其中图5中示出的晶片10是被切片或切割成具有不延伸入切片带15中的浅切口或渠道之后的晶片。选择切口18的深度以防止在切口18的底部中产生裂缝或断开。在进行下一个步骤之前,在晶片洗净器中清洗该晶片以去除所有的粉尘和污染物,但不需要去除可在该处理中进行的任何的或所有的保护层17。
现在参考图8,图8示出晶片被清洗并且将第二可去除水溶性薄膜19施加到第一薄膜17(若存在)上,或施加到晶片的芯片11的顶部上之后,图7中示出的晶片的放大了的正视截面图。同样将可从NITTO DINKE公司获得的背部研磨带21施加于第二薄膜19的顶部上,用来形成具有外部NITTO.TM.带15和21的不易弯曲(stiff)的或刚硬(rigid)的夹层。
现在参考图9,图9示出带15被去除并且芯片11(晶片10)的底部已接地或刻蚀之后图8中示出的晶片的放大了的正视截面图。背部研磨器和等离子体刻蚀器(未示出)是商业上可获得的。芯片11的底部边缘22不具有能影响电路以及小芯片的精确尺寸的切屑和裂缝,。如果该芯片11面朝下安装,如同具有凸块和球栅格阵列(BGA)的倒装芯片的安装,则需要理想的底表面用于堆叠芯片。清洗图9中的晶片以便于去除所有的研磨和/或刻蚀粉末,但不去除薄膜19和/或17,并将芯片11保持于一个适当地间隔的阵列中。
现在参考图10,图10示出将第二切片带23施加到分开的芯片阵列的底部之后的图9中芯片11的夹层。
现在参考图11,图11示出在去除背部研磨带21以便去除水溶性薄膜19和/或17之后图10中芯片11的夹层,在晶片洗净器中使用去离子水或超洁净的去离子水以免损伤保护电极12。期望用超洁净自来水清洗来洗净某些芯片11,然而,因为已经节省了在划片机中使用的大量的去离子水,这一步骤可以因晶片而异,但也许无需改变工艺。应当注意的是,图11的最终结果是一排在切片带23上即可使用的芯片。
现在参考图12,图12示出具有七个方块和具体例子的步骤29至31的方块图,其中步骤29-31可用来制造图5和6中示出的受保护的晶片。由于某些步骤可以以不同顺序进行,所以该例子是示例性的并可由晶片制备工艺技术人员进行改变。
考虑到步骤24至30是自描述,因此不需要额外的说明。然而,当切割晶片时,步骤28需要冷却水。应当明白的是,不需要超洁净去离子水!而且,不需要商业上可获得的去离子水,因此,对本领域提供洁净经过滤的冷却水的技术人员而言,每小时每次切割节省50加仑的去离子水是可以实现的。不管怎样,该方法都能产生至今尚不可得的超洁净无粉尘的硅接合焊垫12。
如果制造者熟练得足以提供洁净的过滤的自来水,则其可在切割中被用做冷却水,然而,在洗净器中的最后的清洗水需是超洁净的去离子水。
现在参考图13,图13示出具有十五个方块和另一具体例子的方块图,其中在该例子中方块32至46中的步骤顺序可以改变。该方法不同于先前方法之处在于,其使用背部研磨带21来获得在芯片11上的理想的底部边缘22时采用两个保护膜17和19以及两个切片带15和23。
图13中示出的方法在方块36处与图12中的方块28中一样节省超洁净去离子水或去离子水。然而,如果直到最后的清洗步骤45都没有从电极或焊垫12上去除保护膜17,则在方块37中不需要使用去离子水。
置于方块32至35中的步骤是自叙述的,不需要在说明书中做进一步地解释,并且在此作为参考引入。
总之,在切片前保持焊垫12洁净直至切割的芯片准备使用为止,现有技术的晶片10被涂覆保护涂层17,其中晶片10具有带有焊垫12的洁净的上表面。薄膜或保护涂层17可留在晶片10上直至准备使用为止,因此,在装运和处理期间可以用作保护涂层。
许多晶片和芯片的制造商将完整的晶片提供给装配承包商,装配承包商将芯片放置在载具中、网格座中或其它形式的载具中或直接从切片带选择芯片。因此,本发明不仅提高了焊垫的清洁度,而且降低了工艺中去离子水的费用,并在直至使用前为晶片和芯片提供额外的保护。
已说明用于提供超洁净芯片焊垫和无切屑(chip-free)的受保护的芯片的优选的方法及其变形,所属领域技术人员在不脱离本发明的范围下可以改变步骤的顺序。用和没有用保护膜17测试之前和之后显示了接合焊垫12上余下少了约100%的硅粉尘。
Claims (11)
1.一种保护晶片接合焊垫在切单或切片期间不受硅晶片粉尘和杂质污染的方法,包括如下步骤:
提供一安装于一切片带上的待切割的洁净晶片;
将一中性硬化水溶性薄膜施加到待切割的晶片表面之上;
切割穿过所述水溶性薄膜和所述晶片并部分地进入所述切片带;
在切割晶片时不去除水溶性薄膜的情况下,使用洁净冷却水冷却所述的晶片;
利用高压洁净的温暖的去离子水在一晶片洗净器中清洗所述晶片,以从单个芯片的表面及所述晶片切口处去除所述中性的硬化水溶性薄膜;以及
在从安装于所述切片带上的所述晶片处移去单个芯片前干燥所述晶片。
2.根据权利要求1的方法,其中所述的洁净冷却水包括非去离子水,如果没有中性硬化水溶性薄膜的保护,则非去离子水通常会与所述芯片裸露的接合焊垫发生反应。
3.根据权利要求1的方法,其中施加一中性硬化水溶性薄膜的步骤包括将粘性液体均匀地施加到所述晶片的顶表面上的步骤;以及硬化和干燥所述薄膜的步骤。
4.根据权利要求3的方法,其中硬化和干燥所述薄膜的步骤包括将所述薄膜暴露于紫外线或红外线辐射中。
5.根据权利要求1的方法,其中将一薄膜施加到晶片表面之上的步骤包括施加粘性凝胶、浆糊或液体。
6.一种保护晶片接合焊垫在通过切割操作将一晶片分离期间不受硅晶片粉尘和杂质污染的方法,包括如下步骤:
将待切割成芯片的一洁净晶片安装于一第一切片带上;
将一第一中性可硬化水溶性薄膜施加于待切割晶片的顶表面上;
使水溶性薄膜硬化以防止其溶解于冷却水中;
穿过所述水溶性薄膜切割并部分地进入所述晶片;
在一晶片洗净器中清洗所述被切割的晶片以去除晶片粉尘和所述第一中性可硬化水溶性薄膜;
干燥所述被清洗并切割过的晶片;
将一第二中性可硬化水溶性薄膜施加于晶片的顶表面上并将其施加入所述晶片的切口中;
硬化并干燥所述的第二中性可硬化水溶性薄膜;
将一背部研磨带施加于所述的第二薄膜的顶部上;
将所述的切片带从所述被部分切开的晶片的底部去除;
去除所述晶片的底部的一部分,以将晶片分成芯片上具有非常洁净边缘的单个芯片;
在一晶片洗净器中清洗所述被切割的晶片以去除晶片粉尘;
干燥所述被清洗并切割的晶片;
将所述被清洗并切割的干晶片安装于第二切片带上;并且
去除所述背部研磨带和所述晶片上的所述第一中性可硬化水溶性薄膜和所述第二中性可硬化水溶性薄膜的至少一者,以提供具有无毛刺和无裂缝边缘的单个芯片。
7.根据权利要求6的方法,其中去除所述晶片的底部的一部分的步骤包括刻蚀或背部研磨。
8.根据权利要求6的方法,其中在去除所述晶片的底部的一部分之后,清洗所述被清洗并被切割过的晶片的步骤包括用洁净冷却水清洗以免去除所述第一中性可硬化水溶性薄膜和所述第二中性可硬化水溶性薄膜的至少一者。
9.根据权利要求6的方法,其中去除所述中性可硬化水溶性薄膜或来自所述晶片的薄膜的步骤包括:利用高压去离子水在一晶片洗净器中清洗所述晶片,以去除其上所有的水溶性薄膜和杂质。
10.根据权利要求6的方法,其中穿过所述水溶性薄膜切割并部分进入所述晶片的步骤进一步包括:将洁净的中性冷却水水流施加到划片机的刀片和被切割的晶片上。
11.根据权利要求10的方法,其中所述的洁净的中性冷却水包括经净化过滤了的自来水。
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Families Citing this family (133)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP4260405B2 (ja) * | 2002-02-08 | 2009-04-30 | 株式会社ルネサステクノロジ | 半導体集積回路装置の製造方法 |
CN1287435C (zh) * | 2002-06-27 | 2006-11-29 | 松下电器产业株式会社 | 半导体装置及其制造方法 |
US20050064679A1 (en) * | 2003-09-19 | 2005-03-24 | Farnworth Warren M. | Consolidatable composite materials, articles of manufacture formed therefrom, and fabrication methods |
US20050064683A1 (en) * | 2003-09-19 | 2005-03-24 | Farnworth Warren M. | Method and apparatus for supporting wafers for die singulation and subsequent handling |
US7713841B2 (en) * | 2003-09-19 | 2010-05-11 | Micron Technology, Inc. | Methods for thinning semiconductor substrates that employ support structures formed on the substrates |
US6861336B1 (en) * | 2003-11-30 | 2005-03-01 | Union Semiconductor Technology Corporation | Die thinning methods |
US7244665B2 (en) * | 2004-04-29 | 2007-07-17 | Micron Technology, Inc. | Wafer edge ring structures and methods of formation |
US7547978B2 (en) * | 2004-06-14 | 2009-06-16 | Micron Technology, Inc. | Underfill and encapsulation of semiconductor assemblies with materials having differing properties |
US20080138962A1 (en) * | 2004-07-22 | 2008-06-12 | Renesas Technology Corp. | Manufacturing Method of Semiconductor Device |
US20060046433A1 (en) * | 2004-08-25 | 2006-03-02 | Sterrett Terry L | Thinning semiconductor wafers |
US7049208B2 (en) | 2004-10-11 | 2006-05-23 | Intel Corporation | Method of manufacturing of thin based substrate |
JP2006253402A (ja) * | 2005-03-10 | 2006-09-21 | Nec Electronics Corp | 半導体装置の製造方法 |
CN100364060C (zh) * | 2005-03-17 | 2008-01-23 | 郑明德 | 半导体元件的清洗方法 |
JP2006272505A (ja) * | 2005-03-29 | 2006-10-12 | Nitto Denko Corp | 保護テープ切断方法およびこれを用いた装置 |
JP4728033B2 (ja) * | 2005-04-19 | 2011-07-20 | 株式会社ディスコ | 半導体ウエーハの加工方法 |
US20070072338A1 (en) * | 2005-09-26 | 2007-03-29 | Advanced Chip Engineering Technology Inc. | Method for separating package of WLP |
JP4851795B2 (ja) * | 2006-01-13 | 2012-01-11 | 株式会社ディスコ | ウエーハの分割装置 |
JP4861072B2 (ja) * | 2006-06-20 | 2012-01-25 | オンセミコンダクター・トレーディング・リミテッド | 半導体装置及びその製造方法 |
EP1884981A1 (en) * | 2006-08-03 | 2008-02-06 | STMicroelectronics Ltd (Malta) | Removable wafer expander for die bonding equipment. |
SG147330A1 (en) | 2007-04-19 | 2008-11-28 | Micron Technology Inc | Semiconductor workpiece carriers and methods for processing semiconductor workpieces |
CN101359639B (zh) * | 2007-07-31 | 2012-05-16 | 欣兴电子股份有限公司 | 埋入半导体芯片的电路板结构及其制法 |
US7923298B2 (en) | 2007-09-07 | 2011-04-12 | Micron Technology, Inc. | Imager die package and methods of packaging an imager die on a temporary carrier |
ITRM20080610A1 (it) | 2008-11-13 | 2010-05-14 | Aptina Imaging Corp | Procedimento per passivazione in umido di piazzole di unione per protezione contro un trattamento successivo basato su tmah. |
JP2011014652A (ja) * | 2009-06-30 | 2011-01-20 | Panasonic Electric Works Co Ltd | 機能性デバイスの製造方法および、それにより製造された機能性デバイスを用いた半導体装置の製造方法 |
US8642448B2 (en) | 2010-06-22 | 2014-02-04 | Applied Materials, Inc. | Wafer dicing using femtosecond-based laser and plasma etch |
US9129904B2 (en) | 2011-06-15 | 2015-09-08 | Applied Materials, Inc. | Wafer dicing using pulse train laser with multiple-pulse bursts and plasma etch |
US9029242B2 (en) | 2011-06-15 | 2015-05-12 | Applied Materials, Inc. | Damage isolation by shaped beam delivery in laser scribing process |
US8703581B2 (en) | 2011-06-15 | 2014-04-22 | Applied Materials, Inc. | Water soluble mask for substrate dicing by laser and plasma etch |
US8598016B2 (en) | 2011-06-15 | 2013-12-03 | Applied Materials, Inc. | In-situ deposited mask layer for device singulation by laser scribing and plasma etch |
US8759197B2 (en) | 2011-06-15 | 2014-06-24 | Applied Materials, Inc. | Multi-step and asymmetrically shaped laser beam scribing |
US9126285B2 (en) | 2011-06-15 | 2015-09-08 | Applied Materials, Inc. | Laser and plasma etch wafer dicing using physically-removable mask |
US8507363B2 (en) | 2011-06-15 | 2013-08-13 | Applied Materials, Inc. | Laser and plasma etch wafer dicing using water-soluble die attach film |
US8557683B2 (en) | 2011-06-15 | 2013-10-15 | Applied Materials, Inc. | Multi-step and asymmetrically shaped laser beam scribing |
US8912077B2 (en) | 2011-06-15 | 2014-12-16 | Applied Materials, Inc. | Hybrid laser and plasma etch wafer dicing using substrate carrier |
US8557682B2 (en) | 2011-06-15 | 2013-10-15 | Applied Materials, Inc. | Multi-layer mask for substrate dicing by laser and plasma etch |
TWI540644B (zh) | 2011-07-01 | 2016-07-01 | 漢高智慧財產控股公司 | 斥性材料於半導體總成中保護製造區域之用途 |
US8951819B2 (en) | 2011-07-11 | 2015-02-10 | Applied Materials, Inc. | Wafer dicing using hybrid split-beam laser scribing process with plasma etch |
CN102931105A (zh) * | 2011-08-10 | 2013-02-13 | 飞思卡尔半导体公司 | 半导体器件管芯键合 |
WO2013036230A1 (en) * | 2011-09-08 | 2013-03-14 | Intel Corporation | Patterned adhesive tape for backgrinding processes |
CN103918083A (zh) | 2011-10-01 | 2014-07-09 | 英特尔公司 | 非平面晶体管的源极/漏极触点 |
JP5582314B2 (ja) * | 2011-10-11 | 2014-09-03 | Tdk株式会社 | チップ部品支持装置及びその製造方法 |
US8629043B2 (en) * | 2011-11-16 | 2014-01-14 | Taiwan Semiconductor Manufacturing Company, Ltd. | Methods for de-bonding carriers |
US8652940B2 (en) | 2012-04-10 | 2014-02-18 | Applied Materials, Inc. | Wafer dicing used hybrid multi-step laser scribing process with plasma etch |
US8946057B2 (en) | 2012-04-24 | 2015-02-03 | Applied Materials, Inc. | Laser and plasma etch wafer dicing using UV-curable adhesive film |
US8969177B2 (en) | 2012-06-29 | 2015-03-03 | Applied Materials, Inc. | Laser and plasma etch wafer dicing with a double sided UV-curable adhesive film |
US9048309B2 (en) | 2012-07-10 | 2015-06-02 | Applied Materials, Inc. | Uniform masking for wafer dicing using laser and plasma etch |
US8993414B2 (en) | 2012-07-13 | 2015-03-31 | Applied Materials, Inc. | Laser scribing and plasma etch for high die break strength and clean sidewall |
US8940619B2 (en) * | 2012-07-13 | 2015-01-27 | Applied Materials, Inc. | Method of diced wafer transportation |
US8845854B2 (en) | 2012-07-13 | 2014-09-30 | Applied Materials, Inc. | Laser, plasma etch, and backside grind process for wafer dicing |
US8859397B2 (en) | 2012-07-13 | 2014-10-14 | Applied Materials, Inc. | Method of coating water soluble mask for laser scribing and plasma etch |
US9159574B2 (en) | 2012-08-27 | 2015-10-13 | Applied Materials, Inc. | Method of silicon etch for trench sidewall smoothing |
US9252057B2 (en) | 2012-10-17 | 2016-02-02 | Applied Materials, Inc. | Laser and plasma etch wafer dicing with partial pre-curing of UV release dicing tape for film frame wafer application |
US8975162B2 (en) | 2012-12-20 | 2015-03-10 | Applied Materials, Inc. | Wafer dicing from wafer backside |
US9236305B2 (en) | 2013-01-25 | 2016-01-12 | Applied Materials, Inc. | Wafer dicing with etch chamber shield ring for film frame wafer applications |
US8980726B2 (en) | 2013-01-25 | 2015-03-17 | Applied Materials, Inc. | Substrate dicing by laser ablation and plasma etch damage removal for ultra-thin wafers |
WO2014159464A1 (en) | 2013-03-14 | 2014-10-02 | Applied Materials, Inc. | Multi-layer mask including non-photodefinable laser energy absorbing layer for substrate dicing by laser and plasma etch |
US8883614B1 (en) | 2013-05-22 | 2014-11-11 | Applied Materials, Inc. | Wafer dicing with wide kerf by laser scribing and plasma etching hybrid approach |
US9105710B2 (en) | 2013-08-30 | 2015-08-11 | Applied Materials, Inc. | Wafer dicing method for improving die packaging quality |
US9224650B2 (en) | 2013-09-19 | 2015-12-29 | Applied Materials, Inc. | Wafer dicing from wafer backside and front side |
US9460966B2 (en) | 2013-10-10 | 2016-10-04 | Applied Materials, Inc. | Method and apparatus for dicing wafers having thick passivation polymer layer |
US9041198B2 (en) | 2013-10-22 | 2015-05-26 | Applied Materials, Inc. | Maskless hybrid laser scribing and plasma etching wafer dicing process |
US9199840B2 (en) | 2013-11-01 | 2015-12-01 | Freescale Semiconductor, Inc. | Sensor protective coating |
US9312177B2 (en) | 2013-12-06 | 2016-04-12 | Applied Materials, Inc. | Screen print mask for laser scribe and plasma etch wafer dicing process |
US9299614B2 (en) | 2013-12-10 | 2016-03-29 | Applied Materials, Inc. | Method and carrier for dicing a wafer |
US9293304B2 (en) | 2013-12-17 | 2016-03-22 | Applied Materials, Inc. | Plasma thermal shield for heat dissipation in plasma chamber |
US8927393B1 (en) | 2014-01-29 | 2015-01-06 | Applied Materials, Inc. | Water soluble mask formation by dry film vacuum lamination for laser and plasma dicing |
US9299611B2 (en) | 2014-01-29 | 2016-03-29 | Applied Materials, Inc. | Method of wafer dicing using hybrid laser scribing and plasma etch approach with mask plasma treatment for improved mask etch resistance |
US9018079B1 (en) | 2014-01-29 | 2015-04-28 | Applied Materials, Inc. | Wafer dicing using hybrid laser scribing and plasma etch approach with intermediate reactive post mask-opening clean |
US9012305B1 (en) | 2014-01-29 | 2015-04-21 | Applied Materials, Inc. | Wafer dicing using hybrid laser scribing and plasma etch approach with intermediate non-reactive post mask-opening clean |
US9236284B2 (en) | 2014-01-31 | 2016-01-12 | Applied Materials, Inc. | Cooled tape frame lift and low contact shadow ring for plasma heat isolation |
US8991329B1 (en) | 2014-01-31 | 2015-03-31 | Applied Materials, Inc. | Wafer coating |
US9130030B1 (en) | 2014-03-07 | 2015-09-08 | Applied Materials, Inc. | Baking tool for improved wafer coating process |
US20150255349A1 (en) | 2014-03-07 | 2015-09-10 | JAMES Matthew HOLDEN | Approaches for cleaning a wafer during hybrid laser scribing and plasma etching wafer dicing processes |
CN104925742B (zh) * | 2014-03-20 | 2016-09-07 | 中芯国际集成电路制造(上海)有限公司 | Mems半导体器件的形成方法 |
US9275902B2 (en) | 2014-03-26 | 2016-03-01 | Applied Materials, Inc. | Dicing processes for thin wafers with bumps on wafer backside |
US9076860B1 (en) | 2014-04-04 | 2015-07-07 | Applied Materials, Inc. | Residue removal from singulated die sidewall |
US8975163B1 (en) | 2014-04-10 | 2015-03-10 | Applied Materials, Inc. | Laser-dominated laser scribing and plasma etch hybrid wafer dicing |
US8932939B1 (en) | 2014-04-14 | 2015-01-13 | Applied Materials, Inc. | Water soluble mask formation by dry film lamination |
US8912078B1 (en) | 2014-04-16 | 2014-12-16 | Applied Materials, Inc. | Dicing wafers having solder bumps on wafer backside |
US8999816B1 (en) | 2014-04-18 | 2015-04-07 | Applied Materials, Inc. | Pre-patterned dry laminate mask for wafer dicing processes |
US8912075B1 (en) | 2014-04-29 | 2014-12-16 | Applied Materials, Inc. | Wafer edge warp supression for thin wafer supported by tape frame |
US9159621B1 (en) | 2014-04-29 | 2015-10-13 | Applied Materials, Inc. | Dicing tape protection for wafer dicing using laser scribe process |
US8980727B1 (en) | 2014-05-07 | 2015-03-17 | Applied Materials, Inc. | Substrate patterning using hybrid laser scribing and plasma etching processing schemes |
US9112050B1 (en) | 2014-05-13 | 2015-08-18 | Applied Materials, Inc. | Dicing tape thermal management by wafer frame support ring cooling during plasma dicing |
US9034771B1 (en) | 2014-05-23 | 2015-05-19 | Applied Materials, Inc. | Cooling pedestal for dicing tape thermal management during plasma dicing |
US9130057B1 (en) | 2014-06-30 | 2015-09-08 | Applied Materials, Inc. | Hybrid dicing process using a blade and laser |
US9142459B1 (en) | 2014-06-30 | 2015-09-22 | Applied Materials, Inc. | Wafer dicing using hybrid laser scribing and plasma etch approach with mask application by vacuum lamination |
US9165832B1 (en) | 2014-06-30 | 2015-10-20 | Applied Materials, Inc. | Method of die singulation using laser ablation and induction of internal defects with a laser |
US9093518B1 (en) | 2014-06-30 | 2015-07-28 | Applied Materials, Inc. | Singulation of wafers having wafer-level underfill |
US9349648B2 (en) | 2014-07-22 | 2016-05-24 | Applied Materials, Inc. | Hybrid wafer dicing approach using a rectangular shaped two-dimensional top hat laser beam profile or a linear shaped one-dimensional top hat laser beam profile laser scribing process and plasma etch process |
US9196498B1 (en) | 2014-08-12 | 2015-11-24 | Applied Materials, Inc. | Stationary actively-cooled shadow ring for heat dissipation in plasma chamber |
US9117868B1 (en) | 2014-08-12 | 2015-08-25 | Applied Materials, Inc. | Bipolar electrostatic chuck for dicing tape thermal management during plasma dicing |
US9281244B1 (en) | 2014-09-18 | 2016-03-08 | Applied Materials, Inc. | Hybrid wafer dicing approach using an adaptive optics-controlled laser scribing process and plasma etch process |
US9177861B1 (en) | 2014-09-19 | 2015-11-03 | Applied Materials, Inc. | Hybrid wafer dicing approach using laser scribing process based on an elliptical laser beam profile or a spatio-temporal controlled laser beam profile |
US11195756B2 (en) | 2014-09-19 | 2021-12-07 | Applied Materials, Inc. | Proximity contact cover ring for plasma dicing |
US9196536B1 (en) | 2014-09-25 | 2015-11-24 | Applied Materials, Inc. | Hybrid wafer dicing approach using a phase modulated laser beam profile laser scribing process and plasma etch process |
US9130056B1 (en) | 2014-10-03 | 2015-09-08 | Applied Materials, Inc. | Bi-layer wafer-level underfill mask for wafer dicing and approaches for performing wafer dicing |
US9245803B1 (en) | 2014-10-17 | 2016-01-26 | Applied Materials, Inc. | Hybrid wafer dicing approach using a bessel beam shaper laser scribing process and plasma etch process |
US10692765B2 (en) | 2014-11-07 | 2020-06-23 | Applied Materials, Inc. | Transfer arm for film frame substrate handling during plasma singulation of wafers |
JP2016115800A (ja) * | 2014-12-15 | 2016-06-23 | 株式会社ディスコ | ウエーハの加工方法 |
US9330977B1 (en) | 2015-01-05 | 2016-05-03 | Applied Materials, Inc. | Hybrid wafer dicing approach using a galvo scanner and linear stage hybrid motion laser scribing process and plasma etch process |
US9355907B1 (en) | 2015-01-05 | 2016-05-31 | Applied Materials, Inc. | Hybrid wafer dicing approach using a line shaped laser beam profile laser scribing process and plasma etch process |
US9159624B1 (en) | 2015-01-05 | 2015-10-13 | Applied Materials, Inc. | Vacuum lamination of polymeric dry films for wafer dicing using hybrid laser scribing and plasma etch approach |
JP2016136559A (ja) * | 2015-01-23 | 2016-07-28 | 株式会社ディスコ | 被加工物の切削方法 |
JP2016136558A (ja) * | 2015-01-23 | 2016-07-28 | 株式会社ディスコ | 被加工物の切削方法 |
JP2016207737A (ja) * | 2015-04-17 | 2016-12-08 | 株式会社ディスコ | 分割方法 |
US9601375B2 (en) | 2015-04-27 | 2017-03-21 | Applied Materials, Inc. | UV-cure pre-treatment of carrier film for wafer dicing using hybrid laser scribing and plasma etch approach |
CN107615453B (zh) * | 2015-05-25 | 2020-09-01 | 琳得科株式会社 | 半导体装置的制造方法 |
US9478455B1 (en) | 2015-06-12 | 2016-10-25 | Applied Materials, Inc. | Thermal pyrolytic graphite shadow ring assembly for heat dissipation in plasma chamber |
US9721839B2 (en) | 2015-06-12 | 2017-08-01 | Applied Materials, Inc. | Etch-resistant water soluble mask for hybrid wafer dicing using laser scribing and plasma etch |
WO2017082210A1 (ja) * | 2015-11-09 | 2017-05-18 | 古河電気工業株式会社 | 半導体チップの製造方法及びこれに用いるマスク一体型表面保護テープ |
JP6503286B2 (ja) * | 2015-12-24 | 2019-04-17 | ルネサスエレクトロニクス株式会社 | 半導体装置の製造方法および半導体ウェハ |
US9972575B2 (en) | 2016-03-03 | 2018-05-15 | Applied Materials, Inc. | Hybrid wafer dicing approach using a split beam laser scribing process and plasma etch process |
US9852997B2 (en) | 2016-03-25 | 2017-12-26 | Applied Materials, Inc. | Hybrid wafer dicing approach using a rotating beam laser scribing process and plasma etch process |
US9793132B1 (en) | 2016-05-13 | 2017-10-17 | Applied Materials, Inc. | Etch mask for hybrid laser scribing and plasma etch wafer singulation process |
CN106290296B (zh) * | 2016-07-27 | 2020-11-27 | 深圳大学 | 一种基于金属点阵的sers基底及其制备方法和利用该基底进行拉曼检测的方法 |
US10276440B2 (en) | 2017-01-19 | 2019-04-30 | Honeywell International Inc. | Removable temporary protective layers for use in semiconductor manufacturing |
JP6837859B2 (ja) * | 2017-02-14 | 2021-03-03 | 株式会社ディスコ | ウエーハの加工方法 |
US11158540B2 (en) | 2017-05-26 | 2021-10-26 | Applied Materials, Inc. | Light-absorbing mask for hybrid laser scribing and plasma etch wafer singulation process |
US10363629B2 (en) | 2017-06-01 | 2019-07-30 | Applied Materials, Inc. | Mitigation of particle contamination for wafer dicing processes |
JP6524564B2 (ja) * | 2017-06-28 | 2019-06-05 | パナソニックIpマネジメント株式会社 | 素子チップの製造方法および基板加熱装置 |
CN107680834A (zh) * | 2017-09-25 | 2018-02-09 | 中国振华集团云科电子有限公司 | 一种芯片电容的优化切割工艺及芯片电容 |
CN107894435B (zh) * | 2017-11-20 | 2021-11-12 | 广东工业大学 | 一种pcb半孔切片的制作方法 |
US10535561B2 (en) | 2018-03-12 | 2020-01-14 | Applied Materials, Inc. | Hybrid wafer dicing approach using a multiple pass laser scribing process and plasma etch process |
CN110459506A (zh) * | 2018-05-08 | 2019-11-15 | 山东浪潮华光光电子股份有限公司 | 一种改善led芯片切割污染的方法 |
CN110867501B (zh) * | 2018-08-28 | 2020-11-27 | 山东浪潮华光光电子股份有限公司 | 一种GaAs基发光二极管芯片的切割方法 |
US11355394B2 (en) | 2018-09-13 | 2022-06-07 | Applied Materials, Inc. | Wafer dicing using hybrid laser scribing and plasma etch approach with intermediate breakthrough treatment |
US11011424B2 (en) | 2019-08-06 | 2021-05-18 | Applied Materials, Inc. | Hybrid wafer dicing approach using a spatially multi-focused laser beam laser scribing process and plasma etch process |
US11342226B2 (en) | 2019-08-13 | 2022-05-24 | Applied Materials, Inc. | Hybrid wafer dicing approach using an actively-focused laser beam laser scribing process and plasma etch process |
US10903121B1 (en) | 2019-08-14 | 2021-01-26 | Applied Materials, Inc. | Hybrid wafer dicing approach using a uniform rotating beam laser scribing process and plasma etch process |
US11600492B2 (en) | 2019-12-10 | 2023-03-07 | Applied Materials, Inc. | Electrostatic chuck with reduced current leakage for hybrid laser scribing and plasma etch wafer singulation process |
US11211247B2 (en) | 2020-01-30 | 2021-12-28 | Applied Materials, Inc. | Water soluble organic-inorganic hybrid mask formulations and their applications |
CN111521623B (zh) * | 2020-04-28 | 2023-04-07 | 广西大学 | 一种提高粉末样品透射电镜原位加热芯片制样成功率的方法 |
Citations (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
DE4123900A1 (de) * | 1991-07-18 | 1993-01-21 | Siemens Ag | Schutzschicht fuer wafer |
US5362681A (en) * | 1992-07-22 | 1994-11-08 | Anaglog Devices, Inc. | Method for separating circuit dies from a wafer |
US5923995A (en) * | 1997-04-18 | 1999-07-13 | National Semiconductor Corporation | Methods and apparatuses for singulation of microelectromechanical systems |
US20010042902A1 (en) * | 2000-05-18 | 2001-11-22 | Integrated Electronics & Packaging Technologies, Inc. | Semiconductor device and method of manufacturing the same |
US20020039807A1 (en) * | 2000-10-03 | 2002-04-04 | Sony Corporation | Manufacturing method of a semiconductor device |
US20020064931A1 (en) * | 2000-07-03 | 2002-05-30 | E. C. Ong | Method and apparatus for applying a protective over-coating to a ball-grid-array (BGA) structure |
Family Cites Families (10)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
DE3037250A1 (de) * | 1980-10-02 | 1982-04-29 | Joachim 7440 Nürtingen Dudzik | Selbstklebeetikett |
JPS6242426A (ja) * | 1985-08-19 | 1987-02-24 | Toshiba Corp | 半導体素子の製造方法 |
US5516728A (en) * | 1994-03-31 | 1996-05-14 | At&T Corp. | Process for fabircating an integrated circuit |
US5832585A (en) * | 1996-08-13 | 1998-11-10 | National Semiconductor Corporation | Method of separating micro-devices formed on a substrate |
JPH11345793A (ja) * | 1998-03-30 | 1999-12-14 | Mitsui Chem Inc | 半導体ウエハの裏面研削方法 |
US6465329B1 (en) * | 1999-01-20 | 2002-10-15 | Amkor Technology, Inc. | Microcircuit die-sawing protector and method |
JP4151164B2 (ja) * | 1999-03-19 | 2008-09-17 | 株式会社デンソー | 半導体装置の製造方法 |
JP3737343B2 (ja) * | 1999-09-08 | 2006-01-18 | シャープ株式会社 | 二次元画像検出器 |
JP4318353B2 (ja) * | 1999-10-01 | 2009-08-19 | パナソニック株式会社 | 基板の製造方法 |
US6586276B2 (en) * | 2001-07-11 | 2003-07-01 | Intel Corporation | Method for fabricating a microelectronic device using wafer-level adhesion layer deposition |
-
2002
- 2002-07-12 US US10/193,842 patent/US6582983B1/en not_active Expired - Fee Related
-
2003
- 2003-07-09 JP JP2004521369A patent/JP2005533376A/ja active Pending
- 2003-07-09 EP EP03764283A patent/EP1522099A4/en not_active Withdrawn
- 2003-07-09 AU AU2003253566A patent/AU2003253566A1/en not_active Abandoned
- 2003-07-09 CN CNB038101130A patent/CN1296988C/zh not_active Expired - Fee Related
- 2003-07-09 WO PCT/SG2003/000161 patent/WO2004008528A1/en active Application Filing
- 2003-07-09 RU RU2004139016/28A patent/RU2004139016A/ru not_active Application Discontinuation
- 2003-07-11 MY MYPI20032611A patent/MY138777A/en unknown
Patent Citations (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
DE4123900A1 (de) * | 1991-07-18 | 1993-01-21 | Siemens Ag | Schutzschicht fuer wafer |
US5362681A (en) * | 1992-07-22 | 1994-11-08 | Anaglog Devices, Inc. | Method for separating circuit dies from a wafer |
US5923995A (en) * | 1997-04-18 | 1999-07-13 | National Semiconductor Corporation | Methods and apparatuses for singulation of microelectromechanical systems |
US20010042902A1 (en) * | 2000-05-18 | 2001-11-22 | Integrated Electronics & Packaging Technologies, Inc. | Semiconductor device and method of manufacturing the same |
US20020064931A1 (en) * | 2000-07-03 | 2002-05-30 | E. C. Ong | Method and apparatus for applying a protective over-coating to a ball-grid-array (BGA) structure |
US20020039807A1 (en) * | 2000-10-03 | 2002-04-04 | Sony Corporation | Manufacturing method of a semiconductor device |
Also Published As
Publication number | Publication date |
---|---|
WO2004008528A1 (en) | 2004-01-22 |
AU2003253566A1 (en) | 2004-02-02 |
RU2004139016A (ru) | 2005-07-27 |
CN1650420A (zh) | 2005-08-03 |
JP2005533376A (ja) | 2005-11-04 |
MY138777A (en) | 2009-07-31 |
EP1522099A4 (en) | 2010-09-15 |
US6582983B1 (en) | 2003-06-24 |
EP1522099A1 (en) | 2005-04-13 |
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