KR970018720A - 박막트랜지스터 제조방법 - Google Patents

박막트랜지스터 제조방법 Download PDF

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Publication number
KR970018720A
KR970018720A KR1019950029681A KR19950029681A KR970018720A KR 970018720 A KR970018720 A KR 970018720A KR 1019950029681 A KR1019950029681 A KR 1019950029681A KR 19950029681 A KR19950029681 A KR 19950029681A KR 970018720 A KR970018720 A KR 970018720A
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KR
South Korea
Prior art keywords
forming
source
silicon layer
substrate
drain electrodes
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KR1019950029681A
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English (en)
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KR100351871B1 (ko
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김웅권
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구자홍
엘지전자 주식회사
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Application filed by 구자홍, 엘지전자 주식회사 filed Critical 구자홍
Priority to KR1019950029681A priority Critical patent/KR100351871B1/ko
Priority to US08/713,074 priority patent/US5898187A/en
Publication of KR970018720A publication Critical patent/KR970018720A/ko
Priority to US09/225,828 priority patent/US6057181A/en
Application granted granted Critical
Publication of KR100351871B1 publication Critical patent/KR100351871B1/ko

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76—Unipolar devices, e.g. field effect transistors
    • H01L29/772—Field effect transistors
    • H01L29/78—Field effect transistors with field effect produced by an insulated gate
    • H01L29/786—Thin film transistors, i.e. transistors with a channel being at least partly a thin film
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/66007—Multistep manufacturing processes
    • H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
    • H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
    • H01L29/66409—Unipolar field-effect transistors
    • H01L29/66477—Unipolar field-effect transistors with an insulated gate, i.e. MISFET
    • H01L29/66742—Thin film unipolar transistors
    • H01L29/6675—Amorphous silicon or polysilicon transistors
    • H01L29/66765—Lateral single gate single channel transistors with inverted structure, i.e. the channel layer is formed after the gate
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/40—Electrodes ; Multistep manufacturing processes therefor
    • H01L29/41—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions
    • H01L29/417—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions carrying the current to be rectified, amplified or switched
    • H01L29/41725—Source or drain electrodes for field effect devices
    • H01L29/41733—Source or drain electrodes for field effect devices for thin film transistors with insulated gate
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/40—Electrodes ; Multistep manufacturing processes therefor
    • H01L29/43—Electrodes ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
    • H01L29/45—Ohmic electrodes
    • H01L29/456—Ohmic electrodes on silicon
    • H01L29/458—Ohmic electrodes on silicon for thin film silicon, e.g. source or drain electrode

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  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Ceramic Engineering (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Manufacturing & Machinery (AREA)
  • Thin Film Transistor (AREA)

Abstract

본 발명은 박막트랜지스터 제조방법에 관한 것으로, 소오스와 드레인간의 전하 전송을 용이하게 하고 게이트전압을 낮추는데 적당하도록 한 것이다. 본 발명은 투명 절연기판상에 게이트전극을 형성하는 공정과, 기판 전면에 게이트절연막을 형성하는 공정, 상기 게이트절연막위에 금속을 증착하는 공정, 상기 금속층을 선택적으로 패터닝하여 소오스 및 드레인전극을 형성하는 공정, 상기 소오스 및 드레인전극이 형성된 기판 상부에 실리콘층을 형성하는 공정, 상기 실리콘층을 활성층패턴으로 패터닝하는 공정, 상기 실리콘층을 활성층패턴으로 패티닝하는 공정후에 열처리하는 공정, 상기 소오스 또는 드레인전극에 접속되도록 화소전극을 형성하는 공정을 포함하여 이루어지는 박막트랜지스터 제조방법을 제공한다.

Description

박막트랜지스터 제조방법
본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음
제2도는 볼 발명의 일실시예에 의한 박막트랜지스터 제조방법을 도시한 공정순서도.

Claims (3)

  1. 투명 절연기판상에 게이트전극을 형성하는 공정과, 기판 전면에 게이트절연막을 형성하는 공정, 상기 게이트절연막위에 금속을 증착하는 공정, 상기 금속층을 선택적으로 패터닝하여 소오스 및 드레인전극을 형성하는 공정, 상기 소오스 및 드레인전극이 형성된 기판 상부에 실리콘층을 형성하는 공정, 상기 실리콘층을 활성층패턴으로 패터닝하는 공정, 상기 실리콘층을 활성층패턴으로 패터닝하는 공정후에 열처리하는 공정, 상기 소오스 또는 드레인전극에 접속되도록 화소전극을 형성하는 공정을 포함하여 이루어지는 것을 특징으로 하는 박막트랜지스터 제조방법.
  2. 제1항에 있어서, 상기 열처리공정에 의해 상기 실리콘층과 상기 소오스 및 드레인전극을 이루는 금속이 반응하여 실리사이드가 형성되는 것을 특징으로 하는 박막트랜지스터 제조방법.
  3. 제1항에 있어서, 상기 실리콘층의 형성공정 또는 화소전극 형성공정시, 열처리공정없이 실리콘층과 상기 소오스 및 드레인전극을 이루는 금속이 반응하여 실리사이드가 형성되는 것을 특징으로 하는 박막트랜지스터 제조방법.
    ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.
KR1019950029681A 1995-09-12 1995-09-12 박막트랜지스터제조방법 KR100351871B1 (ko)

Priority Applications (3)

Application Number Priority Date Filing Date Title
KR1019950029681A KR100351871B1 (ko) 1995-09-12 1995-09-12 박막트랜지스터제조방법
US08/713,074 US5898187A (en) 1995-09-12 1996-09-12 Thin film transistor
US09/225,828 US6057181A (en) 1995-09-12 1999-01-06 Thin film transistor and method for fabricating same

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1019950029681A KR100351871B1 (ko) 1995-09-12 1995-09-12 박막트랜지스터제조방법

Publications (2)

Publication Number Publication Date
KR970018720A true KR970018720A (ko) 1997-04-30
KR100351871B1 KR100351871B1 (ko) 2003-01-29

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KR1019950029681A KR100351871B1 (ko) 1995-09-12 1995-09-12 박막트랜지스터제조방법

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US (2) US5898187A (ko)
KR (1) KR100351871B1 (ko)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR20000038297A (ko) * 1998-12-05 2000-07-05 구본준 이미지소자, 센서박막트랜지스터와 그 제조방법.

Families Citing this family (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TW463382B (en) * 2000-05-19 2001-11-11 Hannstar Display Corp Manufacturing method of thin film transistor
US7576394B2 (en) * 2006-02-02 2009-08-18 Kochi Industrial Promotion Center Thin film transistor including low resistance conductive thin films and manufacturing method thereof
WO2011129227A1 (ja) * 2010-04-14 2011-10-20 シャープ株式会社 半導体装置、半導体装置の製造方法、および表示装置
CN102270636B (zh) * 2010-06-04 2015-12-16 元太科技工业股份有限公司 薄膜晶体管阵列基板及其制造方法
KR20150061172A (ko) * 2013-11-26 2015-06-04 삼성디스플레이 주식회사 평판표시장치 세정제 조성물 및 이를 이용한 표시 장치의 제조방법

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Publication number Priority date Publication date Assignee Title
JPH0654782B2 (ja) * 1985-02-08 1994-07-20 セイコー電子工業株式会社 薄膜トランジスタ装置の製造方法
JPS61188968A (ja) * 1985-02-15 1986-08-22 Sharp Corp 薄膜トランジスタ
EP0372821B1 (en) * 1988-11-30 1995-03-08 Nec Corporation Liquid crystal display panel with reduced pixel defects
JP2847376B2 (ja) * 1989-02-20 1999-01-20 株式会社半導体エネルギー研究所 薄膜トランジスタ
JPH06204247A (ja) * 1992-06-01 1994-07-22 Toshiba Corp 薄膜トランジスタの製造方法
US5600153A (en) * 1994-10-07 1997-02-04 Micron Technology, Inc. Conductive polysilicon lines and thin film transistors
KR0145899B1 (ko) * 1995-02-11 1998-09-15 김광호 완전 자기 정렬형 액정 표시 장치용 박막 트랜지스터 기판의 제조방법
KR100229676B1 (ko) * 1996-08-30 1999-11-15 구자홍 셀프얼라인 박막트랜지스터 제조방법
US5998229A (en) * 1998-01-30 1999-12-07 Samsung Electronics Co., Ltd. Methods of manufacturing thin film transistors and liquid crystal displays by plasma treatment of undoped amorphous silicon

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR20000038297A (ko) * 1998-12-05 2000-07-05 구본준 이미지소자, 센서박막트랜지스터와 그 제조방법.

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Publication number Publication date
US6057181A (en) 2000-05-02
US5898187A (en) 1999-04-27
KR100351871B1 (ko) 2003-01-29

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