KR950006517A - 회로내장 티에프티-엘씨디(tft-lcd) 제조방법 - Google Patents

회로내장 티에프티-엘씨디(tft-lcd) 제조방법 Download PDF

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Publication number
KR950006517A
KR950006517A KR1019930016584A KR930016584A KR950006517A KR 950006517 A KR950006517 A KR 950006517A KR 1019930016584 A KR1019930016584 A KR 1019930016584A KR 930016584 A KR930016584 A KR 930016584A KR 950006517 A KR950006517 A KR 950006517A
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KR
South Korea
Prior art keywords
tft
circuit portion
source
circuit
pixel portion
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KR1019930016584A
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English (en)
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KR100351869B1 (ko
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채기성
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이헌조
주식회사 금성사
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Publication of KR950006517A publication Critical patent/KR950006517A/ko
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    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
    • G02F1/1362—Active matrix addressed cells
    • G02F1/1368—Active matrix addressed cells in which the switching element is a three-electrode device
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
    • H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
    • H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
    • H01L27/1259—Multistep manufacturing methods
    • H01L27/127—Multistep manufacturing methods with a particular formation, treatment or patterning of the active layer specially adapted to the circuit arrangement
    • H01L27/1274—Multistep manufacturing methods with a particular formation, treatment or patterning of the active layer specially adapted to the circuit arrangement using crystallisation of amorphous semiconductor or recrystallisation of crystalline semiconductor
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76—Unipolar devices, e.g. field effect transistors
    • H01L29/772—Field effect transistors
    • H01L29/78—Field effect transistors with field effect produced by an insulated gate
    • H01L29/786—Thin film transistors, i.e. transistors with a channel being at least partly a thin film
    • H01L29/78696—Thin film transistors, i.e. transistors with a channel being at least partly a thin film characterised by the structure of the channel, e.g. multichannel, transverse or longitudinal shape, length or width, doping structure, or the overlap or alignment between the channel and the gate, the source or the drain, or the contacting structure of the channel
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
    • G02F1/13606—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit having means for reducing parasitic capacitance

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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Power Engineering (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • General Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Computer Hardware Design (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • Nonlinear Science (AREA)
  • Chemical & Material Sciences (AREA)
  • Mathematical Physics (AREA)
  • Ceramic Engineering (AREA)
  • Optics & Photonics (AREA)
  • Manufacturing & Machinery (AREA)
  • Thin Film Transistor (AREA)
  • Liquid Crystal (AREA)

Abstract

본 발명은 TFT-LCD(Thin Film Transistor Liquid Crystal Device)의 제조방법에 관한 것으로, 특히 회로부의 TFT와 픽셀(pixel)부의 TFT를 동시에 형성시키는 회로내장 TFT-LCD 제조방법에 관한 것으로, 회로부 TFT의 기생 정전용량을 최소화하고 TFT 특성조절을 위한 TFT구조 및 공정상의 자유도를 증가시키며 TFT크기를 감소시킬 수 있는 회로내장 TFT-LCD의 제조방법을 제공함에 그 목적이 있다.
본 발명은 상기 목적을 달성하기 위하여 유리기판(11)상에 픽셀부의 게이트 전극(12)을 형성하고 전면에 제1절연막(13)막, 비정질실리콘을 차례로 증착하는 제1공정, 상기 비정질실리콘을 패터닝하여 회로부와 픽셀부의 활성층(14,15)을 형성한 뒤 상기 회로부의 활성층(4)을 다결정화시키는 제2공정, 전면에 제2절연막(16)과 금속막(17)을 차례로 증착하고 패터닝하여 회로부와 픽셀부의 소오스-드레인 영역에 이온주입을 하고 회로부의 소오스-드레인 영역을 다결정화하는 제4공정, 층간절연막(18)을 증착하고 접촉홀을 형성한 후 소오스-드레인 전극(19)을 형성하는 제5공정으로 이루어짐을 특징으로 한다.

Description

회로내장 티에프티-엘씨디(TFT-LCD) 제조방법
본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음
제1도는 종래 기술의 단면도.
제2도는 본 발명의 실시예를 나타낸 공정순서도.

Claims (2)

  1. 유리기판(11)상에 픽셀부의 게이트 전극(12)을 형성하고 전면에 제1절연막(13)과, 비정질실리콘을 차례로 증착하는 제1공정, 상기 비정질실리콘을 패터닝하여 회로부와 픽셀부의 활성층(14,15)을 형성한 뒤 상기 회로부의 활성층(4)을 다결화시키는 제2공정, 전면에 제2절연막(16)과 금속막(17)을 차례로 증착하고 패터닝하여 회로부의 톱게이트를 형성하고 픽셀부의 소오스-드레인 영역 사이의 제2절연막(16)만을 남기는 제3공정, 회로부와 픽셀부의 소오스-드레인 영역에 이온 주입을 하고 회로부의 소오스-드레인 영역을 다결정화하는 제4공정, 충간절연막(18)을 증착하고 접촉홀을 형성한 후 소오스-드레인 전극(19)을 형성하고 제5공정으로 이루어짐을 특징으로 하는 회로내장 TFT-LCD 제조방법.
  2. 제1항에 있어서, 상기 제1공정 및 제4공정의 다결정화 공정을 표면 레이 처리에 의해 실현함을 특징으로 하는 회로내장 TFT-LCD 제조방법.
    ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.
KR1019930016584A 1993-08-25 1993-08-25 회로내장티에프티-엘씨디제조방법 KR100351869B1 (ko)

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KR1019930016584A KR100351869B1 (ko) 1993-08-25 1993-08-25 회로내장티에프티-엘씨디제조방법

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KR1019930016584A KR100351869B1 (ko) 1993-08-25 1993-08-25 회로내장티에프티-엘씨디제조방법

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KR950006517A true KR950006517A (ko) 1995-03-21
KR100351869B1 KR100351869B1 (ko) 2003-05-17

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Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100493113B1 (ko) * 2001-12-07 2005-05-31 주식회사 코오롱 편물로 보강된 복합 중공사막
KR100689082B1 (ko) * 1998-07-22 2007-03-08 가부시키가이샤 히타치세이사쿠쇼 화상표시장치 및 그 제조방법
KR20210007674A (ko) * 2019-07-12 2021-01-20 한국화학연구원 기계적 강도가 향상된 중공사막, 및 이의 제조방법

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0411226A (ja) * 1990-04-27 1992-01-16 Seiko Epson Corp 表示装置の製造方法
JP3072326B2 (ja) * 1990-09-25 2000-07-31 セイコーインスツルメンツ株式会社 半導体単結晶薄膜基板光弁装置とその製造方法

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100689082B1 (ko) * 1998-07-22 2007-03-08 가부시키가이샤 히타치세이사쿠쇼 화상표시장치 및 그 제조방법
KR100493113B1 (ko) * 2001-12-07 2005-05-31 주식회사 코오롱 편물로 보강된 복합 중공사막
KR20210007674A (ko) * 2019-07-12 2021-01-20 한국화학연구원 기계적 강도가 향상된 중공사막, 및 이의 제조방법

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