KR960035967A - 다층 금속배선의 층간 절연막 형성 방법 - Google Patents

다층 금속배선의 층간 절연막 형성 방법 Download PDF

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KR960035967A
KR960035967A KR1019950004445A KR19950004445A KR960035967A KR 960035967 A KR960035967 A KR 960035967A KR 1019950004445 A KR1019950004445 A KR 1019950004445A KR 19950004445 A KR19950004445 A KR 19950004445A KR 960035967 A KR960035967 A KR 960035967A
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South Korea
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insulating film
forming
interlayer insulating
concentration
present
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KR1019950004445A
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KR0144228B1 (ko
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조경수
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김주용
현대전자산업 주식회사
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Priority to KR1019950004445A priority Critical patent/KR0144228B1/ko
Priority to US08/610,715 priority patent/US5804509A/en
Priority to DE19608209A priority patent/DE19608209A1/de
Priority to GB9604622A priority patent/GB2298658B/en
Priority to TW085102621A priority patent/TW309656B/zh
Priority to JP8070957A priority patent/JP3026154B2/ja
Publication of KR960035967A publication Critical patent/KR960035967A/ko
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Publication of KR0144228B1 publication Critical patent/KR0144228B1/ko

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
    • H01L21/02112—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
    • H01L21/02123—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon
    • H01L21/02164—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon the material being a silicon oxide, e.g. SiO2
    • C—CHEMISTRY; METALLURGY
    • C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C16/00—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
    • C23C16/22—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the deposition of inorganic material, other than metallic material
    • C23C16/30—Deposition of compounds, mixtures or solid solutions, e.g. borides, carbides, nitrides
    • C23C16/40—Oxides
    • C23C16/401—Oxides containing silicon
    • C23C16/402—Silicon dioxide
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
    • H01L21/022—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates the layer being a laminate, i.e. composed of sublayers, e.g. stacks of alternating high-k metal oxides
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02225—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer
    • H01L21/0226—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process
    • H01L21/02263—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase
    • H01L21/02271—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase deposition by decomposition or reaction of gaseous or vapour phase compounds, i.e. chemical vapour deposition
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/314—Inorganic layers
    • H01L21/316—Inorganic layers composed of oxides or glassy oxides or oxide based glass
    • H01L21/31604—Deposition from a gas or vapour
    • H01L21/31608—Deposition of SiO2
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76801—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02225—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer
    • H01L21/0226—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process
    • H01L21/02263—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase
    • H01L21/02271—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase deposition by decomposition or reaction of gaseous or vapour phase compounds, i.e. chemical vapour deposition
    • H01L21/02274—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase deposition by decomposition or reaction of gaseous or vapour phase compounds, i.e. chemical vapour deposition in the presence of a plasma [PECVD]

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  • Engineering & Computer Science (AREA)
  • Chemical & Material Sciences (AREA)
  • Manufacturing & Machinery (AREA)
  • General Physics & Mathematics (AREA)
  • Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Chemical Kinetics & Catalysis (AREA)
  • General Chemical & Material Sciences (AREA)
  • Inorganic Chemistry (AREA)
  • Materials Engineering (AREA)
  • Mechanical Engineering (AREA)
  • Metallurgy (AREA)
  • Organic Chemistry (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Formation Of Insulating Films (AREA)
  • Local Oxidation Of Silicon (AREA)

Abstract

본 발명은 다층 금속배선의 층간 절연막 형성 방법에 관한 것으로, 특히 모든 반도체 소자의 제조시 절연막의 스트레스로 인한 결함을 방지할 수 있는 다층 금속배선의 층간 절연막 형성 방법에 관한 것이다. 본 발명의 방법은 반도체기판 상부의 금속배선들 사이에 층간 절연막 형성시 오존의 농도 3.0~5.0 mol wt%, 형성온도 390±30℃ 및 TEOS 농도 1.0~2.0slpm로 조절하여 상기 반도체기판 상부의 금속 배선들 사이에 제1절연막을 매립하는 단계와 오존의 농도 3.0~5.0mol wt%,형성온도 410±30℃및 TEOS 농도 0.5 slpm 미만으로 조절하여 상기 제1절연막의 상부에 제2절연막을 형성하는 단계로 이루어짐을 특징으로 한다. 본 발명에 의하여 절연막의 스트레스 변화를 억제하게 되어 종래의 반도체 소자 제조시 그 소자의 신뢰성을 감소시키게 되는 결함을 최소화 할 수 있다. 또한, 본 발명의 절연막 형성시 동일한 반응로를 사용하여 제조하므로 금속배선들 사이의 절연막을 한번에 형성할 수 있게 되어 최종 절연막 내부의 보이드 형성을 억제할 수 있을 뿐만 아니라, 이에 따른 제조 수율을 향상시킬 수 있다.

Description

다층 금속배선의 층간 절연막 형성방법
본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음

Claims (4)

  1. 반도체기판 상부의 금속배선들 사이에 층간 절연막 형성시 오존의 농도 3.0~5.0mol wt%, 형성온도 390±30℃ 및 TEOS 농도 1.0~2.0 slpm로 조절하여 상기 반도체기판 상부의 금속배선들 사이에 제1절연막을 배립하는 단계와 오존의 농도 3.0~5.0 mol wt%, 형성온도 410±30℃ 및 TEOS 농도 0.5 slpm 미만으로 조절하여 상기 제1절연막의 상부에 제2절연막을 형성하는 단계로 이루어짐을 특징으로 하는 다층 금속배선의 층간 절연막 형성 방법.
  2. 제1항에 있어서, 상기 제1절연막과 제2절연막은 동일한 반응로에서 형성함을 특징으로 하는 다층 금속배선의 층간 절연막 형성방법.
  3. 제1항 또는 제2항에 있어서, 상기 제1절연막의 두께는 6,000Å이상임을 특징으로 하는 다층 금속 배선의 층간 절연막 형성 방법.
  4. 제1항 또는 제2항에 있어서, 상기 제2절연막의 두께는 1,000A미만임을 특징으로 하는 다층 금속배선의 층간 절연막 형성 방법.
    ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.
KR1019950004445A 1995-03-04 1995-03-04 다층 금속배선의 층간 절연막 형성 방법 KR0144228B1 (ko)

Priority Applications (6)

Application Number Priority Date Filing Date Title
KR1019950004445A KR0144228B1 (ko) 1995-03-04 1995-03-04 다층 금속배선의 층간 절연막 형성 방법
US08/610,715 US5804509A (en) 1995-03-04 1996-03-04 Varying TEOS flow rate while forming intermetallic insulating layers in semiconductor devices
DE19608209A DE19608209A1 (de) 1995-03-04 1996-03-04 Verfahren zur Ausbildung intermetallischer Isolationsschichten in Halbleitereinrichtungen
GB9604622A GB2298658B (en) 1995-03-04 1996-03-04 Methods of forming intermetallic insulating layers in semiconductor devices
TW085102621A TW309656B (ko) 1995-03-04 1996-03-04
JP8070957A JP3026154B2 (ja) 1995-03-04 1996-03-04 半導体装置の層間絶縁膜形成方法

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Application Number Priority Date Filing Date Title
KR1019950004445A KR0144228B1 (ko) 1995-03-04 1995-03-04 다층 금속배선의 층간 절연막 형성 방법

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KR960035967A true KR960035967A (ko) 1996-10-28
KR0144228B1 KR0144228B1 (ko) 1998-08-17

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KR1019950004445A KR0144228B1 (ko) 1995-03-04 1995-03-04 다층 금속배선의 층간 절연막 형성 방법

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US (1) US5804509A (ko)
JP (1) JP3026154B2 (ko)
KR (1) KR0144228B1 (ko)
DE (1) DE19608209A1 (ko)
GB (1) GB2298658B (ko)
TW (1) TW309656B (ko)

Families Citing this family (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2937140B2 (ja) * 1996-10-09 1999-08-23 日本電気株式会社 半導体装置の製造方法
US6200874B1 (en) 1997-08-22 2001-03-13 Micron Technology, Inc. Methods for use in forming a capacitor
US6218268B1 (en) * 1998-05-05 2001-04-17 Applied Materials, Inc. Two-step borophosphosilicate glass deposition process and related devices and apparatus
US6022812A (en) * 1998-07-07 2000-02-08 Alliedsignal Inc. Vapor deposition routes to nanoporous silica
TW394988B (en) * 1998-09-14 2000-06-21 United Microelectronics Corp Method for formation of a dielectric film
JP3827056B2 (ja) 1999-03-17 2006-09-27 キヤノンマーケティングジャパン株式会社 層間絶縁膜の形成方法及び半導体装置
EP1054444A1 (en) * 1999-05-19 2000-11-22 Applied Materials, Inc. Process for depositing a porous, low dielectric constant silicon oxide film
JP3644887B2 (ja) 2000-04-11 2005-05-11 松下電器産業株式会社 半導体装置およびその製造方法
US6753270B1 (en) * 2000-08-04 2004-06-22 Applied Materials Inc. Process for depositing a porous, low dielectric constant silicon oxide film
KR20090069362A (ko) * 2007-12-26 2009-07-01 주식회사 동부하이텍 반도체 소자의 층간 절연막 형성 방법

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* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5000113A (en) * 1986-12-19 1991-03-19 Applied Materials, Inc. Thermal CVD/PECVD reactor and use for thermal chemical vapor deposition of silicon dioxide and in-situ multi-step planarized process
JPH0680657B2 (ja) * 1989-12-27 1994-10-12 株式会社半導体プロセス研究所 半導体装置の製造方法
US5271972A (en) * 1992-08-17 1993-12-21 Applied Materials, Inc. Method for depositing ozone/TEOS silicon oxide films of reduced surface sensitivity
JPH086181B2 (ja) * 1992-11-30 1996-01-24 日本電気株式会社 化学気相成長法および化学気相成長装置
DE19516669A1 (de) * 1995-05-05 1996-11-07 Siemens Ag Verfahren zur Abscheidung einer Siliziumoxidschicht

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Publication number Publication date
GB9604622D0 (en) 1996-05-01
KR0144228B1 (ko) 1998-08-17
US5804509A (en) 1998-09-08
GB2298658A (en) 1996-09-11
DE19608209A1 (de) 1996-10-17
JPH0974090A (ja) 1997-03-18
JP3026154B2 (ja) 2000-03-27
TW309656B (ko) 1997-07-01
GB2298658B (en) 1998-07-29

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