KR950004512A - 반도체장치 및 그 제조방법 - Google Patents

반도체장치 및 그 제조방법 Download PDF

Info

Publication number
KR950004512A
KR950004512A KR1019940017090A KR19940017090A KR950004512A KR 950004512 A KR950004512 A KR 950004512A KR 1019940017090 A KR1019940017090 A KR 1019940017090A KR 19940017090 A KR19940017090 A KR 19940017090A KR 950004512 A KR950004512 A KR 950004512A
Authority
KR
South Korea
Prior art keywords
insulating tape
tape
internal
lead
inner lead
Prior art date
Application number
KR1019940017090A
Other languages
English (en)
Other versions
KR0169272B1 (ko
Inventor
도모유키 안도
Original Assignee
사토 후미오
가부시키가이샤 도시바
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 사토 후미오, 가부시키가이샤 도시바 filed Critical 사토 후미오
Publication of KR950004512A publication Critical patent/KR950004512A/ko
Application granted granted Critical
Publication of KR0169272B1 publication Critical patent/KR0169272B1/ko

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/50—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor for integrated circuit devices, e.g. power bus, number of leads
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/495—Lead-frames or other flat leads
    • H01L23/49503—Lead-frames or other flat leads characterised by the die pad
    • H01L23/4951—Chip-on-leads or leads-on-chip techniques, i.e. inner lead fingers being used as die pad
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L25/00—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
    • H01L25/03—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes
    • H01L25/10—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices having separate containers
    • H01L25/105—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices having separate containers the devices being of a type provided for in group H01L27/00
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321—Disposition
    • H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/32245—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805—Shape
    • H01L2224/4809—Loop shape
    • H01L2224/48091—Arched
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/4826—Connecting between the body and an opposite side of the item with respect to the body
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • H01L2224/491—Disposition
    • H01L2224/4912—Layout
    • H01L2224/49175—Parallel arrangements
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732—Location after the connecting process
    • H01L2224/73201—Location after the connecting process on the same surface
    • H01L2224/73215—Layer and wire connectors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/8319—Arrangement of the layer connectors prior to mounting
    • H01L2224/83192—Arrangement of the layer connectors prior to mounting wherein the layer connectors are disposed only on another item or body to be connected to the semiconductor or solid-state body
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2225/00—Details relating to assemblies covered by the group H01L25/00 but not provided for in its subgroups
    • H01L2225/03—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00
    • H01L2225/10—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices having separate containers
    • H01L2225/1005—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices having separate containers the devices being of a type provided for in group H01L27/00
    • H01L2225/1011—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices having separate containers the devices being of a type provided for in group H01L27/00 the containers being in a stacked arrangement
    • H01L2225/1017—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices having separate containers the devices being of a type provided for in group H01L27/00 the containers being in a stacked arrangement the lowermost container comprising a device support
    • H01L2225/1029—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices having separate containers the devices being of a type provided for in group H01L27/00 the containers being in a stacked arrangement the lowermost container comprising a device support the support being a lead frame
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2225/00—Details relating to assemblies covered by the group H01L25/00 but not provided for in its subgroups
    • H01L2225/03—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00
    • H01L2225/10—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices having separate containers
    • H01L2225/1005—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices having separate containers the devices being of a type provided for in group H01L27/00
    • H01L2225/1011—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices having separate containers the devices being of a type provided for in group H01L27/00 the containers being in a stacked arrangement
    • H01L2225/1047—Details of electrical connections between containers
    • H01L2225/107—Indirect electrical connections, e.g. via an interposer, a flexible substrate, using TAB
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/42—Wire connectors; Manufacturing methods related thereto
    • H01L24/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L24/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/42—Wire connectors; Manufacturing methods related thereto
    • H01L24/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L24/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/00014—Technical content checked by a classifier the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details

Abstract

본 발명은, LOC구조 테입 부착여부를 필요로 하지 않고, 더욱이 외부도출용 내부리드와 동시에 테입상에 고립하는 내부배선용 내부리드를 형성한다.
본 발명은, 내부리드(11)는 외부도출용이고, 절연성 테이프(2)에서 단부가 고착되면서 타단부가 절연성 테이프의 외측에 도출되어 있다. 또한, 내부리드(12)는 내부배선용이고, 절연성 테이프(2)상에 각각 고립되어 고착되어 있다. 이들 양 내부리드가 일체로 된 절연테이프(2)는 반도체칩(3) 표면에 고착되고, 내부리드(11,12) 각각과 반도체칩(3)상의 각 전극패드(4)가 본딩와이어에 의해 접속되어 있다. 본 발명에서는 가공 완료 이전의 리드프레임에 절연테이프를 붙이고, 그 후 내부리드와 절연테이프를 일체적으로 타발가공한다.

Description

반도체장치 및 그 제조방법
본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음
제1도는 본 발명에 1실시예에 따른 LOC구조 반도체장치의 주요부의 구성을 나타낸 평면도, 제2도는 본 발명에 따른 LOC구조 반도체장치의 기본적인 제조방법을 공정 순으로 나타낸 평면도 및 측면도, 제3도는 제1도에 도시한 구성의 타발(打拔)가공 이전의 구성을 나타낸 평면도.

Claims (3)

  1. 반도체칩(3)의 주표면상 소정의 위치에 붙여지는 절연성 테이프(2)와, 이 절연성 테이프(2)에서 단부가 고착되면서 타단부가 절연성 테이프(2)의 외측에 도출되는 외부도출용 내부리드(11), 상기 절연성 테이프(2)에서 고착되면서 절연성 테이프(2)상에 고립되는 내부절연용 내부리드(12) 및, 상기 양 내부리드(11,12) 각각과 반도체칩이 각각 전기적으로 접속되는 접속수단(4)을 구비하여 구성된 것을 특징으로 하는 반도체장치.
  2. 리드프레임에 테이프부재를 붙이는 제1공정과, 이 제1공정 후 내부리드와 테이프부재를 일체적으로 타발가공하는 제2공정, 상기 내부리드와 일체적인 테이프부재를 반도체칩의 주표면상 소정의 위치에 붙이는 제3공정 및, 상기 내부리드 각가과 반도체칩상의 소정의 전극을 각각 전기적으로 접속하는 제4공정을 구비하여 이루어진 것을 특징으로 하는 반도체장치의 제조방법.
  3. 제2항에 있어서, 상기 제2공정에 있어서 상기 테이프부재상에 고립되는 내부배선용 내부리드가 형성되는 것을 특징으로 하는 반도체장치의 제조방법.
    ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.
KR1019940017090A 1993-07-16 1994-07-15 반도체장치 KR0169272B1 (ko)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP93-176531 1993-07-16
JP5176531A JP2856642B2 (ja) 1993-07-16 1993-07-16 半導体装置及びその製造方法

Publications (2)

Publication Number Publication Date
KR950004512A true KR950004512A (ko) 1995-02-18
KR0169272B1 KR0169272B1 (ko) 1999-01-15

Family

ID=16015244

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1019940017090A KR0169272B1 (ko) 1993-07-16 1994-07-15 반도체장치

Country Status (3)

Country Link
US (1) US5473188A (ko)
JP (1) JP2856642B2 (ko)
KR (1) KR0169272B1 (ko)

Families Citing this family (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR0147259B1 (ko) * 1994-10-27 1998-08-01 김광호 적층형 패키지 및 그 제조방법
US5872398A (en) * 1996-01-11 1999-02-16 Micron Technology, Inc. Reduced stress LOC assembly including cantilevered leads
US6043558A (en) * 1997-09-12 2000-03-28 Micron Technology, Inc. IC packages including separated signal and power supply edge connections, systems and devices including such packages, and methods of connecting such packages
JP3480291B2 (ja) * 1998-01-08 2003-12-15 日立電線株式会社 半導体装置及び電子装置
JP4040484B2 (ja) 2003-01-31 2008-01-30 キヤノン株式会社 偏光分離光学系、投射型表示光学系、投射型画像表示装置および画像表示システム
JP4856863B2 (ja) 2004-09-17 2012-01-18 キヤノン株式会社 投射型画像表示装置及びそれに使用される調整方法
JP5538731B2 (ja) 2009-01-29 2014-07-02 キヤノン株式会社 積層薄膜、位相板、及び反射型液晶表示装置
KR102153159B1 (ko) * 2017-06-12 2020-09-08 매그나칩 반도체 유한회사 전력 반도체의 멀티칩 패키지

Family Cites Families (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0244746A (ja) * 1988-08-04 1990-02-14 Hitachi Ltd ウエハプローバ
JPH088330B2 (ja) * 1989-07-19 1996-01-29 日本電気株式会社 Ｌｏｃ型リードフレームを備えた半導体集積回路装置
JPH04348045A (ja) * 1990-05-20 1992-12-03 Hitachi Ltd 半導体装置及びその製造方法
JP2816239B2 (ja) * 1990-06-15 1998-10-27 株式会社日立製作所 樹脂封止型半導体装置
US5343366A (en) * 1992-06-24 1994-08-30 International Business Machines Corporation Packages for stacked integrated circuit chip cubes
US5311057A (en) * 1992-11-27 1994-05-10 Motorola Inc. Lead-on-chip semiconductor device and method for making the same

Also Published As

Publication number Publication date
KR0169272B1 (ko) 1999-01-15
US5473188A (en) 1995-12-05
JPH0738050A (ja) 1995-02-07
JP2856642B2 (ja) 1999-02-10

Similar Documents

Publication Publication Date Title
KR900005587A (ko) 반도체 디바이스 및 그 제작방법
KR890007410A (ko) 반도체 장치
KR950004512A (ko) 반도체장치 및 그 제조방법
US5763945A (en) Integrated circuit package electrical enhancement with improved lead frame design
KR920015521A (ko) 반도체 장치 및 그 제조 방법
KR920007155A (ko) 반도체 장치 및 그 제조 방법
KR920007131A (ko) 반도체 장치
KR940012583A (ko) 반도체 집적회로 장치 및 그 제조방법
KR910017598A (ko) 반도체 장치의 실장 구조
JPS5826176B2 (ja) 樹脂封止型半導体装置
KR930011190A (ko) 반도체 리드 프레임
JP2514430Y2 (ja) ハイブリッドｉｃ
JPH03122543U (ko)
JPH03129840A (ja) 樹脂封止型半導体装置
JP2629461B2 (ja) 樹脂封止形半導体装置
KR930009035A (ko) 접착리드를 이용한 반도체 패키지 구조 및 그 제조방법
KR950034719A (ko) 리드 프레임 및 이 리드 프레임을 포함한 패키지 디바이스 제조 방법
JPS62122253A (ja) 半導体装置
JPH0317636U (ko)
JPS6042619B2 (ja) 半導体装置
JPH04134853A (ja) 半導体装置用リードフレーム
KR920001699A (ko) 반도체장치
JPS5811252U (ja) 半導体装置用パツケ−ジ
KR930014845A (ko) 브이에스엠피(vsmp : vertical small mounting package) 구조 및 그 제작방법
KR970053655A (ko) 칩크기 반도체 패키지 및 그 제조방법

Legal Events

Date Code Title Description
A201 Request for examination
E902 Notification of reason for refusal
E701 Decision to grant or registration of patent right
GRNT Written decision to grant
FPAY Annual fee payment

Payment date: 20030930

Year of fee payment: 6

LAPS Lapse due to unpaid annual fee