JPS6042619B2 - 半導体装置 - Google Patents

半導体装置

Info

Publication number
JPS6042619B2
JPS6042619B2 JP55139587A JP13958780A JPS6042619B2 JP S6042619 B2 JPS6042619 B2 JP S6042619B2 JP 55139587 A JP55139587 A JP 55139587A JP 13958780 A JP13958780 A JP 13958780A JP S6042619 B2 JPS6042619 B2 JP S6042619B2
Authority
JP
Japan
Prior art keywords
base
lead
cap
sealing surface
semiconductor die
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP55139587A
Other languages
English (en)
Other versions
JPS5763849A (en
Inventor
厚三 澤口
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nippon Electric Co Ltd filed Critical Nippon Electric Co Ltd
Priority to JP55139587A priority Critical patent/JPS6042619B2/ja
Publication of JPS5763849A publication Critical patent/JPS5763849A/ja
Publication of JPS6042619B2 publication Critical patent/JPS6042619B2/ja
Expired legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/495—Lead-frames or other flat leads
    • H01L23/49541—Geometry of the lead-frame
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805—Shape
    • H01L2224/4809—Loop shape
    • H01L2224/48091—Arched
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151—Die mounting substrate
    • H01L2924/1515—Shape
    • H01L2924/15153—Shape the die mounting substrate comprising a recess for hosting the device
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151—Die mounting substrate
    • H01L2924/15165—Monolayer substrate
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/161—Cap
    • H01L2924/1615—Shape
    • H01L2924/16152—Cap comprising a cavity for hosting the device, e.g. U-shaped cap
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/161—Cap
    • H01L2924/163—Connection portion, e.g. seal
    • H01L2924/16315—Shape
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/161—Cap
    • H01L2924/163—Connection portion, e.g. seal
    • H01L2924/164—Material
    • H01L2924/16586—Material with a principal constituent of the material being a non metallic, non metalloid inorganic material
    • H01L2924/16588—Glasses, e.g. amorphous oxides, nitrides or fluorides

Landscapes

  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Lead Frames For Integrated Circuits (AREA)

Description

【発明の詳細な説明】 本発明は半導体装置に係り、特に半導体ダイを収納す
るベース及びキャップから構成される気密封止型パッケ
ージにおいて半導体ダイをパッケージ外部に導通させる
リードをベースとキャップの接面て気密に貫通させた半
導体装置に関するものてある。
従来の半導体装置てはリードはベースとキャップの接
面において、平担なベース面上にガラス等で取付けて気
密に封止される構造となつていたためリードに機械的ス
トレスが加わつた場合、封止ガラスにそのストレスが直
接伝達されてガラスに損傷を与えたり、又リードの取付
けの際にリードの位置決めが難しく外形寸法の公差が大
きくなるという難点があった。
本発明はこれらの難点を改善させた半導体装置を提供
することを目的とするものてあり、ベースとリードの接
面において、ベースにはリードに向つてベースと一体を
なす突起を形成し、又リードにはベースの突起に対応す
る開孔を形成し、これらをパッケージの封止時に結合さ
せることを特徴とするものである。
以下、本発明の実施例を図面によつて説明する。
第１図、第２図に示すように、セラミック材料等のベー
ス１とキャップ２の中に半導体ダイ３が収納され、半導
体ダイ３と導通細線４により接続されたリード５がベー
ス１とキャップ２との接面を気密に封止するためのガラ
ス等の封止材料６を貫通しており、その貫通部分ではベ
ース１と一体をなす突起１ａがリード５と一体をなす開
孔５ａとに結合されている構造を有するものてある。
以上のように本発明によればリードがベースに結合して
いる構造であるのでリードに機械的ストレスが加わつて
もそのストレスはベースに吸収され、封止ガラスヘのス
トレスを著しく減することができる。又封止時のリード
の位置決めもベースの突起とリードの開孔がそれぞれ公
差を少なく製造できるので封止の際に突起と開孔を結合
させる単純な位置合せのみて容易に達成できる等、従来
の半導体装置の難点が大幅に改善できる。
【図面の簡単な説明】
第１図は本発明による半導体装置の一実施例を示す縦
断面図、第２図はその要部の拡大図である。 １ ・・・・・・ベース、１ａ・・・・・・突起、２
・・・・・・キャップ、３・・・・・・半導体ダイ、
４ ・・・・・・導通細線、５・・・・・・リード、５
ａ・・・・・・開孔、６ ・・・・・・封止材料。

Claims (1)

    【特許請求の範囲】
  1. １ 半導体ダイを載置するベースの封止面と該半導体ダ
    イを被うキャップの封止面とが封止材で気密封止され、
    該半導体ダイに電気的に接続されたリードが前記ベース
    の封止面と前記キャップの封止面との間から外へ引き出
    されている半導体装置において、前記ベース封止面には
    突起が設けられ、前記リードには該突起が貫通する開孔
    が設けられていることを特徴とする半導体装置。
JP55139587A 1980-10-06 1980-10-06 半導体装置 Expired JPS6042619B2 (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP55139587A JPS6042619B2 (ja) 1980-10-06 1980-10-06 半導体装置

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP55139587A JPS6042619B2 (ja) 1980-10-06 1980-10-06 半導体装置

Publications (2)

Publication Number Publication Date
JPS5763849A JPS5763849A (en) 1982-04-17
JPS6042619B2 true JPS6042619B2 (ja) 1985-09-24

Family

ID=15248733

Family Applications (1)

Application Number Title Priority Date Filing Date
JP55139587A Expired JPS6042619B2 (ja) 1980-10-06 1980-10-06 半導体装置

Country Status (1)

Country Link
JP (1) JPS6042619B2 (ja)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2585362B2 (ja) * 1988-04-20 1997-02-26 株式会社東芝 封止型半導体装置とその製造方法

Also Published As

Publication number Publication date
JPS5763849A (en) 1982-04-17

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