JPS6263935U - - Google Patents
Info
- Publication number
- JPS6263935U JPS6263935U JP1985154616U JP15461685U JPS6263935U JP S6263935 U JPS6263935 U JP S6263935U JP 1985154616 U JP1985154616 U JP 1985154616U JP 15461685 U JP15461685 U JP 15461685U JP S6263935 U JPS6263935 U JP S6263935U
- Authority
- JP
- Japan
- Prior art keywords
- counterbore hole
- bare chip
- semiconductor bare
- ceramic substrate
- pattern
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000004065 semiconductor Substances 0.000 claims description 6
- 239000000919 ceramic Substances 0.000 claims description 4
- 239000000758 substrate Substances 0.000 claims description 4
- 239000000853 adhesive Substances 0.000 description 2
- 230000001070 adhesive effect Effects 0.000 description 2
- 239000003566 sealing material Substances 0.000 description 2
- 239000002184 metal Substances 0.000 description 1
- 229910000679 solder Inorganic materials 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
- H01L2224/321—Disposition
- H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/32225—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
- H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
- H01L2224/732—Location after the connecting process
- H01L2224/73251—Location after the connecting process on different surfaces
- H01L2224/73265—Layer and wire connectors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/73—Means for bonding being of different types provided for in two or more of groups H01L24/10, H01L24/18, H01L24/26, H01L24/34, H01L24/42, H01L24/50, H01L24/63, H01L24/71
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/161—Cap
- H01L2924/1615—Shape
- H01L2924/16152—Cap comprising a cavity for hosting the device, e.g. U-shaped cap
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/19—Details of hybrid assemblies other than the semiconductor or other solid state devices to be connected
- H01L2924/191—Disposition
- H01L2924/19101—Disposition of discrete passive components
- H01L2924/19107—Disposition of discrete passive components off-chip wires
Landscapes
- Wire Bonding (AREA)
Description
第1図はこの考案の一実施例を示す斜視図、第
2図は第1図に示したものの断面図、第3図はサ
ブ基板を示す斜視図、第4図は従来の密封型混成
集積回路装置を示す斜視図、第5図は第4図に示
したものにカバーをかぶせた状態を示す断面図で
ある。 図において1はセラミツク基板、2は回路パタ
ーン、3は半導体ベアチツプ、4は導電性接着剤
又ははんだ、5はボンデイングワイヤ、6はパツ
ケージ、7は内部電極、8は外部リード、9は接
着剤、10はカバー、11は封止材、21は座ぐ
り穴、22はパターン電極、23はサブ基板、2
4はワイヤパツド、25は絶縁性封止材、26は
金属リボンである。なお、各図中同一符号は同一
又は相当部分を示す。
2図は第1図に示したものの断面図、第3図はサ
ブ基板を示す斜視図、第4図は従来の密封型混成
集積回路装置を示す斜視図、第5図は第4図に示
したものにカバーをかぶせた状態を示す断面図で
ある。 図において1はセラミツク基板、2は回路パタ
ーン、3は半導体ベアチツプ、4は導電性接着剤
又ははんだ、5はボンデイングワイヤ、6はパツ
ケージ、7は内部電極、8は外部リード、9は接
着剤、10はカバー、11は封止材、21は座ぐ
り穴、22はパターン電極、23はサブ基板、2
4はワイヤパツド、25は絶縁性封止材、26は
金属リボンである。なお、各図中同一符号は同一
又は相当部分を示す。
Claims (1)
- 座ぐり穴を有し、この座ぐり穴が設けられた面
に回路パターンと前記座ぐり穴の開口部の周囲に
パターン電極を有するセラミツク基板と、前記座
ぐり穴及び座ぐり穴の開口部の周囲のパターン電
極を覆う大きさで、一方の面の中心部に半導体ベ
アチツプが取付けられ、この半導体ベアチツプの
周囲にこの半導体ベアチツプと接続されている外
部接続パツドを有するサブ基板とで構成され、前
記セラミツク基板の座ぐり穴の内側に前記半導体
ベアチツプを収容し、前記パターン電極と前記外
部接続パツドが当接するようにして座ぐり穴を前
記サブ基板で覆い、半導体ベアチツプがセラミツ
ク基板の座ぐり穴の中に密封してあることを特徴
とする気密封止型混成集積回路装置。
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP1985154616U JPS6263935U (ja) | 1985-10-09 | 1985-10-09 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP1985154616U JPS6263935U (ja) | 1985-10-09 | 1985-10-09 |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS6263935U true JPS6263935U (ja) | 1987-04-21 |
Family
ID=31074570
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP1985154616U Pending JPS6263935U (ja) | 1985-10-09 | 1985-10-09 |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS6263935U (ja) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH0430439A (ja) * | 1990-05-25 | 1992-02-03 | Rohm Co Ltd | ベアチップの実装構造 |
-
1985
- 1985-10-09 JP JP1985154616U patent/JPS6263935U/ja active Pending
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH0430439A (ja) * | 1990-05-25 | 1992-02-03 | Rohm Co Ltd | ベアチップの実装構造 |
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