JPS61151337U - - Google Patents

Info

Publication number
JPS61151337U
JPS61151337U JP3294985U JP3294985U JPS61151337U JP S61151337 U JPS61151337 U JP S61151337U JP 3294985 U JP3294985 U JP 3294985U JP 3294985 U JP3294985 U JP 3294985U JP S61151337 U JPS61151337 U JP S61151337U
Authority
JP
Japan
Prior art keywords
integrated circuit
hybrid integrated
circuit package
connection terminals
circuit board
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP3294985U
Other languages
English (en)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP3294985U priority Critical patent/JPS61151337U/ja
Publication of JPS61151337U publication Critical patent/JPS61151337U/ja
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805Shape
    • H01L2224/4809Loop shape
    • H01L2224/48091Arched

Landscapes

  • Wire Bonding (AREA)

Description

【図面の簡単な説明】
第1図はこの考案の一実施例を示す斜視図、第
2図は第1図の断面図、第3図は従来の装置の一
例を示す斜視図、第4図は第3図の断面図である
。 図において、1はパツケージ、2は外部リード
、3は基板、4は回路パターン、5は内部電極、
6はパターン電極、7はワイヤ、8は内部電極端
子、9は側面パターン電極、10はハンダである
。なお、各図中同一符号は同一または相当部分を
示す。

Claims (1)

    【実用新案登録請求の範囲】
  1. 外部接続用リードを有する混成集積回路用パツ
    ケージと、この混成集積回路用パツケージ内に接
    着収納される混成集積回路基板とで構成され、前
    記混成集積回路用パツケージは内部に前記外部接
    続用リードと各々対応する内部接続端子を有し、
    また前記混成集積回路基板は側面部に前記内部接
    続端子と対応してパターン電極を設け、この基板
    側面電極と前記内部接続端子とをハンダ付けして
    前記混成集積回路基板と前記混成集積回路用パツ
    ケージとの接続が成されていることを特徴とする
    混成集積回路装置。
JP3294985U 1985-03-08 1985-03-08 Pending JPS61151337U (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP3294985U JPS61151337U (ja) 1985-03-08 1985-03-08

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP3294985U JPS61151337U (ja) 1985-03-08 1985-03-08

Publications (1)

Publication Number Publication Date
JPS61151337U true JPS61151337U (ja) 1986-09-18

Family

ID=30534940

Family Applications (1)

Application Number Title Priority Date Filing Date
JP3294985U Pending JPS61151337U (ja) 1985-03-08 1985-03-08

Country Status (1)

Country Link
JP (1) JPS61151337U (ja)

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