JPS5887339U - 半導体装置 - Google Patents

半導体装置

Info

Publication number
JPS5887339U
JPS5887339U JP18252781U JP18252781U JPS5887339U JP S5887339 U JPS5887339 U JP S5887339U JP 18252781 U JP18252781 U JP 18252781U JP 18252781 U JP18252781 U JP 18252781U JP S5887339 U JPS5887339 U JP S5887339U
Authority
JP
Japan
Prior art keywords
semiconductor element
substrate
resin material
metal wire
thin metal
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP18252781U
Other languages
English (en)
Inventor
細見 裕
Original Assignee
日本電気ホームエレクトロニクス株式会社
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 日本電気ホームエレクトロニクス株式会社 filed Critical 日本電気ホームエレクトロニクス株式会社
Priority to JP18252781U priority Critical patent/JPS5887339U/ja
Publication of JPS5887339U publication Critical patent/JPS5887339U/ja
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481Disposition
    • H01L2224/48151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/48247Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/49Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • H01L2224/491Disposition
    • H01L2224/4912Layout
    • H01L2224/49171Fan-out arrangements

Landscapes

  • Wire Bonding (AREA)
  • Lead Frames For Integrated Circuits (AREA)

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。

Description

【図面の簡単な説明】
第1図は本案の一実施例を示す横断面図、第2図は第1
図の側断面図である。 図中、1は基板、2は半導体素子、3はリード、31〜
36はリード片、4は突出部、5は金属細線、6は樹脂
材である。

Claims (1)

    【実用新案登録請求の範囲】
  1. 基板に半導体素子を固定すると共1こ、半導体素子の電
    極と一端が基板の近傍に位置するように配設されたリー
    ドとを金属細線にて接続し、かつ半導体素子を含む主要
    部分を樹脂材にてモールド被密したものにおいて、上記
    リード樹脂材による被覆部分でかつ金属細線の接続経路
    外に山形に突出する突出部を形成したことを特徴とする
    半導体装置。
JP18252781U 1981-12-08 1981-12-08 半導体装置 Pending JPS5887339U (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP18252781U JPS5887339U (ja) 1981-12-08 1981-12-08 半導体装置

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP18252781U JPS5887339U (ja) 1981-12-08 1981-12-08 半導体装置

Publications (1)

Publication Number Publication Date
JPS5887339U true JPS5887339U (ja) 1983-06-14

Family

ID=29980969

Family Applications (1)

Application Number Title Priority Date Filing Date
JP18252781U Pending JPS5887339U (ja) 1981-12-08 1981-12-08 半導体装置

Country Status (1)

Country Link
JP (1) JPS5887339U (ja)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2010056372A (ja) * 2008-08-29 2010-03-11 Sanyo Electric Co Ltd 樹脂封止型半導体装置とその製造方法

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2010056372A (ja) * 2008-08-29 2010-03-11 Sanyo Electric Co Ltd 樹脂封止型半導体装置とその製造方法

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