JPS58155835U - 半導体装置 - Google Patents
半導体装置Info
- Publication number
- JPS58155835U JPS58155835U JP5230182U JP5230182U JPS58155835U JP S58155835 U JPS58155835 U JP S58155835U JP 5230182 U JP5230182 U JP 5230182U JP 5230182 U JP5230182 U JP 5230182U JP S58155835 U JPS58155835 U JP S58155835U
- Authority
- JP
- Japan
- Prior art keywords
- semiconductor element
- semiconductor equipment
- lead
- metal wire
- thin metal
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
- H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
- H01L2224/491—Disposition
- H01L2224/4912—Layout
- H01L2224/49171—Fan-out arrangements
Landscapes
- Wire Bonding (AREA)
- Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
Abstract
(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。
め要約のデータは記録されません。
Description
第１図は従来例の横断面図、第２図は第１図の正断面図
、第３図は第１図の側断面図、第４図は本案の一実施例
を示す横断面図、第５図は第４図の正断面図、第６図は
第４図の側断面図である。 図中、１は基板部、２は半導体素子、３はリード、３１
〜３３はリード片、５は金属細線、６は樹脂材である。
、第３図は第１図の側断面図、第４図は本案の一実施例
を示す横断面図、第５図は第４図の正断面図、第６図は
第４図の側断面図である。 図中、１は基板部、２は半導体素子、３はリード、３１
〜３３はリード片、５は金属細線、６は樹脂材である。
Claims (1)
- 基板部に半導体素子を固定すると共に、半導体素子の電
極とリードとを金属細線にて接続し、かつ半導体素子を
含む主要部分を樹脂材にてモールド被覆したものにおい
て、上記金属細線の長さをリードに変位が生じてもその
変位を充分に吸収しうる程度に設定したことを特徴とす
る半導体装置。
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP5230182U JPS58155835U (ja) | 1982-04-09 | 1982-04-09 | 半導体装置 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP5230182U JPS58155835U (ja) | 1982-04-09 | 1982-04-09 | 半導体装置 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS58155835U true JPS58155835U (ja) | 1983-10-18 |
Family
ID=30063009
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP5230182U Pending JPS58155835U (ja) | 1982-04-09 | 1982-04-09 | 半導体装置 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS58155835U (ja) |
-
1982
- 1982-04-09 JP JP5230182U patent/JPS58155835U/ja active Pending
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