JPS5887359U - 半導体装置 - Google Patents
半導体装置Info
- Publication number
- JPS5887359U JPS5887359U JP1981183837U JP18383781U JPS5887359U JP S5887359 U JPS5887359 U JP S5887359U JP 1981183837 U JP1981183837 U JP 1981183837U JP 18383781 U JP18383781 U JP 18383781U JP S5887359 U JPS5887359 U JP S5887359U
- Authority
- JP
- Japan
- Prior art keywords
- semiconductor element
- semiconductor equipment
- metal wire
- thin metal
- lead
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
- H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
- H01L2224/491—Disposition
- H01L2224/4912—Layout
- H01L2224/49171—Fan-out arrangements
Landscapes
- Lead Frames For Integrated Circuits (AREA)
Abstract
(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。
め要約のデータは記録されません。
Description
第1図は従来例の横断面図、第2図は本案の一実施例を
示す横断面図、第3図は要部回路構成図である。 図中、1は放熱板、4は半導体素子、5はリード、51
〜56はリード片、56□、562は分割片、6、 6
.、 62は金属細線、7は樹脂材である。
示す横断面図、第3図は要部回路構成図である。 図中、1は放熱板、4は半導体素子、5はリード、51
〜56はリード片、56□、562は分割片、6、 6
.、 62は金属細線、7は樹脂材である。
Claims (1)
- 放熱板に半導体素子を固定すると共に、それの電極と一
端が半導体素子の近傍に位置するように配設されたり一
′ドとを金属細線にて接続し、かつ半導体素子を含む主
要部分を樹脂材にてモールド被覆したものにおいて、上
記リードのうち、グランド用リードの一端を複数に分割
し、それぞれの分割片にそれぞれのグランド用電極から
の金属細線を接続17たことを特徴とする半導体装置。
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP1981183837U JPS5887359U (ja) | 1981-12-09 | 1981-12-09 | 半導体装置 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP1981183837U JPS5887359U (ja) | 1981-12-09 | 1981-12-09 | 半導体装置 |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS5887359U true JPS5887359U (ja) | 1983-06-14 |
Family
ID=29983456
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP1981183837U Pending JPS5887359U (ja) | 1981-12-09 | 1981-12-09 | 半導体装置 |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS5887359U (ja) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH0661410A (ja) * | 1993-01-25 | 1994-03-04 | Mitsubishi Electric Corp | 半導体装置 |
-
1981
- 1981-12-09 JP JP1981183837U patent/JPS5887359U/ja active Pending
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH0661410A (ja) * | 1993-01-25 | 1994-03-04 | Mitsubishi Electric Corp | 半導体装置 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
JPS5887359U (ja) | 半導体装置 | |
JPS60939U (ja) | 半導体装置 | |
JPS5933254U (ja) | 半導体装置 | |
JPS58155835U (ja) | 半導体装置 | |
JPS58158453U (ja) | 半導体装置 | |
JPS61240U (ja) | 半導体装置 | |
JPS5877058U (ja) | 半導体装置 | |
JPS605147U (ja) | 半導体装置 | |
JPS59191744U (ja) | 半導体装置 | |
JPS5991747U (ja) | 半導体装置 | |
JPS58155849U (ja) | 半導体装置 | |
JPS58140636U (ja) | 半導体装置 | |
JPS5929051U (ja) | 半導体装置 | |
JPS59192845U (ja) | 半導体装置 | |
JPS59191742U (ja) | 半導体装置 | |
JPS58155836U (ja) | 半導体装置 | |
JPS5945998U (ja) | 半導体装置のテ−ピング構体 | |
JPS5889951U (ja) | 半導体装置 | |
JPS59155748U (ja) | 半導体装置 | |
JPS5961543U (ja) | 半導体装置 | |
JPS58135957U (ja) | 半導体装置 | |
JPS5839058U (ja) | 半導体装置 | |
JPS59192846U (ja) | 半導体装置 | |
JPS5881937U (ja) | 半導体装置 | |
JPS59143096U (ja) | 電子機器の放熱構造 |