KR950004446A - 전자소자 및 그 제조방법 - Google Patents

전자소자 및 그 제조방법 Download PDF

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KR950004446A
KR950004446A KR1019940016727A KR19940016727A KR950004446A KR 950004446 A KR950004446 A KR 950004446A KR 1019940016727 A KR1019940016727 A KR 1019940016727A KR 19940016727 A KR19940016727 A KR 19940016727A KR 950004446 A KR950004446 A KR 950004446A
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electronic device
film
insulating film
wiring pattern
nitrogen
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KR1019940016727A
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KR0156557B1 (ko
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고우이치 후쿠다
도모후미 오오바
마사노리 미야자키
히로후미 후쿠이
치사토 이와사키
야스히코 가사마
마사루 구보다
히토시 기타가와
다다히로 오오미
아키라 나카노
오사무 요시다
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다다히로 오오미
가타오카 마사타카
알프스뎅키 가부시키가이샤
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Priority claimed from JP34662593A external-priority patent/JP2640910B2/ja
Priority claimed from JP3576794A external-priority patent/JP2662180B2/ja
Application filed by 다다히로 오오미, 가타오카 마사타카, 알프스뎅키 가부시키가이샤 filed Critical 다다히로 오오미
Publication of KR950004446A publication Critical patent/KR950004446A/ko
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    • H—ELECTRICITY
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    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • C—CHEMISTRY; METALLURGY
    • C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
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    • C23C14/00—Coating by vacuum evaporation, by sputtering or by ion implantation of the coating forming material
    • C23C14/06—Coating by vacuum evaporation, by sputtering or by ion implantation of the coating forming material characterised by the coating material
    • C23C14/0641—Nitrides
    • C23C14/0652—Silicon nitride
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    • H01L21/02208—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates the layer being characterised by the precursor material for deposition the precursor containing a compound comprising Si
    • H01L21/02211—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates the layer being characterised by the precursor material for deposition the precursor containing a compound comprising Si the compound being a silane, e.g. disilane, methylsilane or chlorosilane
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    • H01L21/0226—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process
    • H01L21/02263—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase
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    • H01L21/02274—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase deposition by decomposition or reaction of gaseous or vapour phase compounds, i.e. chemical vapour deposition in the presence of a plasma [PECVD]
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    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
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    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/314—Inorganic layers
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    • H01L29/66409—Unipolar field-effect transistors
    • H01L29/66477—Unipolar field-effect transistors with an insulated gate, i.e. MISFET
    • H01L29/66742—Thin film unipolar transistors
    • H01L29/6675—Amorphous silicon or polysilicon transistors
    • H01L29/66765—Lateral single gate single channel transistors with inverted structure, i.e. the channel layer is formed after the gate

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Abstract

본 발명은, 단층에서도 탁월한 절연내압을 가지는 질화규소절연막을 이용한 TFT에 대표되는 전자소자 및 이것을 확실하게 제조하는 제조방법을 제공하는 것으로, 절연성 기체의 표면에 도전성의 배선패턴이 형성되어 있고, 그 위를 덮어서 절연층이 형성되어 있는 전자소자에서 절연층은 질화규소절연막으로 되며, 배선패턴 의 기체와의 접촉각도(θ)는 60°≤θ이고, 질화규소절연막의 막두께(Tn1)와 상기 배선패턴의 막두께(Tg)와의 비(Tn1/Tg)는 2≤Tn1/Tg이며, 질화규소절연막이 배선패턴의 단차부 때문에 솟아올라있는 솟아오름 개시위치와 배선패턴의 상단부와의 수평거리(Tn2)는 0.6≤Tn2/Tn1의 관계인 것을 특징으로 한다.

Description

전자소자 및 그 제조방법
본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음
제1도는 배선 패턴 근방을 확대한 개념적 단면도, 제2도는 실시예에서 제조한 TFT를 나타내는 평면도, 제3도는 제2도의 ①-①´선에 따른 단면도

Claims (14)

  1. 적어도 표면이 절연성인 기체(氣體)의 표면에 도전성의 배선패턴이 형성되어 있고, 상기 기체 및 상기 배선패턴의 일부 또는 전부를 덮어서 절연층이 형성되어 있는 전자소자에 있어서, 상기 절연층은 질화규소절연막으로 되고, 상기 배선패턴의 상기 기체와의 접촉각도(θ)는 60°≤θ이고, 질화규소절연막의 막두께(Tn1)와 상기 배선패턴의 막두께(Tg)와의 비(Tn/Tg)는 2≤Tn1/Tg이며, 상기 질화규소절연막기 배선패턴의 단차부 때문에 솟아올라있는 솟아오름위치와, 상기 배선패턴의 상단부와의 수평거리(Tn2)는 0.6≤Tn2/Tn1의 관계인 것을 특징으로 하는 전자소자
  2. 제1항에 있어서, 상기 절연층은 상기 질화규소절연막 단층으로 되는 것을 특징으로 하는 전자소자.
  3. 제1항 또는 제2항에 있어서, Tn1/Tg≤4인 것을 특징으로 하는 전자소자.
  4. 제1항 내지 제3항 중 어느 한 항에 있어서, 상기 질화규소막의 막두께는 200㎚-400㎚인 것을 특징으로 하는 전자소자.
  5. 제1항 내지 제4항 중 어느 한 항에 있어서, 상기 전자소자는 역 스태거(stagger)형의 박막 트랜지스터이고, 상기 배선패턴은 게이트 배선이며, 상기 질화규소절연막은 게이트 절연막인 것을 특징으로 하는 전자소자.
  6. 제1항 내지 제5항 중의 어느 한 항에 있어서 상기 질화규소절연막은 CVD법에 의해 형성된 막인 것을 특징으로 하는 전자소자.
  7. 적어도 표면이 절연성인 기체의 그 표면에, 도전성의 배선패턴이 형성되어 있고, 상기 기체 및 상기 배선패턴의 일부 또는 전부를 덮어서 절연막이 형성되어 있는 전자소자에 있어서, 상기 절연막은 주성분이 규소 및 질소이고, 상기 규소와 질소의 원소비는 약 3:4이며, 상기 절연막은 희소가스원소의 함유율이 원소함유율 0.01-3atm%인 것을 특징으로 하는 전자소자.
  8. 제7항에 있어서, 상기 전자소자가 박막트랜지스터인 것을 특징으로 하는 전자소자.
  9. 제9항 또는 제8항에 있어서, 희소가스원소가 아르곤원소인 것을 특징으로 하는 전자소자.
  10. 적어도 표면이 절연성인 기체의 표면에 도전성의 배선패턴이 형성되어 있고, 상기 기체 및 상기 배선패턴의 일부 또는 전부를 덮어서 주성분이 규소와 질소인 절연막이 형성되어 있는 전자소자의 제조방법에 있어서, 상기 절연막을 플라즈마 CVD법으로 막을 형성하기 위한 가스조성이 적어도 실란과 암모니아와 질소와 희소가스원소를 포함하는 혼합가스이며, 상기 희소가스원소와 질소와의 몰비가 희소가스원소/질소=0.1∼10의 범위인 것을 특징으로 하는 전자소자의 제조방법.
  11. 제10항에 있어서, 상기 절연막이 220℃∼280℃인 범위로 막을 형성하게 되는 것을 특징으로 하는 전자소자의 제조방법.
  12. 제10항 또는 제11항에 있어서, 상기 전자소자가 상기 절연막에 직접 접하고 있는 아모르퍼스 실리콘막을 가지는 전자소자이고, 상기 절연막과 상기 아모르퍼스 실리콘막이 거의 같은 온도로 막을 형성하게 되는 것을 특징으로 하는 전자소자의 제조방법.
  13. 적어도 표면이 절연성인 기체의 표면에 도전성이 배선패턴이 형성되어 있고, 상기 기체 및 상기 배선패턴의 일부 또는 전부를 덮어서 주성분이 규소와 질소인 절연막이 형성되어 있는 전자소자의 제조방법에 있어서, 상기 절연막을 스퍼터법으로 막을 형성할 때의 분위기 가스가 적어도 희소가스원소와 수소가스와 질소가스 또는 암모니아가스의 혼합계(混合系)이며, 그 가스분압이 희소가스원소분압 0.20∼0.40Pa, 수소분압 0.02∼0.15Pa의 범위인 것을 특징으로 하는 전자소자의 제조방법.
  14. 제10항 내지 제13항 중의 어느 한 항에 있어서, 상기 희소가스원소가 아르곤원소인 것을 특징으로 하는 전자소자의 제조방법.
    ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.
KR1019940016727A 1993-07-14 1994-07-12 전자소자 및 그 제조방법 KR0156557B1 (ko)

Applications Claiming Priority (6)

Application Number Priority Date Filing Date Title
JP19686693 1993-07-14
JP93-196866 1993-07-14
JP34662593A JP2640910B2 (ja) 1993-07-14 1993-12-21 電子素子およびその製造方法
JP93-346625 1993-12-21
JP3576794A JP2662180B2 (ja) 1994-03-07 1994-03-07 電子素子
JP94-35767 1994-03-07

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KR950004446A true KR950004446A (ko) 1995-02-18
KR0156557B1 KR0156557B1 (ko) 1998-12-01

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KR20030055060A (ko) * 2001-12-26 2003-07-02 엘지.필립스 엘시디 주식회사 액정표시장치용 어레이기판과 그 제조방법

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