KR950002073A - 박막트랜지스터 및 그의 제조방법 - Google Patents

박막트랜지스터 및 그의 제조방법 Download PDF

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KR950002073A
KR950002073A KR1019940012848A KR19940012848A KR950002073A KR 950002073 A KR950002073 A KR 950002073A KR 1019940012848 A KR1019940012848 A KR 1019940012848A KR 19940012848 A KR19940012848 A KR 19940012848A KR 950002073 A KR950002073 A KR 950002073A
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film
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polysilicon
forming
polysilicon film
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사토시 시미즈
슈이치 우에노
타카시 이포시
시게노부 마메다
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기다오까 다까시
미쓰비시 뎅끼 가부시끼가이샤
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Abstract

전기특성이 향상됨과 함께, 개개의 전기특성의 흩어짐을 감소하는 것이 가능한 박막트랜지스터(TFT) 및 그의 제조방법이 개시된다. 그의 박막트랜지스터의 제조방법에는, 게이트전극의 단차를 이용하여 게이트전극의 측벽부분에 위치하는 영역에만 선택적으로 폴리실리콘을 잔여시킨 상태로 다른 영역에 실리콘 및 질소 중의 어느 것을 이온주입하는 것에 의하여 어모퍼스 실리콘을 형성한다. 그리고, 열처리를 행하는 것에 의하여 잔여한 폴리실리콘을 원결정으로서 어모퍼스 실리콘을 폴리실리콘으로 한다. 이것에 의해 결정립경의 큰 결정립을 가지는 폴리실리콘이 균일하게 형성된다. 그의 결과, TFT의 전기특성을 향상시키는 것이 됨과 함께 개개의 TFT간에서 전기특성이 흩어지는 것도 없다.

Description

박막트랜지스터 및 그의 제조방법
본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음
제 1 도는 본 발명의 TFT의 제조방법의 제 1 실시예의 제 1 공정을 설명하기 위한 단면도, 제 2 도는 본 발명의 TFT의 제조방법의 제 1 실시예의 제 2 공정을 설명하기 위한 단면도, 제 3 도는 제 2 도에 표시한 제 2 공정에 대응한 평면도.

Claims (10)

  1. 절연막상에 게이트전극을 형성하는 공정과, 상기 게이트전극을 가리도록 게이트 절연막을 형성하는 공정과, 상기 게이트 절연막상에 폴리실리콘막을 형성하는 공정도, 상기 폴리실리콘막의 소정영역에 실리콘 및 질소중의 어느 것을 이온주입하는 것에 의하여 상기 폴리실리콘막의 일부를 잔여시킨 상태로 나머지의 상기 실리콘막을 어모퍼스화하여 어모퍼스 실리콘을 형성하는 공정과, 열처리를 행하는 것에 의해 상기 잔여한 폴리실리콘막을 원결정으로서 상기 어모퍼스 실리콘을 폴리실리콘으로 하는 공정과를 구비한 박막트랜지스터의 제조방법.
  2. 제 1 항에 있어서, 상기 어모퍼스 실리콘을 형성하는 공정은, 상기 폴리실리콘막중 상기 게이트전극의 적어도 1변의 측벽근방에 위치하는 영역을 잔여시킨 상태로 나머지의 폴리실리콘막을 어모퍼스화하는 공정을 포함하는 박막트랜지스터의 제조방법.
  3. 제 1 항에 있어서, 상기 이온주입하는 공정을 상기 폴리실리콘막상의 상기 게이트전극상의 측벽근방에 위치하는 영역에 절연막을 형성한 후에 행하는 박막트랜재스터의 제조방법.
  4. 제 1 항에 있어서, 상기 어모퍼스 실리콘을 형성하는 공정은, 상기 폴리실리콘막의 어모퍼스화하는 영역상에 산화막을 형성하는 공정과, 상기 이온주입의 이온이 상기 산화막을 관통하고, 상기 산화막하의 상기 폴리실리콘막을 어모퍼스화함과 같은 주입에네르기로 경사짐 이온주입을 행하는 공정과를 포함하는 박막트랜지스터의 제조방법.
  5. 제 4항에 있어서, 더욱더 상기 산화막을 마스크로서 상기 폴리실리콘막을 패터닝하는 공정을 포함하는 박막트랜지스터의 제조방법.
  6. 제 1 항에 있어서, 상기 어모퍼스 실리콘을 형성하는 공정은, 상기 폴리실리콘막의 어모퍼스화하는 영역상에 산화막을 형성하는 공정과, 상기 이온주입의 이온이 상기 산화막을 관통하여 상기 산화막하의 상기 풀리실리콘막을 어모퍼스화함과 같은 주입에네르기로 이온주입하는 것에 의해, 상기 산화막하의 폴리실리콘막중 상기 게이트전극의 측벽에 위치하는 부분을 잔여시킨 상태로 나머지의 부분을 어모퍼스화하는 공정과, 상기 이온주입의 이온이 상기 산화막을 관통하지 않도록한 주입에네르기로 이온주입을 행하는 것에 의하여 상기 폴리실리콘막의 상기 산화막하에 위치하는 영역이외의 영역을 어모퍼스화하는 공정과를 포함하는 박막트랜지스터의 제조방법.
  7. 절연막상에 폴리실리콘막을 형성하는 공정과, 상기 폴리실리콘막상의 제 1 의 영역에 제 1 의 마스크재를 형성하는 공정과, 상기 제 1 의 마스크재를 마스크로서 상기 폴리실리콘막에 실리콘 및 질소중의 어느 것을 이온주입하는 것에 의하여 상기 폴리실리콘막의 상기 제 1 의 영역이외의 영역을 어모퍼스화하여 제 1의 어모퍼스 실리콘을 형성하는 공정과, 열처리를 행하는 것에 의해 상기 제 1 의 영역의 폴리실리콘막을 원결정으로서 상기 제 1 의 어모퍼스 실리콘을 폴리실리콘으로 하는 공정과, 상기 폴리실리콘막상의 제 2 의 영역에 제 2 의 마스크재를 형성하는 공정과, 상기 제 2 의 마스크재를 마스크로서, 상기 폴리실리콘막에 실리콘 및 질소중의 어느 것을 이온주입하는 것에 의해 상기 폴리실리콘막의 상기 제 2 의 영역이외의 영역을 어모퍼스화하여 제 2 의 어모퍼스 실리콘을 형성하는 공정과, 열처리를 행하는 것에 의해 상기 제 2 의 영역의 폴리 실리콘막을 원결정으로서 상기 제 2 의 어모퍼스 실리콘을 폴리실리콘으로 하는 공정과를 구비한 박막트랜지스터의 제조방법
  8. 제 7 항에 있어서, 상기 제 1 의 마스크재가 형성되는 제 1 의 영역과 상기 제 2 의 마스크재가 형성되는 제 2 의 영역과는 서로 인접하고 있는 박막트랜지스터의 제조방법.
  9. 절연막상에 폴리실리콘막을 형성하는 공정과, 상기 폴리실리콘막상의 제 1 의 영역에 제 1 의 마스크재를 형성하는 공정과, 상기 제 1 의 마스크재를 마스크로서 상기 폴리실리콘막에 실리콘 및 질소중의 어느 것을 이온주입하는 것에 의해 상기 폴리실리콘막의 상기 제 1 의 영역이외의 영역을 어모퍼스화하여 제 1 의 어모퍼스 실리콘을 형성하는 공정과, 열처리를 행하는 것에 의해 상기 제 1 의 영역의 폴리실리콘막을 원결정으로서 상기 제 1 의 어모퍼스 실리콘을 폴리실리콘으로 하는 공정과, 상기 제 1 의 마스크재를 관통하여 상기 제 1 의 마스크재하의 상기 폴리실리콘막의 제 1 의 영역을 어모퍼스화함과 같은 주입에네르기로 상기 폴리실리콘막에 실리콘 및 질소중의 어느 것을 이온주입하는 것에 의하여 상기 폴리실리콘막의 제 1 의 영역을 어모퍼스화하여 제 2 의 어모퍼스 실리콘을 형성하는 공정과, 열처리를 행하는 것에 의해 상기 제 1 의 영역이외의 영역의 폴리실리콘막을 원결정으로서 상기 제 2 의 어모퍼스 실리콘을 폴리실리콘으로 하는 공정과를 구비한 박막트랜지스터의 제조방법.
  10. 절연막상에 형성된 게이트전극과, 상기 게이트전극을 가리도록 형성된 게이트 절연막과, 상기 게이트 절연막상에 형성되어, 그의 주표면상에, 채널영역을 끼우도록 소정의 간격을 구별하여 형성된 1쌍의 소스/드레인영역을 가지는 폴리실리콘막과를 구비하고, 상기 폴리실리콘막의 적어도 상기 채널영역과 상기 소스/드레인영역과를 위치하는 모든 결정의 결정립경은 1000Å 이상이고, 상기 폴리실리콘막의 적어도 상기 채널영역과 상기 소스/드레인영역과의 중에는 질소가 함유되어 있는 박막트랜지스터.
    ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.
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