KR940006676B1 - 시험회로를 내장한 기억용 반도체 집적회로 - Google Patents

시험회로를 내장한 기억용 반도체 집적회로 Download PDF

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Publication number
KR940006676B1
KR940006676B1 KR1019910018043A KR910018043A KR940006676B1 KR 940006676 B1 KR940006676 B1 KR 940006676B1 KR 1019910018043 A KR1019910018043 A KR 1019910018043A KR 910018043 A KR910018043 A KR 910018043A KR 940006676 B1 KR940006676 B1 KR 940006676B1
Authority
KR
South Korea
Prior art keywords
test
circuit
layer
memory
channel
Prior art date
Application number
KR1019910018043A
Other languages
English (en)
Korean (ko)
Other versions
KR930008868A (ko
Inventor
나까시마 다까시
Original Assignee
삼성전자 주식회사
김광호
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 삼성전자 주식회사, 김광호 filed Critical 삼성전자 주식회사
Priority to KR1019910018043A priority Critical patent/KR940006676B1/ko
Priority to GB9204291A priority patent/GB2260618B/en
Priority to ITMI920457A priority patent/IT1254651B/it
Priority to US07/843,260 priority patent/US5351213A/en
Priority to FR9202391A priority patent/FR2682521B1/fr
Priority to DE4206344A priority patent/DE4206344C2/de
Priority to JP9091292A priority patent/JP2526344B2/ja
Publication of KR930008868A publication Critical patent/KR930008868A/ko
Application granted granted Critical
Publication of KR940006676B1 publication Critical patent/KR940006676B1/ko

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/04—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body
    • H01L27/10—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a repetitive configuration
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • G11C29/04—Detection or location of defective memory elements, e.g. cell constructio details, timing of test signals
    • G11C29/08—Functional testing, e.g. testing during refresh, power-on self testing [POST] or distributed testing
    • G11C29/12—Built-in arrangements for testing, e.g. built-in self testing [BIST] or interconnection details
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • G11C29/04—Detection or location of defective memory elements, e.g. cell constructio details, timing of test signals
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • G11C29/04—Detection or location of defective memory elements, e.g. cell constructio details, timing of test signals
    • G11C29/08—Functional testing, e.g. testing during refresh, power-on self testing [POST] or distributed testing
    • G11C29/12—Built-in arrangements for testing, e.g. built-in self testing [BIST] or interconnection details
    • G11C29/38—Response verification devices
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00

Landscapes

  • Power Engineering (AREA)
  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • General Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • For Increasing The Reliability Of Semiconductor Memories (AREA)
  • Semiconductor Memories (AREA)
  • Dram (AREA)
  • Tests Of Electronic Circuits (AREA)
  • Testing Or Measuring Of Semiconductors Or The Like (AREA)
  • Read Only Memory (AREA)
  • Non-Volatile Memory (AREA)
KR1019910018043A 1991-10-14 1991-10-14 시험회로를 내장한 기억용 반도체 집적회로 KR940006676B1 (ko)

Priority Applications (7)

Application Number Priority Date Filing Date Title
KR1019910018043A KR940006676B1 (ko) 1991-10-14 1991-10-14 시험회로를 내장한 기억용 반도체 집적회로
GB9204291A GB2260618B (en) 1991-10-14 1992-02-28 An integrated semiconductor memory device with a test circuit
ITMI920457A IT1254651B (it) 1991-10-14 1992-02-28 Dispositivo di memoria integrato a semiconduttori utilizzante un circuito di prova
US07/843,260 US5351213A (en) 1991-10-14 1992-02-28 Integrated semiconductor memory device utilizing a test circuit
FR9202391A FR2682521B1 (fr) 1991-10-14 1992-02-28 Dispositif integre a memoire a semiconducteurs.
DE4206344A DE4206344C2 (de) 1991-10-14 1992-02-29 Integrierter Halbleiterspeicherbaustein, der eine Prüfschaltung verwendet
JP9091292A JP2526344B2 (ja) 1991-10-14 1992-04-10 試験回路を内蔵したメモリ―用半導体集積回路

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1019910018043A KR940006676B1 (ko) 1991-10-14 1991-10-14 시험회로를 내장한 기억용 반도체 집적회로

Publications (2)

Publication Number Publication Date
KR930008868A KR930008868A (ko) 1993-05-22
KR940006676B1 true KR940006676B1 (ko) 1994-07-25

Family

ID=19321217

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1019910018043A KR940006676B1 (ko) 1991-10-14 1991-10-14 시험회로를 내장한 기억용 반도체 집적회로

Country Status (7)

Country Link
US (1) US5351213A (it)
JP (1) JP2526344B2 (it)
KR (1) KR940006676B1 (it)
DE (1) DE4206344C2 (it)
FR (1) FR2682521B1 (it)
GB (1) GB2260618B (it)
IT (1) IT1254651B (it)

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US6208195B1 (en) 1991-03-18 2001-03-27 Integrated Device Technology, Inc. Fast transmission gate switch
WO1992016998A1 (en) 1991-03-18 1992-10-01 Quality Semiconductor, Inc. Fast transmission gate switch
TW260788B (it) * 1993-09-01 1995-10-21 Philips Electronics Nv
DE69406942T2 (de) * 1993-09-16 1998-03-19 Quality Semiconductor Inc Abtastprüfungsschaltung mit schnellem übertragungsgateschalter
US5535164A (en) * 1995-03-03 1996-07-09 International Business Machines Corporation BIST tester for multiple memories
US6388314B1 (en) * 1995-08-17 2002-05-14 Micron Technology, Inc. Single deposition layer metal dynamic random access memory
KR100197554B1 (ko) * 1995-09-30 1999-06-15 윤종용 반도체 메모리장치의 고속테스트 방법
US5925142A (en) * 1995-10-06 1999-07-20 Micron Technology, Inc. Self-test RAM using external synchronous clock
US5721863A (en) * 1996-01-29 1998-02-24 International Business Machines Corporation Method and structure for accessing semi-associative cache memory using multiple memories to store different components of the address
US5703818A (en) * 1996-08-26 1997-12-30 Mitsubishi Denki Kabushiki Kaisha Test circuit
US5740180A (en) * 1997-02-18 1998-04-14 Motorola, Inc. Circuit and test method for testing input cells
DE19711097C2 (de) * 1997-03-17 2000-04-06 Siemens Ag Integrierte Schaltung mit einem Speicher und einer Prüfschaltung
US5903491A (en) 1997-06-09 1999-05-11 Micron Technology, Inc. Single deposition layer metal dynamic random access memory
US5848010A (en) * 1997-07-14 1998-12-08 Micron Technology, Inc. Circuit and method for antifuse stress test
JP3235523B2 (ja) * 1997-08-06 2001-12-04 日本電気株式会社 半導体集積回路
US6154864A (en) * 1998-05-19 2000-11-28 Micron Technology, Inc. Read only memory embedded in a dynamic random access memory
KR100333536B1 (ko) * 1998-05-29 2002-08-27 주식회사 하이닉스반도체 센스앰프를이용하여테스트를수행하는메모리소자
US6603693B2 (en) 2001-12-12 2003-08-05 Micron Technology, Inc. DRAM with bias sensing
US6747889B2 (en) * 2001-12-12 2004-06-08 Micron Technology, Inc. Half density ROM embedded DRAM
US6545899B1 (en) * 2001-12-12 2003-04-08 Micron Technology, Inc. ROM embedded DRAM with bias sensing
US20030115538A1 (en) * 2001-12-13 2003-06-19 Micron Technology, Inc. Error correction in ROM embedded DRAM
JP2003288800A (ja) * 2002-03-27 2003-10-10 Nec Electronics Corp 半導体記憶装置のテスト方法、半導体記憶装置及び半導体装置
US20030185062A1 (en) * 2002-03-28 2003-10-02 Micron Technology, Inc. Proximity lookup for large arrays
US6785167B2 (en) * 2002-06-18 2004-08-31 Micron Technology, Inc. ROM embedded DRAM with programming
US6781867B2 (en) * 2002-07-11 2004-08-24 Micron Technology, Inc. Embedded ROM device using substrate leakage
US6865100B2 (en) * 2002-08-12 2005-03-08 Micron Technology, Inc. 6F2 architecture ROM embedded DRAM
DE10245712A1 (de) * 2002-10-01 2004-04-22 Infineon Technologies Ag Speicherschaltung mit einem Testmodus zum Schreiben von Testdaten
US7174477B2 (en) * 2003-02-04 2007-02-06 Micron Technology, Inc. ROM redundancy in ROM embedded DRAM
US6836106B1 (en) * 2003-09-23 2004-12-28 International Business Machines Corporation Apparatus and method for testing semiconductors
US7152192B2 (en) * 2005-01-20 2006-12-19 Hewlett-Packard Development Company, L.P. System and method of testing a plurality of memory blocks of an integrated circuit in parallel

Family Cites Families (16)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB2002129B (en) * 1977-08-03 1982-01-20 Sperry Rand Corp Apparatus for testing semiconductor memories
US4196389A (en) * 1978-07-13 1980-04-01 International Business Machines Corporation Test site for a charged coupled device (CCD) array
US4253059A (en) * 1979-05-14 1981-02-24 Fairchild Camera & Instrument Corp. EPROM Reliability test circuit
JPS5736844A (en) * 1980-08-15 1982-02-27 Hitachi Ltd Semiconductor device
JPS5893347A (ja) * 1981-11-30 1983-06-03 Toshiba Corp Ｍｏｓ型半導体装置及びその製造方法
US4757503A (en) * 1985-01-18 1988-07-12 The University Of Michigan Self-testing dynamic ram
EP0193210A3 (en) * 1985-02-28 1988-12-14 Nec Corporation Semiconductor memory device with a built-in test circuit
JPS61260668A (ja) * 1985-05-15 1986-11-18 Seiko Epson Corp 半導体装置
JPS62169355A (ja) * 1986-01-21 1987-07-25 Sharp Corp 半導体集積回路素子
JPH01253266A (ja) * 1988-03-31 1989-10-09 Sharp Corp 半導体集積回路
GB2222461B (en) * 1988-08-30 1993-05-19 Mitsubishi Electric Corp On chip testing of semiconductor memory devices
GB2256279B (en) * 1988-08-30 1993-05-12 Mitsubishi Electric Corp Semiconductor memory device
JP2901188B2 (ja) * 1988-12-28 1999-06-07 株式会社東芝 半導体集積回路
JP2518401B2 (ja) * 1989-06-14 1996-07-24 三菱電機株式会社 半導体記憶装置
US5265100A (en) * 1990-07-13 1993-11-23 Sgs-Thomson Microelectronics, Inc. Semiconductor memory with improved test mode
JPH0372770A (ja) * 1990-07-17 1991-03-27 Seiko Epson Corp 読み取り装置

Also Published As

Publication number Publication date
JPH05274899A (ja) 1993-10-22
GB9204291D0 (en) 1992-04-08
DE4206344A1 (de) 1993-04-15
DE4206344C2 (de) 1994-04-21
ITMI920457A1 (it) 1993-08-28
ITMI920457A0 (it) 1992-02-28
KR930008868A (ko) 1993-05-22
FR2682521A1 (fr) 1993-04-16
FR2682521B1 (fr) 1996-03-15
IT1254651B (it) 1995-09-28
JP2526344B2 (ja) 1996-08-21
US5351213A (en) 1994-09-27
GB2260618B (en) 1996-05-22
GB2260618A (en) 1993-04-21

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