KR920007124A - 폴리 에미터 바이폴라 트랜지스터의 제조방법 - Google Patents

폴리 에미터 바이폴라 트랜지스터의 제조방법 Download PDF

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Publication number
KR920007124A
KR920007124A KR1019900013935A KR900013935A KR920007124A KR 920007124 A KR920007124 A KR 920007124A KR 1019900013935 A KR1019900013935 A KR 1019900013935A KR 900013935 A KR900013935 A KR 900013935A KR 920007124 A KR920007124 A KR 920007124A
Authority
KR
South Korea
Prior art keywords
forming
oxide film
poly
etching
film
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Ceased
Application number
KR1019900013935A
Other languages
English (en)
Korean (ko)
Inventor
김규철
윤종밀
Original Assignee
김광호
삼성전자 주식회사
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 김광호, 삼성전자 주식회사 filed Critical 김광호
Priority to KR1019900013935A priority Critical patent/KR920007124A/ko
Priority to FR9100086A priority patent/FR2666450A1/fr
Priority to GB9100672A priority patent/GB2247780A/en
Priority to ITMI910068A priority patent/IT1245092B/it
Priority to DE4103594A priority patent/DE4103594A1/de
Priority to JP3253022A priority patent/JPH0629302A/ja
Publication of KR920007124A publication Critical patent/KR920007124A/ko
Ceased legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D10/00Bipolar junction transistors [BJT]
    • H10D10/01Manufacture or treatment
    • H10D10/051Manufacture or treatment of vertical BJTs
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D62/00Semiconductor bodies, or regions thereof, of devices having potential barriers
    • H10D62/10Shapes, relative sizes or dispositions of the regions of the semiconductor bodies; Shapes of the semiconductor bodies
    • H10D62/13Semiconductor regions connected to electrodes carrying current to be rectified, amplified or switched, e.g. source or drain regions
    • H10D62/133Emitter regions of BJTs
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/28Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
    • H01L21/283Deposition of conductive or insulating materials for electrodes conducting electric current
    • H01L21/285Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation
    • H01L21/28506Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers
    • H01L21/28512Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers on semiconductor bodies comprising elements of Group IV of the Periodic Table
    • H01L21/28525Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers on semiconductor bodies comprising elements of Group IV of the Periodic Table the conductive layers comprising semiconducting material
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D10/00Bipolar junction transistors [BJT]
    • H10D10/01Manufacture or treatment
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D10/00Bipolar junction transistors [BJT]
    • H10D10/40Vertical BJTs
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01Manufacture or treatment
    • H10D84/0112Integrating together multiple components covered by H10D8/00, H10D10/00 or H10D18/00, e.g. integrating multiple BJTs
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01Manufacture or treatment
    • H10D84/02Manufacture or treatment characterised by using material-based technologies
    • H10D84/03Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology
    • H10D84/038Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology using silicon technology, e.g. SiGe

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Bipolar Transistors (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
KR1019900013935A 1990-09-04 1990-09-04 폴리 에미터 바이폴라 트랜지스터의 제조방법 Ceased KR920007124A (ko)

Priority Applications (6)

Application Number Priority Date Filing Date Title
KR1019900013935A KR920007124A (ko) 1990-09-04 1990-09-04 폴리 에미터 바이폴라 트랜지스터의 제조방법
FR9100086A FR2666450A1 (fr) 1990-09-04 1991-01-04 Procede pour fabriquer un transistor bipolaire a emetteurs multiples.
GB9100672A GB2247780A (en) 1990-09-04 1991-01-11 Fabricating a bipolar transistor
ITMI910068A IT1245092B (it) 1990-09-04 1991-01-11 Procedimento per fabbricare un transistor bipolare ad emettitore di polisilicio
DE4103594A DE4103594A1 (de) 1990-09-04 1991-02-04 Verfahren zur herstellung von bipolaren polyemitter-transistoren
JP3253022A JPH0629302A (ja) 1990-09-04 1991-09-04 ポリシリコンエミッタバイポーラトランジスタの製造方法

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1019900013935A KR920007124A (ko) 1990-09-04 1990-09-04 폴리 에미터 바이폴라 트랜지스터의 제조방법

Publications (1)

Publication Number Publication Date
KR920007124A true KR920007124A (ko) 1992-04-28

Family

ID=19303215

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1019900013935A Ceased KR920007124A (ko) 1990-09-04 1990-09-04 폴리 에미터 바이폴라 트랜지스터의 제조방법

Country Status (6)

Country Link
JP (1) JPH0629302A (enrdf_load_stackoverflow)
KR (1) KR920007124A (enrdf_load_stackoverflow)
DE (1) DE4103594A1 (enrdf_load_stackoverflow)
FR (1) FR2666450A1 (enrdf_load_stackoverflow)
GB (1) GB2247780A (enrdf_load_stackoverflow)
IT (1) IT1245092B (enrdf_load_stackoverflow)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR19980054454A (ko) * 1996-12-27 1998-09-25 김영환 폴리실키콘층 형성 방법
KR100382725B1 (ko) * 2000-11-24 2003-05-09 삼성전자주식회사 클러스터화된 플라즈마 장치에서의 반도체소자의 제조방법

Families Citing this family (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE4240738A1 (en) * 1992-12-03 1993-08-26 Siemens Ag Bipolar transistor prodn. for long service life - by forming base in surface of substrate, short term temp. adjusting, and forming emitter
KR960704351A (ko) * 1993-07-12 1996-08-31 존 엠. 클락 3세 비소 에미터를 지니는 반도체 디바이스를 제조하는 방법(process for fabricating semiconductor devices having arsenic emitters)
US6093613A (en) * 1998-02-09 2000-07-25 Chartered Semiconductor Manufacturing, Ltd Method for making high gain lateral PNP and NPN bipolar transistor compatible with CMOS for making BICMOS circuits
US7737049B2 (en) 2007-07-31 2010-06-15 Qimonda Ag Method for forming a structure on a substrate and device

Family Cites Families (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0062725B1 (de) * 1981-04-14 1984-09-12 Deutsche ITT Industries GmbH Verfahren zum Herstellen eines integrierten Planartransistors
US4432809A (en) * 1981-12-31 1984-02-21 International Business Machines Corporation Method for reducing oxygen precipitation in silicon wafers
DE3304642A1 (de) * 1983-02-10 1984-08-16 Siemens AG, 1000 Berlin und 8000 München Integrierte halbleiterschaltung mit bipolartransistor-strukturen und verfahren zu ihrer herstellung
DE3580206D1 (de) * 1984-07-31 1990-11-29 Toshiba Kawasaki Kk Bipolarer transistor und verfahren zu seiner herstellung.
KR880000483B1 (ko) * 1985-08-05 1988-04-07 재단법인 한국전자통신 연구소 반도체소자의 제조방법
US4693782A (en) * 1985-09-06 1987-09-15 Matsushita Electric Industrial Co., Ltd. Fabrication method of semiconductor device
EP0239825B1 (de) * 1986-03-21 1993-08-25 Siemens Aktiengesellschaft Verfahren zur Herstellung einer Bipolartransistorstruktur für Höchstgeschwindigkeitsschaltung
JPS6353928A (ja) * 1986-08-22 1988-03-08 Anelva Corp ドライエツチング方法
US4839302A (en) * 1986-10-13 1989-06-13 Matsushita Electric Industrial Co., Ltd. Method for fabricating bipolar semiconductor device
JPS63182860A (ja) * 1987-01-26 1988-07-28 Toshiba Corp 半導体装置とその製造方法
JP2654011B2 (ja) * 1987-03-31 1997-09-17 株式会社東芝 半導体装置の製造方法
JPH01157565A (ja) * 1987-12-14 1989-06-20 Nec Corp Bi−MOS集積回路装置の製造方法
JPH0736389B2 (ja) * 1988-11-10 1995-04-19 三菱電機株式会社 半導体装置の電極配線の形成方法

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR19980054454A (ko) * 1996-12-27 1998-09-25 김영환 폴리실키콘층 형성 방법
KR100382725B1 (ko) * 2000-11-24 2003-05-09 삼성전자주식회사 클러스터화된 플라즈마 장치에서의 반도체소자의 제조방법

Also Published As

Publication number Publication date
JPH0629302A (ja) 1994-02-04
ITMI910068A0 (it) 1991-01-11
DE4103594A1 (de) 1992-03-05
FR2666450A1 (fr) 1992-03-06
FR2666450B1 (enrdf_load_stackoverflow) 1993-02-26
IT1245092B (it) 1994-09-13
GB2247780A (en) 1992-03-11
ITMI910068A1 (it) 1992-07-11
GB9100672D0 (en) 1991-02-27

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Patent event code: PA01091R01D

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Patent event date: 19900904

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Patent event date: 19900904

Comment text: Request for Examination of Application

PG1501 Laying open of application
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Comment text: Notification of reason for refusal

Patent event date: 19930330

Patent event code: PE09021S01D

E601 Decision to refuse application
PE0601 Decision on rejection of patent

Patent event date: 19930524

Comment text: Decision to Refuse Application

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Patent event code: PE06011S01I